Changeset 104087 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Mar 27, 2024 2:23:52 PM (10 months ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r104076 r104087 3354 3354 'IEM_MC_STORE_XREG_R64': (McBlock.parseMcGeneric, True, True, False, ), 3355 3355 'IEM_MC_STORE_XREG_U128': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3356 'IEM_MC_STORE_XREG_U16': (McBlock.parseMcGeneric, True, True, False,),3356 'IEM_MC_STORE_XREG_U16': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3357 3357 'IEM_MC_STORE_XREG_U32': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3358 3358 'IEM_MC_STORE_XREG_U32_U128': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), … … 3360 3360 'IEM_MC_STORE_XREG_U64': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3361 3361 'IEM_MC_STORE_XREG_U64_ZX_U128': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3362 'IEM_MC_STORE_XREG_U8': (McBlock.parseMcGeneric, True, True, False,),3362 'IEM_MC_STORE_XREG_U8': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3363 3363 'IEM_MC_STORE_XREG_XMM': (McBlock.parseMcGeneric, True, True, g_fNativeSimd), 3364 3364 'IEM_MC_STORE_XREG_XMM_U32': (McBlock.parseMcGeneric, True, True, False, ), -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h
r104084 r104087 7725 7725 7726 7726 #define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQWord, a_u64Value) \ 7727 off = iemNativeEmitSimdStoreXregU64(pReNative, off, a_iXReg, a_u64Value, a_iQWord) 7728 7729 /** Emits code for IEM_MC_STORE_XREG_U64. */ 7730 DECL_INLINE_THROW(uint32_t) 7731 iemNativeEmitSimdStoreXregU64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iXReg, uint8_t idxDstVar, uint8_t iQWord) 7727 off = iemNativeEmitSimdStoreXregUxx(pReNative, off, a_iXReg, a_u64Value, sizeof(uint64_t), a_iQWord) 7728 7729 #define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDWord, a_u32Value) \ 7730 off = iemNativeEmitSimdStoreXregUxx(pReNative, off, a_iXReg, a_u32Value, sizeof(uint32_t), a_iDWord) 7731 7732 #define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u32Value) \ 7733 off = iemNativeEmitSimdStoreXregUxx(pReNative, off, a_iXReg, a_u32Value, sizeof(uint16_t), a_iWord) 7734 7735 #define IEM_MC_STORE_XREG_U8(a_iXReg, a_iByte, a_u32Value) \ 7736 off = iemNativeEmitSimdStoreXregUxx(pReNative, off, a_iXReg, a_u32Value, sizeof(uint8_t), a_iByte) 7737 7738 /** Emits code for IEM_MC_STORE_XREG_U64/IEM_MC_STORE_XREG_U32/IEM_MC_STORE_XREG_U16/IEM_MC_STORE_XREG_U8. */ 7739 DECL_INLINE_THROW(uint32_t) 7740 iemNativeEmitSimdStoreXregUxx(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iXReg, uint8_t idxDstVar, uint8_t cbLocal, uint8_t iElem) 7732 7741 { 7733 7742 IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxDstVar); 7734 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxDstVar, sizeof(uint64_t)); 7743 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxDstVar, cbLocal); 7744 7745 #ifdef VBOX_STRICT 7746 switch (cbLocal) 7747 { 7748 case sizeof(uint64_t): Assert(iElem < 2); break; 7749 case sizeof(uint32_t): Assert(iElem < 4); break; 7750 case sizeof(uint16_t): Assert(iElem < 8); break; 7751 case sizeof(uint8_t): Assert(iElem < 16); break; 7752 default: AssertFailed(); 7753 } 7754 #endif 7735 7755 7736 7756 uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg), … … 7739 7759 uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off); 7740 7760 7741 off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, iQWord); 7742 7743 /* Free but don't flush the source register. */ 7744 iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst); 7745 iemNativeVarRegisterRelease(pReNative, idxDstVar); 7746 7747 return off; 7748 } 7749 7750 7751 #define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDWord, a_u32Value) \ 7752 off = iemNativeEmitSimdStoreXregU32(pReNative, off, a_iXReg, a_u32Value, a_iDWord) 7753 7754 /** Emits code for IEM_MC_STORE_XREG_U32. */ 7755 DECL_INLINE_THROW(uint32_t) 7756 iemNativeEmitSimdStoreXregU32(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iXReg, uint8_t idxDstVar, uint8_t iDWord) 7757 { 7758 IEMNATIVE_ASSERT_VAR_IDX(pReNative, idxDstVar); 7759 IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxDstVar, sizeof(uint32_t)); 7760 7761 uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg), 7762 kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate); 7763 7764 uint8_t const idxVarReg = iemNativeVarRegisterAcquire(pReNative, idxDstVar, &off); 7765 7766 off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, iDWord); 7761 switch (cbLocal) 7762 { 7763 case sizeof(uint64_t): off = iemNativeEmitSimdStoreGprToVecRegU64(pReNative, off, idxSimdRegDst, idxVarReg, iElem); break; 7764 case sizeof(uint32_t): off = iemNativeEmitSimdStoreGprToVecRegU32(pReNative, off, idxSimdRegDst, idxVarReg, iElem); break; 7765 case sizeof(uint16_t): off = iemNativeEmitSimdStoreGprToVecRegU16(pReNative, off, idxSimdRegDst, idxVarReg, iElem); break; 7766 case sizeof(uint8_t): off = iemNativeEmitSimdStoreGprToVecRegU8(pReNative, off, idxSimdRegDst, idxVarReg, iElem); break; 7767 default: AssertFailed(); 7768 } 7767 7769 7768 7770 /* Free but don't flush the source register. */
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