Changeset 104357 in vbox for trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

Timestamp:

Apr 17, 2024 9:57:03 PM (10 months ago)

Author:

vboxsync

Message:

VMM/IEM: Adding a TB lookup table to each TB, so we can cache which TB comes next on branches and other TB exits/completion. bugref:10656

File:

• trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h (modified) (1 diff)

trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

@@ -833 +833 @@
 
 /**
+ * Emits a store of an immediate value to a 64-bit VCpu field.
+ *
+ * @note Will allocate temporary registers on both ARM64 and AMD64.
+ */
+DECL_FORCE_INLINE_THROW(uint32_t)
+iemNativeEmitStoreImmToVCpuU64(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint64_t uImm, uint32_t offVCpu)
+{
+#ifdef RT_ARCH_AMD64
+    /* mov mem32, imm32 */
+    uint8_t const idxRegImm = iemNativeRegAllocTmpImm(pReNative, &off, uImm);
+    off = iemNativeEmitStoreGprToVCpuU64Ex(iemNativeInstrBufEnsure(pReNative, off, 7), off, idxRegImm, offVCpu);
+    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
+    iemNativeRegFreeTmpImm(pReNative, idxRegImm);
+
+#elif defined(RT_ARCH_ARM64)
+    uint8_t const idxRegImm = uImm == 0 ? ARMV8_A64_REG_XZR : iemNativeRegAllocTmpImm(pReNative, &off, uImm);
+    off = iemNativeEmitGprByVCpuLdSt(pReNative, off, idxRegImm, offVCpu, kArmv8A64InstrLdStType_St_Dword, sizeof(uint64_t));
+    if (idxRegImm != ARMV8_A64_REG_XZR)
+        iemNativeRegFreeTmpImm(pReNative, idxRegImm);
+
+#else
+# error "port me"
+#endif
+    return off;
+}
+
+
+/**
  * Emits a store of an immediate value to a 32-bit VCpu field.
  *