Changeset 104840 in vbox for trunk/src/VBox/VMM/VMMR3/IOMR3Mmio.cpp
- Timestamp:
- Jun 5, 2024 12:59:51 AM (8 months ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR3/IOMR3Mmio.cpp
r104767 r104840 275 275 AssertPtrReturn(phRegion, VERR_INVALID_POINTER); 276 276 *phRegion = UINT32_MAX; 277 VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); 277 PVMCPU const pVCpu = VMMGetCpu(pVM); 278 AssertReturn(pVCpu && pVCpu->idCpu == 0, VERR_VM_THREAD_NOT_EMT); 278 279 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE); 279 280 AssertReturn(!pVM->iom.s.fMmioFrozen, VERR_WRONG_ORDER); … … 324 325 AssertReturn(idx == pVM->iom.s.cMmioRegs, VERR_IOM_MMIO_IPE_1); 325 326 } 327 328 /* 329 * Create a matching ad-hoc RAM range for this MMIO region. 330 */ 331 uint16_t idRamRange = 0; 332 int rc = PGMR3PhysMmioRegister(pVM, pVCpu, cbRegion, pszDesc, &idRamRange); 333 AssertRCReturn(rc, rc); 326 334 327 335 /* … … 341 349 pVM->iom.s.paMmioRegs[idx].fMapped = false; 342 350 pVM->iom.s.paMmioRegs[idx].fFlags = fFlags; 351 pVM->iom.s.paMmioRegs[idx].idRamRange = idRamRange; 343 352 pVM->iom.s.paMmioRegs[idx].idxSelf = idx; 344 353 … … 409 418 /* Register with PGM before we shuffle the array: */ 410 419 ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys); 411 rc = PGMR3PhysMmio Register(pVM, pVCpu, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType,412 hRegion, pRegEntry->pszDesc);420 rc = PGMR3PhysMmioMap(pVM, pVCpu, GCPhys, cbRegion, pRegEntry->idRamRange, 421 pVM->iom.s.hNewMmioHandlerType, hRegion); 413 422 AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc); 414 423 … … 428 437 /* Register with PGM before we shuffle the array: */ 429 438 ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys); 430 rc = PGMR3PhysMmio Register(pVM, pVCpu, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType,431 hRegion, pRegEntry->pszDesc);439 rc = PGMR3PhysMmioMap(pVM, pVCpu, GCPhys, cbRegion, pRegEntry->idRamRange, 440 pVM->iom.s.hNewMmioHandlerType, hRegion); 432 441 AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc); 433 442 … … 455 464 /* First entry in the lookup table: */ 456 465 ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys); 457 rc = PGMR3PhysMmioRegister(pVM, pVCpu, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType, hRegion, pRegEntry->pszDesc); 466 rc = PGMR3PhysMmioMap(pVM, pVCpu, GCPhys, cbRegion, pRegEntry->idRamRange, 467 pVM->iom.s.hNewMmioHandlerType, hRegion); 458 468 AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc); 459 469 … … 572 582 pVM->iom.s.cMmioLookupEntries = cEntries - 1; 573 583 574 rc = PGMR3PhysMmio Deregister(pVM, pVCpu, GCPhys, pRegEntry->cbRegion);584 rc = PGMR3PhysMmioUnmap(pVM, pVCpu, GCPhys, pRegEntry->cbRegion, pRegEntry->idRamRange); 575 585 AssertRC(rc); 576 586 … … 622 632 { 623 633 RT_NOREF(pVM, pDevIns, hRegion, cbRegion); 634 AssertFailed(); 624 635 return VERR_NOT_IMPLEMENTED; 625 636 }
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