Changeset 104984 in vbox for trunk/include/iprt/armv8.h

Timestamp:

Jun 20, 2024 2:07:04 PM (8 months ago)

Author:

vboxsync

Message:

VMM/IEM: Relax alignment restrictions in native code TLB lookup, avoid the fallback/tlbmiss code path for most accesses as long as they're within the same page. bugref:10687

File:

• trunk/include/iprt/armv8.h (modified) (1 diff)

trunk/include/iprt/armv8.h

@@ -4052 +4052 @@
 
 
+/**
+ * A64: Encodes TBZ (conditional branch w/ immediate) instructions.
+ *
+ * @returns The encoded instruction.
+ * @param   iImm14          Signed number of instruction to jump (i.e. *4).
+ * @param   iReg            The GPR to check for zero / non-zero value.
+ * @param   iBitNo          The bit to test for.
+ */
+DECL_FORCE_INLINE(uint32_t) Armv8A64MkInstrTbz(int32_t iImm14, uint32_t iReg, uint32_t iBitNo)
+{
+    return Armv8A64MkInstrTbzTbnz(false /*fJmpIfNotZero*/, iImm14, iReg, iBitNo);
+}
+
+
+/**
+ * A64: Encodes TBNZ (conditional branch w/ immediate) instructions.
+ *
+ * @returns The encoded instruction.
+ * @param   iImm14          Signed number of instruction to jump (i.e. *4).
+ * @param   iReg            The GPR to check for zero / non-zero value.
+ * @param   iBitNo          The bit to test for.
+ */
+DECL_FORCE_INLINE(uint32_t) Armv8A64MkInstrTbnz(int32_t iImm14, uint32_t iReg, uint32_t iBitNo)
+{
+    return Armv8A64MkInstrTbzTbnz(true /*fJmpIfNotZero*/, iImm14, iReg, iBitNo);
+}
+
+
 
 /** Armv8 Condition codes.    */