Changeset 105072 in vbox for trunk/src/VBox/VMM/include

Timestamp:

Jun 28, 2024 12:03:20 PM (7 months ago)

Author:

vboxsync

Message:

VMM/IEM,DBGF,bs3-cpu-weird-1: Early data breakpoint support, mostly untested except for the ring transition tests in bs3-cpu-weird-1. bugref:10715

Location:

trunk/src/VBox/VMM/include

Files:

• IEMInline.h (modified) (6 diffs)
• IEMInternal.h (modified) (2 diffs)

trunk/src/VBox/VMM/include/IEMInline.h

@@ -579 +579 @@
     /*
      * Check for hardware instruction breakpoints.
+     * Note! Guest breakpoints are only checked after POP SS or MOV SS on AMD CPUs.
      */
     if (RT_LIKELY(!(pVCpu->iem.s.fExec & IEM_F_PENDING_BRK_INSTR)))
@@ -585 +586 @@
     {
         VBOXSTRICTRC rcStrict = DBGFBpCheckInstruction(pVCpu->CTX_SUFF(pVM), pVCpu,
-                                                       pVCpu->cpum.GstCtx.rip + pVCpu->cpum.GstCtx.cs.u64Base);
+                                                       pVCpu->cpum.GstCtx.rip + pVCpu->cpum.GstCtx.cs.u64Base,
+                                                          !(pVCpu->cpum.GstCtx.rflags.uBoth & CPUMCTX_INHIBIT_SHADOW_SS)
+                                                       || IEM_IS_GUEST_CPU_AMD(pVCpu));
         if (RT_LIKELY(rcStrict == VINF_SUCCESS))
         { /* likely */ }
@@ -622 +625 @@
     /*
      * Check for hardware instruction breakpoints.
+    * Note! Guest breakpoints are only checked after POP SS or MOV SS on AMD CPUs.
      */
     if (RT_LIKELY(!(pVCpu->iem.s.fExec & IEM_F_PENDING_BRK_INSTR)))
@@ -628 +632 @@
     {
         VBOXSTRICTRC rcStrict = DBGFBpCheckInstruction(pVCpu->CTX_SUFF(pVM), pVCpu,
-                                                       pVCpu->cpum.GstCtx.rip + pVCpu->cpum.GstCtx.cs.u64Base);
+                                                       pVCpu->cpum.GstCtx.rip + pVCpu->cpum.GstCtx.cs.u64Base,
+                                                          !(pVCpu->cpum.GstCtx.rflags.uBoth & CPUMCTX_INHIBIT_SHADOW_SS)
+                                                       || IEM_IS_GUEST_CPU_AMD(pVCpu));
         if (RT_LIKELY(rcStrict == VINF_SUCCESS))
         { /* likely */ }
@@ -2111 +2117 @@
             if (pVCpu->cpum.GstCtx.eflags.uBoth & X86_EFL_TF)
                 pVCpu->cpum.GstCtx.dr[6] |= X86_DR6_BS;
-            pVCpu->cpum.GstCtx.dr[6] |= (pVCpu->cpum.GstCtx.eflags.uBoth & CPUMCTX_DBG_HIT_DRX_MASK) >> CPUMCTX_DBG_HIT_DRX_SHIFT;
+            pVCpu->cpum.GstCtx.dr[6] |= (pVCpu->cpum.GstCtx.eflags.uBoth & CPUMCTX_DBG_HIT_DRX_MASK_NONSILENT)
+                                     >> CPUMCTX_DBG_HIT_DRX_SHIFT;
             LogFlowFunc(("Guest #DB fired at %04X:%016llX: DR6=%08X, RFLAGS=%16RX64\n",
                          pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.rip, (unsigned)pVCpu->cpum.GstCtx.dr[6],
@@ -2828 +2835 @@
     pVCpu->cpum.GstCtx.dr[6] &= ~X86_DR6_B_MASK;
     pVCpu->cpum.GstCtx.dr[6] |= X86_DR6_BS
-                             |  (pVCpu->cpum.GstCtx.eflags.uBoth & CPUMCTX_DBG_HIT_DRX_MASK) >> CPUMCTX_DBG_HIT_DRX_SHIFT;
+                             | (   (pVCpu->cpum.GstCtx.eflags.uBoth & CPUMCTX_DBG_HIT_DRX_MASK_NONSILENT)
+                                >> CPUMCTX_DBG_HIT_DRX_SHIFT);
     /** @todo Do we set all pending \#DB events, or just one? */
     LogFlowFunc(("Guest #DB fired at %04X:%016llX: DR6=%08X, RFLAGS=%16RX64 (popf)\n",

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -1981 +1981 @@
     R3PTRTYPE(PIEMTB)       pTbLookupEntryDummyR3;
 
+    /** Dummy TLB entry used for accesses to pages with databreakpoints. */
+    IEMTLBENTRY             DataBreakpointTlbe;
+
     /** Threaded TB statistics: Times TB execution was broken off before reaching the end. */
     STAMCOUNTER             StatTbThreadedExecBreaks;
@@ -2201 +2204 @@
     STAMCOUNTER             StatMemBounceBufferMapPhys;
     /** @} */
-
-    uint64_t                au64Padding[1];
+                                        
+    uint64_t                au64Padding[5];
     /** @} */