Changeset 105177 in vbox for trunk/include

Timestamp:

Jul 8, 2024 9:29:14 AM (7 months ago)

Author:

vboxsync

Message:

VMM/IEM: Increase TLB size to 8192 on arm; quick fix for 2M/4M page problem with invlpg. On AMD64 we stick to 256 TLB entries for VM struct size reasons. bugref:10687

Location:

trunk/include/VBox/vmm

Files:

• pgm.h (modified) (2 diffs)
• vm.h (modified) (1 diff)
• vm.mac (modified) (1 diff)

trunk/include/VBox/vmm/pgm.h

@@ -606 +606 @@
 /** Whether this is a second-level address translation. */
 #define PGM_WALKINFO_IS_SLAT                    RT_BIT_32(1)
+
 /** Set if it involves a big page (2/4 MB). */
-#define PGM_WALKINFO_BIG_PAGE                   RT_BIT_32(2)
+#define PGM_WALKINFO_BIG_PAGE                   RT_BIT_32(7)
 /** Set if it involves a gigantic page (1 GB). */
-#define PGM_WALKINFO_GIGANTIC_PAGE              RT_BIT_32(3)
+#define PGM_WALKINFO_GIGANTIC_PAGE              RT_BIT_32(8)
 
 /** Whether the linear address (GCPtr) caused the second-level
  * address translation - read the code to figure this one.
  * @todo for PGMPTWALKFAST::fFailed?  */
-#define PGM_WALKINFO_IS_LINEAR_ADDR_VALID       RT_BIT_32(7)
+#define PGM_WALKINFO_IS_LINEAR_ADDR_VALID       RT_BIT_32(10)
 /** @} */
 
@@ -1005 +1006 @@
 #define PGMIEMGCPHYS2PTR_F_NO_WRITE     RT_BIT_32(3)    /**< Not writable (IEMTLBE_F_PG_NO_WRITE). */
 #define PGMIEMGCPHYS2PTR_F_NO_READ      RT_BIT_32(4)    /**< Not readable (IEMTLBE_F_PG_NO_READ). */
-#define PGMIEMGCPHYS2PTR_F_NO_MAPPINGR3 RT_BIT_32(7)    /**< No ring-3 mapping (IEMTLBE_F_NO_MAPPINGR3). */
-#define PGMIEMGCPHYS2PTR_F_UNASSIGNED   RT_BIT_32(8)    /**< Unassgined memory (IEMTLBE_F_PG_UNASSIGNED). */
-#define PGMIEMGCPHYS2PTR_F_CODE_PAGE    RT_BIT_32(9)    /**< Write monitored IEM code page (IEMTLBE_F_PG_CODE_PAGE). */
+#define PGMIEMGCPHYS2PTR_F_NO_MAPPINGR3 RT_BIT_32(8)    /**< No ring-3 mapping (IEMTLBE_F_NO_MAPPINGR3). */
+#define PGMIEMGCPHYS2PTR_F_UNASSIGNED   RT_BIT_32(9)    /**< Unassgined memory (IEMTLBE_F_PG_UNASSIGNED). */
+#define PGMIEMGCPHYS2PTR_F_CODE_PAGE    RT_BIT_32(10)    /**< Write monitored IEM code page (IEMTLBE_F_PG_CODE_PAGE). */
 /** @} */
 

trunk/include/VBox/vmm/vm.h

@@ -159 +159 @@
         struct IEMCPU       s;
 #endif
-        uint8_t             padding[244672]; /* multiple of 64 */
+        uint8_t             padding[  113600    /* The common base size. */
+#ifdef RT_ARCH_AMD64
+                                    + 32768     /* For 256 entries per TLBs. */
+#else
+                                    + 1048576   /* For 8192 entries per TLBs. */
+#endif
+        ]; /* multiple of 64 */
     } iem;
 

trunk/include/VBox/vmm/vm.mac

@@ -58 +58 @@
 
     alignb 64
-    .iem                    resb 244672
+    .iem                    resb 113600 + 32768
 
     alignb 64