Changeset 105670 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/SmmAccess
- Timestamp:
- Aug 14, 2024 1:16:30 PM (6 months ago)
- svn:sync-xref-src-repo-rev:
- 164367
- Location:
- trunk/src/VBox/Devices/EFI/FirmwareNew
- Files:
-
- 7 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/EFI/FirmwareNew
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trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
r99404 r105670 7 7 8 8 Copyright (C) 2013, 2015, Red Hat, Inc.<BR> 9 Copyright (c) 2009 - 20 10, Intel Corporation. All rights reserved.<BR>9 Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.<BR> 10 10 11 11 SPDX-License-Identifier: BSD-2-Clause-Patent … … 116 116 { 117 117 return SmramAccessGetCapabilities ( 118 This->LockState,119 This->OpenState,120 118 SmramMapSize, 121 119 SmramMap -
trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
r85718 r105670 6 6 # 7 7 # Copyright (C) 2013, 2015, Red Hat, Inc. 8 # Copyright (c) 2024 Intel Corporation. 8 9 # 9 10 # SPDX-License-Identifier: BSD-2-Clause-Patent … … 42 43 UefiBootServicesTableLib 43 44 UefiDriverEntryPoint 45 HobLib 44 46 45 47 [Protocols] … … 49 51 gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire 50 52 53 [Guids] 54 gEfiSmmSmramMemoryGuid # ALWAYS_CONSUMED 55 51 56 [Pcd] 52 57 gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase -
trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/SmmAccess/SmmAccessPei.c
r101291 r105670 4 4 5 5 - verify & configure the Q35 TSEG in the entry point, 6 - provide SMRAM access by producing PEI_SMM_ACCESS_PPI, 7 - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and expose 8 it via the gEfiAcpiVariableGuid GUID HOB. 6 - provide SMRAM access by producing PEI_SMM_ACCESS_PPI 9 7 10 8 This PEIM runs from RAM, so we can write to variables with static storage … … 12 10 13 11 Copyright (C) 2013, 2015, Red Hat, Inc.<BR> 14 Copyright (c) 2010 , Intel Corporation. All rights reserved.<BR>12 Copyright (c) 2010 - 2024, Intel Corporation. All rights reserved.<BR> 15 13 16 14 SPDX-License-Identifier: BSD-2-Clause-Patent … … 18 16 **/ 19 17 20 #include <Guid/AcpiS3Context.h>21 18 #include <Library/BaseLib.h> 22 19 #include <Library/BaseMemoryLib.h> 23 20 #include <Library/DebugLib.h> 24 #include <Library/HobLib.h>25 21 #include <Library/IoLib.h> 26 22 #include <Library/PcdLib.h> … … 65 61 ) 66 62 { 67 if (DescriptorIndex >= DescIdxCount) { 63 EFI_HOB_GUID_TYPE *GuidHob; 64 EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; 65 66 // 67 // Get the number of regions in the system that can be usable for SMRAM 68 // 69 GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); 70 DescriptorBlock = GET_GUID_HOB_DATA (GuidHob); 71 ASSERT (DescriptorBlock); 72 73 if (DescriptorIndex >= DescriptorBlock->NumberOfSmmReservedRegions) { 68 74 return EFI_INVALID_PARAMETER; 69 75 } … … 103 109 ) 104 110 { 105 if (DescriptorIndex >= DescIdxCount) { 111 EFI_HOB_GUID_TYPE *GuidHob; 112 EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; 113 114 // 115 // Get the number of regions in the system that can be usable for SMRAM 116 // 117 GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); 118 DescriptorBlock = GET_GUID_HOB_DATA (GuidHob); 119 ASSERT (DescriptorBlock); 120 121 if (DescriptorIndex >= DescriptorBlock->NumberOfSmmReservedRegions) { 106 122 return EFI_INVALID_PARAMETER; 107 123 } … … 140 156 ) 141 157 { 142 if (DescriptorIndex >= DescIdxCount) { 158 EFI_HOB_GUID_TYPE *GuidHob; 159 EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; 160 161 // 162 // Get the number of regions in the system that can be usable for SMRAM 163 // 164 GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); 165 DescriptorBlock = GET_GUID_HOB_DATA (GuidHob); 166 ASSERT (DescriptorBlock); 167 168 if (DescriptorIndex >= DescriptorBlock->NumberOfSmmReservedRegions) { 143 169 return EFI_INVALID_PARAMETER; 144 170 } … … 179 205 { 180 206 return SmramAccessGetCapabilities ( 181 This->LockState,182 This->OpenState,183 207 SmramMapSize, 184 208 SmramMap … … 241 265 ) 242 266 { 243 UINT16 HostBridgeDevId; 244 UINT8 EsmramcVal; 245 UINT8 RegMask8; 246 UINT32 TopOfLowRam, TopOfLowRamMb; 247 EFI_STATUS Status; 248 UINTN SmramMapSize; 249 EFI_SMRAM_DESCRIPTOR SmramMap[DescIdxCount]; 250 VOID *GuidHob; 267 UINT16 HostBridgeDevId; 268 UINT8 EsmramcVal; 269 UINT8 RegMask8; 270 UINT32 TopOfLowRam, TopOfLowRamMb; 251 271 252 272 // … … 357 377 ); 358 378 359 //360 // Create the GUID HOB and point it to the first SMRAM range.361 //362 379 GetStates (&mAccess.LockState, &mAccess.OpenState); 363 SmramMapSize = sizeof SmramMap;364 Status = SmramAccessGetCapabilities (365 mAccess.LockState,366 mAccess.OpenState,367 &SmramMapSize,368 SmramMap369 );370 ASSERT_EFI_ERROR (Status);371 372 DEBUG_CODE_BEGIN ();373 {374 UINTN Count;375 UINTN Idx;376 377 Count = SmramMapSize / sizeof SmramMap[0];378 DEBUG ((379 DEBUG_VERBOSE,380 "%a: SMRAM map follows, %d entries\n",381 __func__,382 (INT32)Count383 ));384 DEBUG ((385 DEBUG_VERBOSE,386 "% 20a % 20a % 20a % 20a\n",387 "PhysicalStart(0x)",388 "PhysicalSize(0x)",389 "CpuStart(0x)",390 "RegionState(0x)"391 ));392 for (Idx = 0; Idx < Count; ++Idx) {393 DEBUG ((394 DEBUG_VERBOSE,395 "% 20Lx % 20Lx % 20Lx % 20Lx\n",396 SmramMap[Idx].PhysicalStart,397 SmramMap[Idx].PhysicalSize,398 SmramMap[Idx].CpuStart,399 SmramMap[Idx].RegionState400 ));401 }402 }403 DEBUG_CODE_END ();404 405 GuidHob = BuildGuidHob (406 &gEfiAcpiVariableGuid,407 sizeof SmramMap[DescIdxSmmS3ResumeState]408 );409 if (GuidHob == NULL) {410 return EFI_OUT_OF_RESOURCES;411 }412 413 CopyMem (414 GuidHob,415 &SmramMap[DescIdxSmmS3ResumeState],416 sizeof SmramMap[DescIdxSmmS3ResumeState]417 );418 380 419 381 // -
trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/SmmAccess/SmmAccessPei.inf
r85718 r105670 3 3 # 4 4 # - provide SMRAM access by producing PEI_SMM_ACCESS_PPI, 5 # - verify & configure the Q35 TSEG in the entry point, 6 # - set aside the SMM_S3_RESUME_STATE object at the bottom of TSEG, and expose 7 # it via the gEfiAcpiVariableGuid GUIDed HOB. 5 # - verify & configure the Q35 TSEG in the entry point. 8 6 # 9 7 # Copyright (C) 2013, 2015, Red Hat, Inc. 8 # Copyright (c) 2024 Intel Corporation. 10 9 # 11 10 # SPDX-License-Identifier: BSD-2-Clause-Patent … … 37 36 OvmfPkg/OvmfPkg.dec 38 37 39 [Guids]40 gEfiAcpiVariableGuid41 42 38 [LibraryClasses] 43 39 BaseLib … … 58 54 gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes 59 55 56 [Guids] 57 gEfiSmmSmramMemoryGuid # ALWAYS_CONSUMED 58 60 59 [Ppis] 61 60 gPeiSmmAccessPpiGuid ## PRODUCES -
trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/SmmAccess/SmramInternal.c
r99404 r105670 4 4 5 5 Copyright (C) 2015, Red Hat, Inc. 6 Copyright (c) 2024 Intel Corporation. 6 7 7 8 SPDX-License-Identifier: BSD-2-Clause-Patent 8 9 9 10 **/ 10 11 #include <Guid/AcpiS3Context.h>12 11 #include <IndustryStandard/Q35MchIch9.h> 13 12 #include <Library/DebugLib.h> … … 167 166 EFI_STATUS 168 167 SmramAccessGetCapabilities ( 169 IN BOOLEAN LockState,170 IN BOOLEAN OpenState,171 168 IN OUT UINTN *SmramMapSize, 172 169 IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap 173 170 ) 174 171 { 175 UINTN OriginalSize; 176 UINT32 TsegMemoryBaseMb, TsegMemoryBase; 177 UINT64 CommonRegionState; 178 UINT8 TsegSizeBits; 179 180 OriginalSize = *SmramMapSize; 181 *SmramMapSize = DescIdxCount * sizeof *SmramMap; 182 if (OriginalSize < *SmramMapSize) { 172 UINTN BufferSize; 173 EFI_HOB_GUID_TYPE *GuidHob; 174 EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock; 175 UINTN Index; 176 177 // 178 // Get Hob list 179 // 180 GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid); 181 DescriptorBlock = GET_GUID_HOB_DATA (GuidHob); 182 ASSERT (DescriptorBlock); 183 184 BufferSize = DescriptorBlock->NumberOfSmmReservedRegions * sizeof (EFI_SMRAM_DESCRIPTOR); 185 186 if (*SmramMapSize < BufferSize) { 187 *SmramMapSize = BufferSize; 183 188 return EFI_BUFFER_TOO_SMALL; 184 189 } 185 190 186 191 // 187 // Read the TSEG Memory Base register. 188 // 189 TsegMemoryBaseMb = PciRead32 (DRAMC_REGISTER_Q35 (MCH_TSEGMB)); 190 TsegMemoryBase = (TsegMemoryBaseMb >> MCH_TSEGMB_MB_SHIFT) << 20; 191 192 // 193 // Precompute the region state bits that will be set for all regions. 194 // 195 CommonRegionState = (OpenState ? EFI_SMRAM_OPEN : EFI_SMRAM_CLOSED) | 196 (LockState ? EFI_SMRAM_LOCKED : 0) | 197 EFI_CACHEABLE; 198 199 // 200 // The first region hosts an SMM_S3_RESUME_STATE object. It is located at the 201 // start of TSEG. We round up the size to whole pages, and we report it as 202 // EFI_ALLOCATED, so that the SMM_CORE stays away from it. 203 // 204 SmramMap[DescIdxSmmS3ResumeState].PhysicalStart = TsegMemoryBase; 205 SmramMap[DescIdxSmmS3ResumeState].CpuStart = TsegMemoryBase; 206 SmramMap[DescIdxSmmS3ResumeState].PhysicalSize = 207 EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (sizeof (SMM_S3_RESUME_STATE))); 208 SmramMap[DescIdxSmmS3ResumeState].RegionState = 209 CommonRegionState | EFI_ALLOCATED; 210 211 // 212 // Get the TSEG size bits from the ESMRAMC register. 213 // 214 TsegSizeBits = PciRead8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC)) & 215 MCH_ESMRAMC_TSEG_MASK; 216 217 // 218 // The second region is the main one, following the first. 219 // 220 SmramMap[DescIdxMain].PhysicalStart = 221 SmramMap[DescIdxSmmS3ResumeState].PhysicalStart + 222 SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; 223 SmramMap[DescIdxMain].CpuStart = SmramMap[DescIdxMain].PhysicalStart; 224 SmramMap[DescIdxMain].PhysicalSize = 225 (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB : 226 TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB : 227 TsegSizeBits == MCH_ESMRAMC_TSEG_1MB ? SIZE_1MB : 228 mQ35TsegMbytes * SIZE_1MB) - 229 SmramMap[DescIdxSmmS3ResumeState].PhysicalSize; 230 SmramMap[DescIdxMain].RegionState = CommonRegionState; 231 232 return EFI_SUCCESS; 233 } 192 // Update SmramMapSize to real return SMRAM map size 193 // 194 *SmramMapSize = BufferSize; 195 196 // 197 // Use the hob to publish SMRAM capabilities 198 // 199 for (Index = 0; Index < DescriptorBlock->NumberOfSmmReservedRegions; Index++) { 200 SmramMap[Index].PhysicalStart = DescriptorBlock->Descriptor[Index].PhysicalStart; 201 SmramMap[Index].CpuStart = DescriptorBlock->Descriptor[Index].CpuStart; 202 SmramMap[Index].PhysicalSize = DescriptorBlock->Descriptor[Index].PhysicalSize; 203 SmramMap[Index].RegionState = DescriptorBlock->Descriptor[Index].RegionState; 204 } 205 206 return EFI_SUCCESS; 207 } -
trunk/src/VBox/Devices/EFI/FirmwareNew/OvmfPkg/SmmAccess/SmramInternal.h
r99404 r105670 4 4 5 5 Copyright (C) 2015, Red Hat, Inc. 6 Copyright (c) 2024 Intel Corporation. 6 7 7 8 SPDX-License-Identifier: BSD-2-Clause-Patent … … 11 12 #include <Pi/PiMultiPhase.h> 12 13 13 // 14 // We'll have two SMRAM ranges. 15 // 16 // The first is a tiny one that hosts an SMM_S3_RESUME_STATE object, to be 17 // filled in by the CPU SMM driver during normal boot, for the PEI instance of 18 // the LockBox library (which will rely on the object during S3 resume). 19 // 20 // The other SMRAM range is the main one, for the SMM core and the SMM drivers. 21 // 22 typedef enum { 23 DescIdxSmmS3ResumeState = 0, 24 DescIdxMain = 1, 25 DescIdxCount = 2 26 } DESCRIPTOR_INDEX; 14 #include <Guid/SmramMemoryReserve.h> 15 #include <Library/HobLib.h> 27 16 28 17 // … … 98 87 EFI_STATUS 99 88 SmramAccessGetCapabilities ( 100 IN BOOLEAN LockState,101 IN BOOLEAN OpenState,102 89 IN OUT UINTN *SmramMapSize, 103 90 IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
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