Changeset 10572 in vbox for trunk/src/VBox/VMM

Timestamp:

Jul 13, 2008 1:24:51 AM (17 years ago)

Author:

vboxsync

Message:

Use NIL_RTR0MEMOBJ and ASMMemZeroPage.

Location:

trunk/src/VBox/VMM/VMMR0

Files:

• HWACCMR0.cpp (modified) (4 diffs)
• HWSVMR0.cpp (modified) (6 diffs)
• HWVMXR0.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -140 +140 @@
     memset(&HWACCMR0Globals, 0, sizeof(HWACCMR0Globals));
     HWACCMR0Globals.enmHwAccmState = HWACCMSTATE_UNINITIALIZED;
+    for (unsigned i = 0; i < RT_ELEMENTS(HWACCMR0Globals.aCpuInfo); i++)
+        HWACCMR0Globals.aCpuInfo[i].pMemObj = NIL_RTR0MEMOBJ;
 
     /* Fill in all callbacks with placeholders. */
@@ -350 +352 @@
         HWACCMR0Globals.pfnSetupVM          = VMXR0SetupVM;
     }
-    else 
+    else
     if (HWACCMR0Globals.svm.fSupported)
     {
@@ -415 +417 @@
     {
         AssertMsg(VBOX_SUCCESS(aRc[i]), ("HWACCMR0DisableCPU failed for cpu %d with rc=%d\n", i, aRc[i]));
-        if (HWACCMR0Globals.aCpuInfo[i].pMemObj)
+        if (HWACCMR0Globals.aCpuInfo[i].pMemObj != NIL_RTR0MEMOBJ)
         {
             RTR0MemObjFree(HWACCMR0Globals.aCpuInfo[i].pMemObj, false);
-            HWACCMR0Globals.aCpuInfo[i].pMemObj = NULL;
+            HWACCMR0Globals.aCpuInfo[i].pMemObj = NIL_RTR0MEMOBJ;
         }
     }
@@ -529 +531 @@
                 void *pvR0 = RTR0MemObjAddress(HWACCMR0Globals.aCpuInfo[i].pMemObj);
                 Assert(pvR0);
-                memset(pvR0, 0, PAGE_SIZE);
+                ASMMemZeroPage(pvR0);
 
 #ifdef LOG_ENABLED

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -120 +120 @@
     int rc;
 
+    pVM->hwaccm.s.svm.pMemObjVMCB = NIL_RTR0MEMOBJ;
+    pVM->hwaccm.s.svm.pMemObjVMCBHost = NIL_RTR0MEMOBJ;
+    pVM->hwaccm.s.svm.pMemObjIOBitmap = NIL_RTR0MEMOBJ;
+    pVM->hwaccm.s.svm.pMemObjMSRBitmap = NIL_RTR0MEMOBJ;
+
+
     /* Allocate one page for the VM control block (VMCB). */
     rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.svm.pMemObjVMCB, 1 << PAGE_SHIFT, true /* executable R0 mapping */);
@@ -127 +133 @@
     pVM->hwaccm.s.svm.pVMCB     = RTR0MemObjAddress(pVM->hwaccm.s.svm.pMemObjVMCB);
     pVM->hwaccm.s.svm.pVMCBPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.svm.pMemObjVMCB, 0);
-    ASMMemZero32(pVM->hwaccm.s.svm.pVMCB, PAGE_SIZE);
+    ASMMemZeroPage(pVM->hwaccm.s.svm.pVMCB);
 
     /* Allocate one page for the host context */
@@ -136 +142 @@
     pVM->hwaccm.s.svm.pVMCBHost     = RTR0MemObjAddress(pVM->hwaccm.s.svm.pMemObjVMCBHost);
     pVM->hwaccm.s.svm.pVMCBHostPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.svm.pMemObjVMCBHost, 0);
-    ASMMemZero32(pVM->hwaccm.s.svm.pVMCBHost, PAGE_SIZE);
+    ASMMemZeroPage(pVM->hwaccm.s.svm.pVMCBHost);
 
     /* Allocate 12 KB for the IO bitmap (doesn't seem to be a way to convince SVM not to use it) */
@@ -202 +208 @@
 HWACCMR0DECL(int) SVMR0TermVM(PVM pVM)
 {
-    if (pVM->hwaccm.s.svm.pMemObjVMCB)
+    if (pVM->hwaccm.s.svm.pMemObjVMCB != NIL_RTR0MEMOBJ)
     {
         RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjVMCB, false);
         pVM->hwaccm.s.svm.pVMCB       = 0;
         pVM->hwaccm.s.svm.pVMCBPhys   = 0;
-        pVM->hwaccm.s.svm.pMemObjVMCB = 0;
-    }
-    if (pVM->hwaccm.s.svm.pMemObjVMCBHost)
+        pVM->hwaccm.s.svm.pMemObjVMCB = NIL_RTR0MEMOBJ;
+    }
+    if (pVM->hwaccm.s.svm.pMemObjVMCBHost != NIL_RTR0MEMOBJ)
     {
         RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjVMCBHost, false);
         pVM->hwaccm.s.svm.pVMCBHost       = 0;
         pVM->hwaccm.s.svm.pVMCBHostPhys   = 0;
-        pVM->hwaccm.s.svm.pMemObjVMCBHost = 0;
-    }
-    if (pVM->hwaccm.s.svm.pMemObjIOBitmap)
+        pVM->hwaccm.s.svm.pMemObjVMCBHost = NIL_RTR0MEMOBJ;
+    }
+    if (pVM->hwaccm.s.svm.pMemObjIOBitmap != NIL_RTR0MEMOBJ)
     {
         RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjIOBitmap, false);
         pVM->hwaccm.s.svm.pIOBitmap       = 0;
         pVM->hwaccm.s.svm.pIOBitmapPhys   = 0;
-        pVM->hwaccm.s.svm.pMemObjIOBitmap = 0;
-    }
-    if (pVM->hwaccm.s.svm.pMemObjMSRBitmap)
+        pVM->hwaccm.s.svm.pMemObjIOBitmap = NIL_RTR0MEMOBJ;
+    }
+    if (pVM->hwaccm.s.svm.pMemObjMSRBitmap != NIL_RTR0MEMOBJ)
     {
         RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjMSRBitmap, false);
         pVM->hwaccm.s.svm.pMSRBitmap       = 0;
         pVM->hwaccm.s.svm.pMSRBitmapPhys   = 0;
-        pVM->hwaccm.s.svm.pMemObjMSRBitmap = 0;
+        pVM->hwaccm.s.svm.pMemObjMSRBitmap = NIL_RTR0MEMOBJ;
     }
     return VINF_SUCCESS;
@@ -320 +326 @@
     pVMCB->ctrl.IntCtrl.n.u1VIrqMasking = 1;
     /* Ignore the priority in the TPR; just deliver it when we tell it to. */
-    pVMCB->ctrl.IntCtrl.n.u1IgnoreTPR   = 1; 
+    pVMCB->ctrl.IntCtrl.n.u1IgnoreTPR   = 1;
 
     /* Set IO and MSR bitmap addresses. */
@@ -883 +889 @@
             Log(("Force TLB flush due to changed TLB flush count (%x vs %x)\n", pVM->hwaccm.s.svm.cTLBFlushes, pCpu->cTLBFlushes));
     }
-    if (pCpu->fFlushTLB) 
+    if (pCpu->fFlushTLB)
         Log(("Force TLB flush: first time cpu %d is used -> flush\n", pCpu->idCpu));
 #endif

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -139 +139 @@
     SUPR0Printf("VMXR0InitVM %x\n", pVM);
 #endif
+    pVM->hwaccm.s.vmx.pMemObjVMCS = NIL_RTR0MEMOBJ;
+    pVM->hwaccm.s.vmx.pMemObjAPIC = NIL_RTR0MEMOBJ;
+    pVM->hwaccm.s.vmx.pMemObjRealModeTSS = NIL_RTR0MEMOBJ;
+
 
     /* Allocate one page for the VM control structure (VMCS). */
@@ -199 +203 @@
 HWACCMR0DECL(int) VMXR0TermVM(PVM pVM)
 {
-    if (pVM->hwaccm.s.vmx.pMemObjVMCS)
+    if (pVM->hwaccm.s.vmx.pMemObjVMCS != NIL_RTR0MEMOBJ)
     {
         RTR0MemObjFree(pVM->hwaccm.s.vmx.pMemObjVMCS, false);
-        pVM->hwaccm.s.vmx.pMemObjVMCS = 0;
+        pVM->hwaccm.s.vmx.pMemObjVMCS = NIL_RTR0MEMOBJ;
         pVM->hwaccm.s.vmx.pVMCS       = 0;
         pVM->hwaccm.s.vmx.pVMCSPhys   = 0;
     }
-    if (pVM->hwaccm.s.vmx.pMemObjRealModeTSS)
+    if (pVM->hwaccm.s.vmx.pMemObjRealModeTSS != NIL_RTR0MEMOBJ)
     {
         RTR0MemObjFree(pVM->hwaccm.s.vmx.pMemObjRealModeTSS, false);
-        pVM->hwaccm.s.vmx.pMemObjRealModeTSS = 0;
+        pVM->hwaccm.s.vmx.pMemObjRealModeTSS = NIL_RTR0MEMOBJ;
         pVM->hwaccm.s.vmx.pRealModeTSS       = 0;
         pVM->hwaccm.s.vmx.pRealModeTSSPhys   = 0;
     }
-    if (pVM->hwaccm.s.vmx.pMemObjAPIC)
+    if (pVM->hwaccm.s.vmx.pMemObjAPIC != NIL_RTR0MEMOBJ)
     {
         RTR0MemObjFree(pVM->hwaccm.s.vmx.pMemObjAPIC, false);
-        pVM->hwaccm.s.vmx.pMemObjAPIC = 0;
+        pVM->hwaccm.s.vmx.pMemObjAPIC = NIL_RTR0MEMOBJ;
         pVM->hwaccm.s.vmx.pAPIC       = 0;
         pVM->hwaccm.s.vmx.pAPICPhys   = 0;
@@ -2068 +2072 @@
     case VMX_EXIT_PORT_IO:              /* 30 I/O instruction. */
         /* already handled above */
-        AssertMsg(   rc == VINF_PGM_CHANGE_MODE 
-                  || rc == VINF_EM_RAW_INTERRUPT 
-                  || rc == VERR_EM_INTERPRETER 
-                  || rc == VINF_EM_RAW_EMULATE_INSTR 
-                  || rc == VINF_PGM_SYNC_CR3 
-                  || rc == VINF_IOM_HC_IOPORT_READ 
+        AssertMsg(   rc == VINF_PGM_CHANGE_MODE
+                  || rc == VINF_EM_RAW_INTERRUPT
+                  || rc == VERR_EM_INTERPRETER
+                  || rc == VINF_EM_RAW_EMULATE_INSTR
+                  || rc == VINF_PGM_SYNC_CR3
+                  || rc == VINF_IOM_HC_IOPORT_READ
                   || rc == VINF_IOM_HC_IOPORT_WRITE
-                  || rc == VINF_EM_RAW_GUEST_TRAP 
-                  || rc == VINF_TRPM_XCPT_DISPATCHED 
-                  || rc == VINF_EM_RESCHEDULE_REM, 
+                  || rc == VINF_EM_RAW_GUEST_TRAP
+                  || rc == VINF_TRPM_XCPT_DISPATCHED
+                  || rc == VINF_EM_RESCHEDULE_REM,
                   ("rc = %d\n", rc));
         break;
 
-    case VMX_EXIT_TPR:                  /* 43 TPR below threshold. Guest software executed MOV to CR8. */       
+    case VMX_EXIT_TPR:                  /* 43 TPR below threshold. Guest software executed MOV to CR8. */
     case VMX_EXIT_RDMSR:                /* 31 RDMSR. Guest software attempted to execute RDMSR. */
     case VMX_EXIT_WRMSR:                /* 32 WRMSR. Guest software attempted to execute WRMSR. */