Changeset 105779 in vbox for trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S
- Timestamp:
- Aug 21, 2024 4:39:51 PM (6 months ago)
- svn:sync-xref-src-repo-rev:
- 164491
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S
r105759 r105779 28 28 .private_extern _TestProcA64 29 29 _TestProcA64: 30 ; Miscellaneous instructions without a parameter 30 31 nop 31 32 yield … … 36 37 dgh 37 38 xpaclri 39 40 ; Control flow instructions 41 svc #0xfefe 42 hvc #0xdead 43 smc #0xcafe 44 brk #0xd0d0 45 hlt #0xc0de 46 ; tcancel #0xd00f Requires FEAT_TME 47 dcps1 #0xdeca 48 dcps2 #0xdec0 49 dcps3 #0xfeed 50 b #0x100 51 b #-0x100 52 bl #0x100 53 bl #-0x100 54 b.ne #+0x1000 55 b.eq #-0x1000 56 ; bc.ne #+0x1000 Requires FEAT_HBC 57 ; bc.eq #-0x1000 Requires FEAT_HBC 58 cbz x0, #+0x100 59 cbz x0, #-0x100 60 cbz w0, #+0x100 61 cbnz x0, #+0x100 62 cbnz x0, #-0x100 63 cbnz w0, #+0x100 64 tbz w0, #13, #+0x100 65 tbz x0, #63, #-0x100 66 tbz w0, #8, #+0x100 38 67 ret x30 39 68 ret x1 … … 41 70 ret x15 42 71 72 ; System register access instructions 43 73 msr ttbr0_el1, x0 44 74 mrs x0, ttbr0_el1 45 75 46 b #0x100 47 b #-0x100 48 b.ne #+0x1000 49 b.eq #-0x1000 50 ; bc.ne #+0x1000 Requires FEAT_HBC 51 ; bc.eq #-0x1000 Requires FEAT_HBC 52 76 ; Arithmetic instructions 53 77 add x0, x0, #0x0 54 78 add w0, w1, #0x10000 … … 70 94 ; mov w0, w1 71 95 72 and x0, x0, #0xffff 73 74 ret x30 96 ; Logical instructions 97 and x0, x0, #0xffff 98 and w0, wzr, #0xffff 99 100 ands x0, x0, #0x00ffff00 101 ands w10, w23, #0x55555555 102 103 orr x0, x0, #0xffff 104 orr w0, wzr, #0xffff 105 106 eor x0, x0, #0x00ffff00 107 eor w10, w23, #0x55555555 108 109 sbfm x0, x0, #0x1, #0x2 110 sbfm w0, w0, #0xf, #0x9 111 bfm x0, x0, #0x1, #0x2 112 bfm w0, w0, #0xf, #0x9 113 ubfm x0, x0, #0x1, #0x2 114 ubfm w0, w0, #0xf, #0x9 115 116 movn x0, #0xffff 117 movn x0, #0xffff, LSL #16 118 movn w0, #0xffff 119 movn w0, #0xffff, LSL #16 120 121 movz x0, #0xffff 122 movz x0, #0xffff, LSL #48 123 movz w0, #0xffff 124 movz w0, #0xffff, LSL #16 125 126 movk x0, #0xffff 127 movk x0, #0xffff, LSL #32 128 movk w0, #0xffff 129 movk w0, #0xffff, LSL #16 130 131 ; Logical instructions with a shifted register 132 and w0, w0, w27 133 and w0, w1, w28, LSL #1 134 and w0, w1, w28, LSL #31 135 and w0, w1, w28, LSR #1 136 and w0, w1, w28, LSR #31 137 and w0, w1, w28, ASR #1 138 and w0, w1, w28, ASR #31 139 and w0, w1, w28, ROR #1 140 and w0, w1, w28, ROR #31 141 142 and x0, x0, x27 143 and x0, x1, x28, LSL #1 144 and x0, x1, x28, LSL #63 145 and x0, x1, x28, LSR #1 146 and x0, x1, x28, LSR #63 147 and x0, x1, x28, ASR #1 148 and x0, x1, x28, ASR #63 149 and x0, x1, x28, ROR #1 150 and x0, x1, x28, ROR #63 151 152 orr w0, w0, w27 153 orr w0, w1, w28, LSL #1 154 orr w0, w1, w28, LSL #31 155 orr w0, w1, w28, LSR #1 156 orr w0, w1, w28, LSR #31 157 orr w0, w1, w28, ASR #1 158 orr w0, w1, w28, ASR #31 159 orr w0, w1, w28, ROR #1 160 orr w0, w1, w28, ROR #31 161 162 orr x0, x0, x27 163 orr x0, x1, x28, LSL #1 164 orr x0, x1, x28, LSL #63 165 orr x0, x1, x28, LSR #1 166 orr x0, x1, x28, LSR #63 167 orr x0, x1, x28, ASR #1 168 orr x0, x1, x28, ASR #63 169 orr x0, x1, x28, ROR #1 170 orr x0, x1, x28, ROR #63 171 172 eor w0, w0, w27 173 eor w0, w1, w28, LSL #1 174 eor w0, w1, w28, LSL #31 175 eor w0, w1, w28, LSR #1 176 eor w0, w1, w28, LSR #31 177 eor w0, w1, w28, ASR #1 178 eor w0, w1, w28, ASR #31 179 eor w0, w1, w28, ROR #1 180 eor w0, w1, w28, ROR #31 181 182 eor x0, x0, x27 183 eor x0, x1, x28, LSL #1 184 eor x0, x1, x28, LSL #63 185 eor x0, x1, x28, LSR #1 186 eor x0, x1, x28, LSR #63 187 eor x0, x1, x28, ASR #1 188 eor x0, x1, x28, ASR #63 189 eor x0, x1, x28, ROR #1 190 eor x0, x1, x28, ROR #63 191 192 ands x0, x0, x27 193 ands x0, x1, x28, LSL #1 194 ands x0, x1, x28, LSL #63 195 ands x0, x1, x28, LSR #1 196 ands x0, x1, x28, LSR #63 197 ands x0, x1, x28, ASR #1 198 ands x0, x1, x28, ASR #63 199 ands x0, x1, x28, ROR #1 200 ands x0, x1, x28, ROR #63 201 202 bic w0, w0, w27 203 bic w0, w1, w28, LSL #1 204 bic w0, w1, w28, LSL #31 205 bic w0, w1, w28, LSR #1 206 bic w0, w1, w28, LSR #31 207 bic w0, w1, w28, ASR #1 208 bic w0, w1, w28, ASR #31 209 bic w0, w1, w28, ROR #1 210 bic w0, w1, w28, ROR #31 211 212 bic x0, x0, x27 213 bic x0, x1, x28, LSL #1 214 bic x0, x1, x28, LSL #63 215 bic x0, x1, x28, LSR #1 216 bic x0, x1, x28, LSR #63 217 bic x0, x1, x28, ASR #1 218 bic x0, x1, x28, ASR #63 219 bic x0, x1, x28, ROR #1 220 bic x0, x1, x28, ROR #63 221 222 orn w0, w0, w27 223 orn w0, w1, w28, LSL #1 224 orn w0, w1, w28, LSL #31 225 orn w0, w1, w28, LSR #1 226 orn w0, w1, w28, LSR #31 227 orn w0, w1, w28, ASR #1 228 orn w0, w1, w28, ASR #31 229 orn w0, w1, w28, ROR #1 230 orn w0, w1, w28, ROR #31 231 232 orn x0, x0, x27 233 orn x0, x1, x28, LSL #1 234 orn x0, x1, x28, LSL #63 235 orn x0, x1, x28, LSR #1 236 orn x0, x1, x28, LSR #63 237 orn x0, x1, x28, ASR #1 238 orn x0, x1, x28, ASR #63 239 orn x0, x1, x28, ROR #1 240 orn x0, x1, x28, ROR #63 241 242 eon w0, w0, w27 243 eon w0, w1, w28, LSL #1 244 eon w0, w1, w28, LSL #31 245 eon w0, w1, w28, LSR #1 246 eon w0, w1, w28, LSR #31 247 eon w0, w1, w28, ASR #1 248 eon w0, w1, w28, ASR #31 249 eon w0, w1, w28, ROR #1 250 eon w0, w1, w28, ROR #31 251 252 eon x0, x0, x27 253 eon x0, x1, x28, LSL #1 254 eon x0, x1, x28, LSL #63 255 eon x0, x1, x28, LSR #1 256 eon x0, x1, x28, LSR #63 257 eon x0, x1, x28, ASR #1 258 eon x0, x1, x28, ASR #63 259 eon x0, x1, x28, ROR #1 260 eon x0, x1, x28, ROR #63 261 262 bics w0, w0, w27 263 bics w0, w1, w28, LSL #1 264 bics w0, w1, w28, LSL #31 265 bics w0, w1, w28, LSR #1 266 bics w0, w1, w28, LSR #31 267 bics w0, w1, w28, ASR #1 268 bics w0, w1, w28, ASR #31 269 bics w0, w1, w28, ROR #1 270 bics w0, w1, w28, ROR #31 271 272 bics x0, x0, x27 273 bics x0, x1, x28, LSL #1 274 bics x0, x1, x28, LSL #63 275 bics x0, x1, x28, LSR #1 276 bics x0, x1, x28, LSR #63 277 bics x0, x1, x28, ASR #1 278 bics x0, x1, x28, ASR #63 279 bics x0, x1, x28, ROR #1 280 bics x0, x1, x28, ROR #63 281 282 ; 283 ; Keep last so the testcase can catch errors in 284 ; the disassembly of the last instruction. 285 ; 286 nop 75 287 76 288 .private_extern _TestProcA64_EndProc
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