Changeset 106649 in vbox for trunk/src/VBox/Disassembler
- Timestamp:
- Oct 24, 2024 9:28:23 AM (3 months ago)
- Location:
- trunk/src/VBox/Disassembler
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/DisasmCore-armv8.cpp
r106626 r106649 84 84 static FNDISPARSEARMV8 disArmV8ParseGprSp; 85 85 static FNDISPARSEARMV8 disArmV8ParseGprOff; 86 static FNDISPARSEARMV8 disArmV8ParseAddrGprSp; 87 static FNDISPARSEARMV8 disArmV8ParseRegFixed31; 86 88 static FNDISPARSEARMV8 disArmV8ParseImmsImmrN; 87 89 static FNDISPARSEARMV8 disArmV8ParseHw; … … 135 137 disArmV8ParseGprSp, 136 138 disArmV8ParseGprOff, 139 disArmV8ParseAddrGprSp, 140 disArmV8ParseRegFixed31, 137 141 disArmV8ParseImmsImmrN, 138 142 disArmV8ParseHw, … … 224 228 225 229 AssertReturn(pInsnParm->idxBitStart + pInsnParm->cBits < 32, VERR_INTERNAL_ERROR_2); 226 230 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 231 232 pParam->armv8.enmType = kDisArmv8OpParmImm; 227 233 pParam->uValue = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 228 234 if (pInsnParm->cBits <= 8) … … 253 259 254 260 AssertReturn(pInsnParm->idxBitStart + pInsnParm->cBits < 32, VERR_INTERNAL_ERROR_2); 255 261 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 262 263 pParam->armv8.enmType = kDisArmv8OpParmImmRel; 256 264 pParam->uValue = (int64_t)disArmV8ExtractBitVecFromInsnSignExtend(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 257 265 if (pInsnParm->cBits <= 8) … … 281 289 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit, pInsnParm); 282 290 291 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 292 293 pParam->armv8.enmType = kDisArmv8OpParmImmRel; 283 294 pParam->uValue = disArmV8ExtractBitVecFromInsn(u32Insn, 5, 19); 284 295 pParam->uValue |= disArmV8ExtractBitVecFromInsn(u32Insn, 29, 2) << 29; … … 292 303 RT_NOREF(pDis, u32Insn, pOp, pInsnClass, pf64Bit, pInsnParm); 293 304 305 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 306 307 pParam->armv8.enmType = kDisArmv8OpParmImm; 294 308 pParam->uValue = 0; 295 309 pParam->fUse |= DISUSE_IMMEDIATE8; … … 301 315 { 302 316 RT_NOREF(pDis, pOp, pInsnClass); 317 318 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 319 320 pParam->armv8.enmType = kDisArmv8OpParmReg; 321 303 322 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 304 323 if (*pf64Bit || (pParam->armv8.enmType == kDisArmv8OpParmAddrInGpr)) … … 313 332 { 314 333 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit); 334 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 335 336 pParam->armv8.enmType = kDisArmv8OpParmReg; 315 337 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 316 338 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Gpr_32Bit; … … 322 344 { 323 345 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit); 346 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 347 348 pParam->armv8.enmType = kDisArmv8OpParmReg; 324 349 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 325 350 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Gpr_64Bit; … … 331 356 { 332 357 RT_NOREF(pDis, pOp, pInsnClass); 358 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 359 360 pParam->armv8.enmType = kDisArmv8OpParmReg; 333 361 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 334 362 if (pParam->armv8.Op.Reg.idReg == 31) 335 363 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Sp; 336 else if (*pf64Bit || (pParam->armv8.enmType == kDisArmv8OpParmAddrInGpr))364 else if (*pf64Bit) 337 365 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Gpr_64Bit; 338 366 else … … 345 373 { 346 374 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit); 375 Assert(pParam->armv8.enmType != kDisArmv8OpParmNone); 376 347 377 pParam->armv8.GprIndex.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 348 378 pParam->armv8.GprIndex.enmRegType = kDisOpParamArmV8RegType_Gpr_64Bit; /* Might get overwritten later on. */ … … 352 382 353 383 384 static int disArmV8ParseAddrGprSp(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 385 { 386 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit); 387 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 388 389 pParam->armv8.enmType = kDisArmv8OpParmAddrInGpr; 390 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 391 if (pParam->armv8.Op.Reg.idReg == 31) 392 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Sp; 393 else 394 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Gpr_64Bit; 395 return VINF_SUCCESS; 396 } 397 398 399 static int disArmV8ParseRegFixed31(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 400 { 401 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit); 402 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 403 404 if (disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits) != 31) 405 return VERR_DIS_INVALID_OPCODE; 406 return VINF_SUCCESS; 407 } 408 409 354 410 static int disArmV8ParseImmsImmrN(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit) 355 411 { 356 412 RT_NOREF(pDis, pOp, pInsnClass); 357 413 AssertReturn(pInsnParm->cBits == 13, VERR_INTERNAL_ERROR_2); 414 415 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 416 pParam->armv8.enmType = kDisArmv8OpParmImm; 358 417 359 418 uint32_t u32ImmRaw = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); … … 405 464 { 406 465 /* Conditional as a parameter (CCMP/CCMN). */ 407 Assert(pParam->armv8.enmType == kDisArmv8OpParmCond); 466 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 467 pParam->armv8.enmType = kDisArmv8OpParmCond; 408 468 pParam->armv8.Op.enmCond = (DISARMV8INSTRCOND)disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 409 469 } … … 420 480 uint32_t u32Op2 = disArmV8ExtractBitVecFromInsn(u32Insn, 5, 3); 421 481 482 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 422 483 Assert(pDis->aParams[1].armv8.enmType == kDisArmv8OpParmImm); 423 484 Assert(pDis->aParams[1].armv8.cb == sizeof(uint8_t)); 424 485 Assert(pDis->aParams[1].uValue < 16); /* 4 bit field. */ 425 486 487 pParam->armv8.enmType = kDisArmv8OpParmPState; 426 488 uint8_t bCRm = (uint8_t)pDis->aParams[1].uValue; 427 489 … … 475 537 AssertReturn(pInsnParm->cBits == 15, VERR_INTERNAL_ERROR_2); 476 538 539 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 540 pParam->armv8.enmType = kDisArmv8OpParmSysReg; 541 477 542 /* Assumes a op0:op1:CRn:CRm:op2 encoding in the instruction starting at the given bit position. */ 478 543 uint32_t u32ImmRaw = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); … … 492 557 RT_NOREF(pDis, pOp, pInsnClass, pf64Bit); 493 558 Assert(pInsnParm->cBits == 1); 559 Assert(pParam->armv8.enmType == kDisArmv8OpParmImm); 560 494 561 if (u32Insn & RT_BIT_32(pInsnParm->idxBitStart)) 495 562 { … … 527 594 528 595 AssertReturn(!pInsnParm->idxBitStart && !pInsnParm->cBits, VERR_INTERNAL_ERROR_2); 596 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 597 pParam->armv8.enmType = kDisArmv8OpParmImm; 529 598 530 599 pParam->uValue = disArmV8ExtractBitVecFromInsn(u32Insn, 19, 5); … … 567 636 return VERR_DIS_INVALID_OPCODE; 568 637 638 Assert(pParam->armv8.enmType != kDisArmv8OpParmNone); 569 639 Assert(pParam->armv8.enmExtend != kDisArmv8OpParmExtendNone); 570 640 Assert(u32Amount < 64); … … 583 653 AssertReturn(pInsnParm->cBits <= 12, VERR_INTERNAL_ERROR_2); 584 654 AssertReturn(pDis->armv8.cbOperand != 0, VERR_INTERNAL_ERROR_2); 655 Assert(pParam->armv8.enmType != kDisArmv8OpParmNone); 585 656 586 657 pParam->armv8.u.offBase = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); … … 607 678 || (pOp->fFlags & DISARMV8INSNCLASS_F_FORCED_64BIT), 608 679 VERR_INTERNAL_ERROR_2); 680 Assert(pParam->armv8.enmType != kDisArmv8OpParmNone); 609 681 610 682 pParam->armv8.cb = sizeof(int16_t); … … 630 702 631 703 AssertReturn(pInsnParm->cBits == 3, VERR_INTERNAL_ERROR_2); 704 Assert(pParam->armv8.enmType != kDisArmv8OpParmNone); 705 632 706 uint32_t u32Opt = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 633 707 … … 661 735 662 736 AssertReturn(pInsnParm->cBits == 1, VERR_INTERNAL_ERROR_2); 737 Assert(pParam->armv8.enmType != kDisArmv8OpParmNone); 738 663 739 bool const fS = RT_BOOL(u32Insn & RT_BIT_32(pInsnParm->idxBitStart)); 664 740 … … 711 787 712 788 Assert(pDis->armv8.enmFpType == kDisArmv8InstrFpType_Invalid); 789 713 790 uint32_t u32FpType = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 714 791 switch (u32FpType) … … 728 805 729 806 Assert(pDis->armv8.enmFpType != kDisArmv8InstrFpType_Invalid); 807 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 808 809 pParam->armv8.enmType = kDisArmv8OpParmReg; 730 810 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 731 811 switch (pDis->armv8.enmFpType) … … 744 824 RT_NOREF(pDis, pOp, pInsnClass); 745 825 Assert(pDis->armv8.enmFpType != kDisArmv8InstrFpType_Invalid); 746 826 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 827 828 pParam->armv8.enmType = kDisArmv8OpParmImm; 747 829 uint32_t u32Scale = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 748 830 if ( !*pf64Bit … … 794 876 RT_NOREF(pDis, pOp, pInsnClass, pParam, pInsnParm, pf64Bit); 795 877 878 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 879 880 pParam->armv8.enmType = kDisArmv8OpParmReg; 796 881 pParam->armv8.Op.Reg.idReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 797 882 pParam->armv8.Op.Reg.enmRegType = kDisOpParamArmV8RegType_Simd_Scalar_64Bit; … … 805 890 806 891 Assert(pInsnParm->cBits == 7); 892 Assert(pParam->armv8.enmType == kDisArmv8OpParmNone); 893 807 894 uint32_t u32ImmRaw = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits); 808 895 if (!(u32ImmRaw & RT_BIT_32(6))) /* immh == 0xxx is reserved for the scalar variant. */ 809 896 return VERR_DIS_INVALID_OPCODE; 810 897 898 pParam->armv8.enmType = kDisArmv8OpParmImm; 811 899 pParam->uValue = 2 * 64 - u32ImmRaw; 812 900 pParam->armv8.cb = sizeof(uint8_t); … … 948 1036 pDis->aParams[2].fUse = 0; 949 1037 pDis->aParams[3].fUse = 0; 950 pDis->aParams[0].armv8.enmType = pInsnClass->aenmParamTypes[0];951 pDis->aParams[1].armv8.enmType = pInsnClass->aenmParamTypes[1];952 pDis->aParams[2].armv8.enmType = pInsnClass->aenmParamTypes[2];953 pDis->aParams[3].armv8.enmType = pInsnClass->aenmParamTypes[3];1038 pDis->aParams[0].armv8.enmType = kDisArmv8OpParmNone; 1039 pDis->aParams[1].armv8.enmType = kDisArmv8OpParmNone; 1040 pDis->aParams[2].armv8.enmType = kDisArmv8OpParmNone; 1041 pDis->aParams[3].armv8.enmType = kDisArmv8OpParmNone; 954 1042 pDis->aParams[0].armv8.enmExtend = kDisArmv8OpParmExtendNone; 955 1043 pDis->aParams[1].armv8.enmExtend = kDisArmv8OpParmExtendNone; -
trunk/src/VBox/Disassembler/DisasmInternal-armv8.h
r106626 r106649 61 61 kDisParmParseGprSp, 62 62 kDisParmParseGprOff, 63 kDisParmParseAddrGprSp, 64 kDisParmParseRegFixed31, 63 65 kDisParmParseImmsImmrN, 64 66 kDisParmParseHw, … … 192 194 /** Number of bits to shift to get an index. */ 193 195 uint32_t cShift; 194 /** Parameter types. */195 DISARMV8OPPARM aenmParamTypes[4];196 196 /** The array of decoding steps. */ 197 197 PCDISARMV8INSNPARAM paParms; … … 218 218 }; \ 219 219 static const DISARMV8OPCODE g_aArmV8A64Insn ## a_Name ## Opcodes[] = { 220 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_4(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \ 221 a_enmParamType1, a_enmParamType2, a_enmParamType3, a_enmParamType4) \ 220 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift) \ 222 221 }; \ 223 222 static const DISARMV8INSNCLASS g_aArmV8A64Insn ## a_Name = { { kDisArmV8DecodeType_InsnClass, \ … … 225 224 & g_aArmV8A64Insn ## a_Name ## Opcodes[0], \ 226 225 a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \ 227 { a_enmParamType1, a_enmParamType2, a_enmParamType3, a_enmParamType4 }, \228 226 & g_aArmV8A64Insn ## a_Name ## Decode[0] } 229 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \230 a_enmParamType1, a_enmParamType2, a_enmParamType3) \231 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_4(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \232 a_enmParamType1, a_enmParamType2, a_enmParamType3, kDisArmv8OpParmNone)233 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \234 a_enmParamType1, a_enmParamType2) \235 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \236 a_enmParamType1, a_enmParamType2, kDisArmv8OpParmNone)237 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \238 a_enmParamType1) \239 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \240 a_enmParamType1, kDisArmv8OpParmNone)241 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_0(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift) \242 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(a_Name, a_fFixedInsn, a_enmOpcDecode, a_fMask, a_cShift, \243 kDisArmv8OpParmNone)244 245 246 #define DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END \247 DIS_ARMV8_INSN_PARAM_NONE }248 227 249 228 /** -
trunk/src/VBox/Disassembler/DisasmTables-armv8-a64-simd-fp.cpp.h
r106626 r106649 90 90 INVALID_OPCODE, 91 91 INVALID_OPCODE, 92 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(DataProcFpFixedPConvGpr2FpReg, 0x7f3f0000 /*fFixedInsn*/, 93 kDisArmV8OpcDecodeNop, 94 RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18), 16, 95 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm); 92 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpFixedPConvGpr2FpReg, 0x7f3f0000 /*fFixedInsn*/, 93 kDisArmV8OpcDecodeNop, 94 RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18), 16); 96 95 97 96 … … 116 115 INVALID_OPCODE, 117 116 INVALID_OPCODE, 118 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(DataProcFpFixedPConvFpReg2Gpr, 0x7f3f0000 /*fFixedInsn*/, 119 kDisArmV8OpcDecodeNop, 120 RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18), 16, 121 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm); 117 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpFixedPConvFpReg2Gpr, 0x7f3f0000 /*fFixedInsn*/, 118 kDisArmV8OpcDecodeNop, 119 RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18), 16); 122 120 123 121 … … 154 152 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(DataProcFpConvInt) /** @todo */ 155 153 INVALID_OPCODE, 156 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(DataProcFpConvInt, 0xff3ffc00 /*fFixedInsn*/, 157 kDisArmV8OpcDecodeNop, 158 RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18) | RT_BIT_32(19) | RT_BIT_32(20), 16, 159 kDisArmv8OpParmReg, kDisArmv8OpParmReg); 154 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpConvInt, 0xff3ffc00 /*fFixedInsn*/, 155 kDisArmV8OpcDecodeNop, 156 RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18) | RT_BIT_32(19) | RT_BIT_32(20), 16); 160 157 161 158 … … 173 170 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(DataProcFpCondSelect) 174 171 DIS_ARMV8_OP(0x1e200c00, "fcsel", OP_ARMV8_A64_FCSEL, DISOPTYPE_HARMLESS), 175 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_4(DataProcFpCondSelect, 0xff200c00 /*fFixedInsn*/, 176 kDisArmV8OpcDecodeNop, 177 RT_BIT_32(29), 29, 178 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmCond); 172 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpCondSelect, 0xff200c00 /*fFixedInsn*/, 173 kDisArmV8OpcDecodeNop, 174 RT_BIT_32(29), 29); 179 175 180 176 … … 200 196 DIS_ARMV8_OP(0x1e208800, "fnmul", OP_ARMV8_A64_FNMUL, DISOPTYPE_HARMLESS), 201 197 /* Rest of the 4 bit block is invalid */ 202 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(DataProcFpDataProc2Src, 0xff20fc00 /*fFixedInsn*/, 203 kDisArmV8OpcDecodeNop, 204 RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 12, 205 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 198 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpDataProc2Src, 0xff20fc00 /*fFixedInsn*/, 199 kDisArmV8OpcDecodeNop, 200 RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 12); 206 201 207 202 … … 239 234 DIS_ARMV8_OP(0x1e294000, "frint64z", OP_ARMV8_A64_FRINT64Z, DISOPTYPE_HARMLESS), 240 235 DIS_ARMV8_OP(0x1e29c000, "frint64x", OP_ARMV8_A64_FRINT64X, DISOPTYPE_HARMLESS), 241 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(DataProcFpDataProc1Src, 0xff3ffc00 /*fFixedInsn*/, 242 kDisArmV8OpcDecodeNop, 243 RT_BIT_32(15) | RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18) | RT_BIT_32(19) | RT_BIT_32(20), 15, 244 kDisArmv8OpParmReg, kDisArmv8OpParmReg); 236 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpDataProc1Src, 0xff3ffc00 /*fFixedInsn*/, 237 kDisArmV8OpcDecodeNop, 238 RT_BIT_32(15) | RT_BIT_32(16) | RT_BIT_32(17) | RT_BIT_32(18) | RT_BIT_32(19) | RT_BIT_32(20), 15); 245 239 246 240 … … 259 253 DIS_ARMV8_OP(0x1e202000, "fcmp", OP_ARMV8_A64_FCMP, DISOPTYPE_HARMLESS), 260 254 DIS_ARMV8_OP(0x1e202010, "fcmpe", OP_ARMV8_A64_FCMPE, DISOPTYPE_HARMLESS), 261 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(DataProcFpCmpReg, 0xff20fc1f /*fFixedInsn*/, 262 kDisArmV8OpcDecodeNop, 263 RT_BIT_32(4), 4, 264 kDisArmv8OpParmReg, kDisArmv8OpParmReg); 255 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpCmpReg, 0xff20fc1f /*fFixedInsn*/, 256 kDisArmV8OpcDecodeNop, 257 RT_BIT_32(4), 4); 265 258 266 259 … … 279 272 DIS_ARMV8_OP(0x1e202008, "fcmp", OP_ARMV8_A64_FCMP, DISOPTYPE_HARMLESS), 280 273 DIS_ARMV8_OP(0x1e202018, "fcmpe", OP_ARMV8_A64_FCMPE, DISOPTYPE_HARMLESS), 281 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(DataProcFpCmpZero, 0xff20fc1f /*fFixedInsn*/, 282 kDisArmV8OpcDecodeNop, 283 RT_BIT_32(4), 4, 284 kDisArmv8OpParmReg, kDisArmv8OpParmImm); 274 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpCmpZero, 0xff20fc1f /*fFixedInsn*/, 275 kDisArmV8OpcDecodeNop, 276 RT_BIT_32(4), 4); 285 277 286 278 … … 307 299 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(DataProcFpImm) 308 300 DIS_ARMV8_OP(0x1e201000, "fmov", OP_ARMV8_A64_FMOV, DISOPTYPE_HARMLESS), 309 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(DataProcFpImm, 0xff201fe0 /*fFixedInsn*/, 310 kDisArmV8OpcDecodeNop, 311 RT_BIT_32(5) | RT_BIT_32(6) | RT_BIT_32(7) | RT_BIT_32(8) | RT_BIT_32(9), 5, 312 kDisArmv8OpParmReg, kDisArmv8OpParmImm); 301 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpImm, 0xff201fe0 /*fFixedInsn*/, 302 kDisArmV8OpcDecodeNop, 303 RT_BIT_32(5) | RT_BIT_32(6) | RT_BIT_32(7) | RT_BIT_32(8) | RT_BIT_32(9), 5); 313 304 314 305 … … 329 320 DIS_ARMV8_OP(0x1e200400, "fccmp", OP_ARMV8_A64_FCCMP, DISOPTYPE_HARMLESS), 330 321 DIS_ARMV8_OP(0x1e200410, "fccmpe", OP_ARMV8_A64_FCCMPE, DISOPTYPE_HARMLESS), 331 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_4(DataProcFpCondCmp, 0xff200c10 /*fFixedInsn*/, 332 kDisArmV8OpcDecodeNop, 333 RT_BIT_32(4), 4, 334 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm, kDisArmv8OpParmCond); 322 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpCondCmp, 0xff200c10 /*fFixedInsn*/, 323 kDisArmV8OpcDecodeNop, 324 RT_BIT_32(4), 4); 335 325 336 326 … … 448 438 DIS_ARMV8_OP(0x1f200000, "fnmadd", OP_ARMV8_A64_FNMADD, DISOPTYPE_HARMLESS), 449 439 DIS_ARMV8_OP(0x1f208000, "fnmsub", OP_ARMV8_A64_FNMSUB, DISOPTYPE_HARMLESS), 450 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_4(DataProcFpDataProc3Src, 0xff208000 /*fFixedInsn*/, 451 kDisArmV8OpcDecodeCollate, 452 RT_BIT_32(15) | RT_BIT_32(21), 15, 453 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 440 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcFpDataProc3Src, 0xff208000 /*fFixedInsn*/, 441 kDisArmV8OpcDecodeCollate, 442 RT_BIT_32(15) | RT_BIT_32(21), 15); 454 443 455 444 … … 506 495 DIS_ARMV8_OP(0x5f009c00, "sqrshrn", OP_ARMV8_A64_SQRSHRN, DISOPTYPE_HARMLESS), 507 496 #endif 508 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(DataProcSimdScalarShiftByImm, 0xff80fc00 /*fFixedInsn*/, 509 kDisArmV8OpcDecodeCollate, 510 /* opcode */ RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15) 511 /* U */ | RT_BIT_32(29), 11, 512 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm); 497 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DataProcSimdScalarShiftByImm, 0xff80fc00 /*fFixedInsn*/, 498 kDisArmV8OpcDecodeCollate, 499 /* opcode */ RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15) 500 /* U */ | RT_BIT_32(29), 11); 513 501 514 502 -
trunk/src/VBox/Disassembler/DisasmTables-armv8-a64.cpp
r106632 r106649 70 70 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Rsvd) 71 71 DIS_ARMV8_OP(0x00000000, "udf" , OP_ARMV8_A64_UDF, DISOPTYPE_INVALID) 72 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(Rsvd, 0xffff0000 /*fFixedInsn*/, 73 kDisArmV8OpcDecodeNop, 0xffff0000, 16, 74 kDisArmv8OpParmImm); 72 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Rsvd, 0xffff0000 /*fFixedInsn*/, 73 kDisArmV8OpcDecodeNop, 0xffff0000, 16); 75 74 76 75 /* ADR/ADRP */ … … 81 80 DIS_ARMV8_OP(0x10000000, "adr" , OP_ARMV8_A64_ADR, DISOPTYPE_HARMLESS), 82 81 DIS_ARMV8_OP(0x90000000, "adrp" , OP_ARMV8_A64_ADRP, DISOPTYPE_HARMLESS) 83 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(Adr, 0x9f000000 /*fFixedInsn*/, 84 kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31, 85 kDisArmv8OpParmReg, kDisArmv8OpParmImmRel); 82 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Adr, 0x9f000000 /*fFixedInsn*/, 83 kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31); 86 84 87 85 … … 98 96 DIS_ARMV8_OP(0x51000000, "sub" , OP_ARMV8_A64_SUB, DISOPTYPE_HARMLESS), 99 97 DIS_ARMV8_OP(0x71000000, "subs" , OP_ARMV8_A64_SUBS, DISOPTYPE_HARMLESS), 100 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(AddSubImm, 0x7f800000 /*fFixedInsn*/, 101 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, 102 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm); 98 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(AddSubImm, 0x7f800000 /*fFixedInsn*/, 99 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29); 103 100 104 101 … … 116 113 DIS_ARMV8_OP(0x4b000000, "sub" , OP_ARMV8_A64_SUB, DISOPTYPE_HARMLESS), 117 114 DIS_ARMV8_OP(0x6b000000, "subs" , OP_ARMV8_A64_SUBS, DISOPTYPE_HARMLESS), 118 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(AddSubShiftReg, 0x7f200000 /*fFixedInsn*/, 119 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, 120 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 115 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(AddSubShiftReg, 0x7f200000 /*fFixedInsn*/, 116 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29); 121 117 122 118 … … 132 128 DIS_ARMV8_OP(0x52000000, "eor" , OP_ARMV8_A64_EOR, DISOPTYPE_HARMLESS), 133 129 DIS_ARMV8_OP(0x72000000, "ands" , OP_ARMV8_A64_ANDS, DISOPTYPE_HARMLESS), 134 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LogicalImm, 0x7f800000 /*fFixedInsn*/, 135 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, 136 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm); 130 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LogicalImm, 0x7f800000 /*fFixedInsn*/, 131 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29); 137 132 138 133 … … 148 143 DIS_ARMV8_OP(0x52800000, "movz" , OP_ARMV8_A64_MOVZ, DISOPTYPE_HARMLESS), 149 144 DIS_ARMV8_OP(0x72800000, "movk" , OP_ARMV8_A64_MOVK, DISOPTYPE_HARMLESS), 150 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(MoveWide, 0x7f800000 /*fFixedInsn*/, 151 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, 152 kDisArmv8OpParmReg, kDisArmv8OpParmImm); 145 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(MoveWide, 0x7f800000 /*fFixedInsn*/, 146 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29); 153 147 154 148 … … 165 159 DIS_ARMV8_OP(0x53000000, "ubfm", OP_ARMV8_A64_UBFM, DISOPTYPE_HARMLESS), 166 160 INVALID_OPCODE, 167 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_4(Bitfield, 0x7f800000 /*fFixedInsn*/, 168 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, 169 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm, kDisArmv8OpParmImm); 161 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Bitfield, 0x7f800000 /*fFixedInsn*/, 162 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29); 170 163 171 164 … … 203 196 DIS_ARMV8_OP(0x54000000, "b", OP_ARMV8_A64_B, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW), 204 197 DIS_ARMV8_OP(0x54000010, "bc" , OP_ARMV8_A64_BC, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW | DISOPTYPE_RELATIVE_CONTROLFLOW | DISOPTYPE_COND_CONTROLFLOW), 205 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(CondBr, 0xff000010 /*fFixedInsn*/, 206 kDisArmV8OpcDecodeNop, RT_BIT_32(4), 4, 207 kDisArmv8OpParmImmRel); 198 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(CondBr, 0xff000010 /*fFixedInsn*/, 199 kDisArmV8OpcDecodeNop, RT_BIT_32(4), 4); 208 200 209 201 … … 221 213 DIS_ARMV8_OP(0xd4a00002, "dcps2", OP_ARMV8_A64_DCPS2, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 222 214 DIS_ARMV8_OP(0xd4a00003, "dcps3", OP_ARMV8_A64_DCPS3, DISOPTYPE_CONTROLFLOW | DISOPTYPE_INTERRUPT), 223 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(Excp, 0xffe0001f /*fFixedInsn*/, 224 kDisArmV8OpcDecodeLookup, 0xffe0001f, 0, 225 kDisArmv8OpParmImm); 215 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Excp, 0xffe0001f /*fFixedInsn*/, 216 kDisArmV8OpcDecodeLookup, 0xffe0001f, 0); 226 217 227 218 … … 232 223 DIS_ARMV8_OP(0xd5031000, "wfet", OP_ARMV8_A64_WFET, DISOPTYPE_HARMLESS), /* FEAT_WFxT */ 233 224 DIS_ARMV8_OP(0x54000010, "wfit" , OP_ARMV8_A64_WFIT, DISOPTYPE_HARMLESS), /* FEAT_WFxT */ 234 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(SysReg, 0xffffffe0 /*fFixedInsn*/, 235 kDisArmV8OpcDecodeNop, 0xfe0, 5, 236 kDisArmv8OpParmReg); 225 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(SysReg, 0xffffffe0 /*fFixedInsn*/, 226 kDisArmV8OpcDecodeNop, 0xfe0, 5); 237 227 238 228 … … 281 271 INVALID_OPCODE, 282 272 DIS_ARMV8_OP(0xd503251f, "chkfeat x16", OP_ARMV8_A64_CHKFEAT, DISOPTYPE_HARMLESS), /* FEAT_CHK */ 283 284 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_0(Hints, 0xffffffff /*fFixedInsn*/, 285 kDisArmV8OpcDecodeNop, 0xfe0, 5); 273 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Hints, 0xffffffff /*fFixedInsn*/, 274 kDisArmV8OpcDecodeNop, 0xfe0, 5); 286 275 287 276 … … 296 285 DIS_ARMV8_OP(0xD503309f, "dsb", OP_ARMV8_A64_DSB, DISOPTYPE_HARMLESS), 297 286 DIS_ARMV8_OP(0xd50330bf, "dmb", OP_ARMV8_A64_DMB, DISOPTYPE_HARMLESS), 298 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(DecBarriers, 0xfffff0ff /*fFixedInsn*/, 299 kDisArmV8OpcDecodeNop, RT_BIT_32(5) | RT_BIT_32(6) | RT_BIT_32(7), 5, 300 kDisArmv8OpParmImm); 287 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(DecBarriers, 0xfffff0ff /*fFixedInsn*/, 288 kDisArmV8OpcDecodeNop, RT_BIT_32(5) | RT_BIT_32(6) | RT_BIT_32(7), 5); 301 289 302 290 … … 320 308 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(PState) 321 309 DIS_ARMV8_OP(0xd500401f, "msr", OP_ARMV8_A64_MSR, DISOPTYPE_HARMLESS), 322 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(PState, 0xfff8f01f /*fFixedInsn*/, 323 kDisArmV8OpcDecodeNop, 0, 0, 324 kDisArmv8OpParmPState, kDisArmv8OpParmImm); 310 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(PState, 0xfff8f01f /*fFixedInsn*/, 311 kDisArmV8OpcDecodeNop, 0, 0); 325 312 326 313 … … 331 318 DIS_ARMV8_OP(0xd5233060, "tstart", OP_ARMV8_A64_TSTART, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), /* FEAT_TME */ 332 319 DIS_ARMV8_OP(0xd5233160, "ttest", OP_ARMV8_A64_TTEST, DISOPTYPE_HARMLESS), /* FEAT_TME */ 333 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(SysResult, 0xfffffffe /*fFixedInsn*/, 334 kDisArmV8OpcDecodeNop, RT_BIT_32(8) | RT_BIT_32(9) | RT_BIT_32(10) | RT_BIT_32(11), 8, 335 kDisArmv8OpParmReg); 320 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(SysResult, 0xfffffffe /*fFixedInsn*/, 321 kDisArmV8OpcDecodeNop, RT_BIT_32(8) | RT_BIT_32(9) | RT_BIT_32(10) | RT_BIT_32(11), 8); 336 322 337 323 … … 344 330 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Sys) 345 331 DIS_ARMV8_OP(0xd5080000, "sys", OP_ARMV8_A64_SYS, DISOPTYPE_HARMLESS), 346 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END _PARAMS_0(Sys, 0xfff80000 /*fFixedInsn*/,347 332 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Sys, 0xfff80000 /*fFixedInsn*/, 333 kDisArmV8OpcDecodeNop, 0, 0); /** @todo */ 348 334 349 335 … … 356 342 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(SysL) 357 343 DIS_ARMV8_OP(0xd5280000, "sysl", OP_ARMV8_A64_SYSL, DISOPTYPE_HARMLESS), 358 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END _PARAMS_0(SysL, 0xfff80000 /*fFixedInsn*/,359 344 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(SysL, 0xfff80000 /*fFixedInsn*/, 345 kDisArmV8OpcDecodeNop, 0, 0); /** @todo */ 360 346 361 347 … … 365 351 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 1 /*idxParam*/), 366 352 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Msr) 367 DIS_ARMV8_OP(0xd5100000, "msr", OP_ARMV8_A64_MSR, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), 368 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(Msr, 0xfff00000 /*fFixedInsn*/, 369 kDisArmV8OpcDecodeNop, 0, 0, 370 kDisArmv8OpParmSysReg, kDisArmv8OpParmReg); 353 DIS_ARMV8_OP(0xd5100000, "msr", OP_ARMV8_A64_MSR, DISOPTYPE_PRIVILEGED | DISOPTYPE_PRIVILEGED), 354 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Msr, 0xfff00000 /*fFixedInsn*/, 355 kDisArmV8OpcDecodeNop, 0, 0); 371 356 372 357 … … 376 361 DIS_ARMV8_INSN_DECODE(kDisParmParseSysReg, 5, 15, 1 /*idxParam*/), 377 362 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Mrs) 378 DIS_ARMV8_OP(0xd5300000, "mrs", OP_ARMV8_A64_MRS, DISOPTYPE_HARMLESS | DISOPTYPE_PRIVILEGED), 379 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(Mrs, 0xfff00000 /*fFixedInsn*/, 380 kDisArmV8OpcDecodeNop, 0, 0, 381 kDisArmv8OpParmReg, kDisArmv8OpParmSysReg); 382 383 384 /* BR/BRAA/BRAAZ/BRAB/BRABZ/BLR/BLRAA/BLRAAZ/BLRAB/BLRABZ/RET/RETAA/RETAB */ 385 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(BrBlrRet) 363 DIS_ARMV8_OP(0xd5300000, "mrs", OP_ARMV8_A64_MRS, DISOPTYPE_PRIVILEGED | DISOPTYPE_PRIVILEGED), 364 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Mrs, 0xfff00000 /*fFixedInsn*/, 365 kDisArmV8OpcDecodeNop, 0, 0); 366 367 368 /* BR/BRAAZ/BRABZ */ 369 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Br) 386 370 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 0 /*idxParam*/), 387 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Br BlrRet)371 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Br) 388 372 DIS_ARMV8_OP(0xd61f0000, "br", OP_ARMV8_A64_BR, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 373 INVALID_OPCODE, 374 DIS_ARMV8_OP(0xd61f081f, "braaz", OP_ARMV8_A64_BRAAZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 375 DIS_ARMV8_OP(0xd61f0c1f, "brabz", OP_ARMV8_A64_BRABZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 376 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Br, 0xfffffc1f /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 377 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 378 379 380 /* BLR/BLRAAZ/BLRABZ */ 381 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Blr) 382 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 0 /*idxParam*/), 383 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Blr) 389 384 DIS_ARMV8_OP(0xd63f0000, "blr", OP_ARMV8_A64_BLR, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 390 /** @todo All the FEAT_PAuth related branch instructions. */ 391 DIS_ARMV8_OP(0xd65f0000, "ret", OP_ARMV8_A64_RET, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 392 DIS_ARMV8_OP(0xd65f0800, "retaa", OP_ARMV8_A64_RETAA, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 393 DIS_ARMV8_OP(0xd65f0c00, "retab", OP_ARMV8_A64_RETAB, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 394 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(BrBlrRet, 0xfffffc1f /*fFixedInsn*/, 395 kDisArmV8OpcDecodeLookup, 0xfffffc1f, 0, 396 kDisArmv8OpParmReg); 385 INVALID_OPCODE, 386 DIS_ARMV8_OP(0xd63f081f, "blraaz", OP_ARMV8_A64_BLRAAZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 387 DIS_ARMV8_OP(0xd63f0c1f, "blrabz", OP_ARMV8_A64_BLRAAZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 388 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Blr, 0xfffffc1f /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 389 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 390 391 392 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Ret) 393 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 0 /*idxParam*/), 394 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(RetPAuth) 395 DIS_ARMV8_INSN_DECODE(kDisParmParseRegFixed31, 5, 5, 0 /*idxParam*/), 396 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Ret) 397 DIS_ARMV8_OP( 0xd65f0000, "ret", OP_ARMV8_A64_RET, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 398 INVALID_OPCODE, 399 DIS_ARMV8_OP_ALT_DECODE(0xd65f081f, "retaa", OP_ARMV8_A64_RETAA, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW, RetPAuth), 400 DIS_ARMV8_OP_ALT_DECODE(0xd65f0c1f, "retab", OP_ARMV8_A64_RETAB, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW, RetPAuth), 401 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Ret, 0xfffffc1f /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 402 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 403 404 405 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Eret) 406 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Eret) 407 DIS_ARMV8_OP(0xd69f03e0, "eret", OP_ARMV8_A64_ERET, DISOPTYPE_PRIVILEGED | DISOPTYPE_CONTROLFLOW), 408 INVALID_OPCODE, 409 DIS_ARMV8_OP(0xd69f0bff, "eretaa", OP_ARMV8_A64_ERETAA, DISOPTYPE_PRIVILEGED | DISOPTYPE_CONTROLFLOW), 410 DIS_ARMV8_OP(0xd69f0fff, "eretab", OP_ARMV8_A64_ERETAB, DISOPTYPE_PRIVILEGED | DISOPTYPE_CONTROLFLOW), 411 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Eret, 0xffffffff /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 412 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 413 414 415 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(Drps) 416 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Drps) 417 DIS_ARMV8_OP(0xd6bf03e0, "drps", OP_ARMV8_A64_DRPS, DISOPTYPE_PRIVILEGED | DISOPTYPE_CONTROLFLOW), 418 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Drps, 0xffffffff /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 419 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 420 421 422 /* BRAA/BRAB */ 423 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(BraaBrab) 424 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 0 /*idxParam*/), 425 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 0, 5, 1 /*idxParam*/), 426 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(BraaBrab) 427 INVALID_OPCODE, 428 INVALID_OPCODE, 429 DIS_ARMV8_OP(0xd71f0800, "braa", OP_ARMV8_A64_BRAA, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 430 DIS_ARMV8_OP(0xd71f0c00, "brab", OP_ARMV8_A64_BRAB, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 431 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(BraaBrab, 0xfffffc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 432 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 433 434 435 /* BRAA/BRAB */ 436 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(BlraaBlrab) /** @todo Could use the same decoder as for braa/brab and save a bit of table size. */ 437 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 5, 5, 0 /*idxParam*/), 438 DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 0, 5, 1 /*idxParam*/), 439 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(BlraaBlrab) 440 INVALID_OPCODE, 441 INVALID_OPCODE, 442 DIS_ARMV8_OP(0xd73f0800, "blraa", OP_ARMV8_A64_BLRAA, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 443 DIS_ARMV8_OP(0xd73f0c00, "blrab", OP_ARMV8_A64_BLRAB, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 444 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(BlraaBlrab, 0xfffffc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 445 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 397 446 398 447 399 448 /* Unconditional branch (register) instructions, we divide these instructions further based on the opc field. */ 400 449 DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(UncondBrReg) 401 DIS_ARMV8_DECODE_MAP_ENTRY(BrBlrRet), /* BR/BRAA/BRAAZ/BRAB/BRABZ */ 402 DIS_ARMV8_DECODE_MAP_ENTRY(BrBlrRet), /* BLR/BLRAA/BLRAAZ/BLRAB/BLRABZ */ 403 DIS_ARMV8_DECODE_MAP_ENTRY(BrBlrRet), /* RET/RETAA/RETAB */ 450 DIS_ARMV8_DECODE_MAP_ENTRY(Br), /* BR/BRAAZ/BRABZ */ 451 DIS_ARMV8_DECODE_MAP_ENTRY(Blr), /* BLR/BLRAA/BLRAAZ/BLRAB/BLRABZ */ 452 DIS_ARMV8_DECODE_MAP_ENTRY(Ret), /* RET/RETAA/RETAB */ 453 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 454 DIS_ARMV8_DECODE_MAP_ENTRY(Eret), /* ERET/ERETAA/ERETAB */ 455 DIS_ARMV8_DECODE_MAP_ENTRY(Drps), /* DRPS */ 404 456 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 405 457 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 406 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 407 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 408 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 409 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 410 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 458 DIS_ARMV8_DECODE_MAP_ENTRY(BraaBrab), /* BRAA/BRAB */ 459 DIS_ARMV8_DECODE_MAP_ENTRY(BlraaBlrab), /* BRAA/BRAB */ 411 460 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, 412 461 DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, … … 424 473 DIS_ARMV8_OP(0x14000000, "b", OP_ARMV8_A64_B, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 425 474 DIS_ARMV8_OP(0x94000000, "bl", OP_ARMV8_A64_BL, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 426 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_1(UncondBrImm, 0xfc000000 /*fFixedInsn*/, 427 kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31, 428 kDisArmv8OpParmImmRel); 475 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(UncondBrImm, 0xfc000000 /*fFixedInsn*/, 476 kDisArmV8OpcDecodeNop, RT_BIT_32(31), 31); 429 477 430 478 … … 437 485 DIS_ARMV8_OP(0x34000000, "cbz", OP_ARMV8_A64_CBZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 438 486 DIS_ARMV8_OP(0x35000000, "cbnz", OP_ARMV8_A64_CBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 439 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(CmpBrImm, 0x7f000000 /*fFixedInsn*/, 440 kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24, 441 kDisArmv8OpParmReg, kDisArmv8OpParmImmRel); 487 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(CmpBrImm, 0x7f000000 /*fFixedInsn*/, 488 kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24); 442 489 443 490 … … 451 498 DIS_ARMV8_OP(0x36000000, "tbz", OP_ARMV8_A64_TBZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 452 499 DIS_ARMV8_OP(0x37000000, "tbnz", OP_ARMV8_A64_TBNZ, DISOPTYPE_HARMLESS | DISOPTYPE_CONTROLFLOW), 453 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(TestBrImm, 0x7f000000 /*fFixedInsn*/, 454 kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24, 455 kDisArmv8OpParmReg, kDisArmv8OpParmImm, kDisArmv8OpParmImmRel); 500 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(TestBrImm, 0x7f000000 /*fFixedInsn*/, 501 kDisArmV8OpcDecodeNop, RT_BIT_32(24), 24); 456 502 457 503 … … 488 534 DIS_ARMV8_OP(0x4a000000, "eor", OP_ARMV8_A64_EOR, DISOPTYPE_HARMLESS), 489 535 DIS_ARMV8_OP(0x6a000000, "ands", OP_ARMV8_A64_ANDS, DISOPTYPE_HARMLESS) 490 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LogShiftRegN0, 0x7f200000 /*fFixedInsn*/, 491 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, 492 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 536 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LogShiftRegN0, 0x7f200000 /*fFixedInsn*/, 537 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29); 493 538 494 539 … … 506 551 DIS_ARMV8_OP(0x4a200000, "eon", OP_ARMV8_A64_EON, DISOPTYPE_HARMLESS), 507 552 DIS_ARMV8_OP(0x6a200000, "bics", OP_ARMV8_A64_BICS, DISOPTYPE_HARMLESS) 508 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LogShiftRegN1, 0x7f200000 /*fFixedInsn*/, 509 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29, 510 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 553 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LogShiftRegN1, 0x7f200000 /*fFixedInsn*/, 554 kDisArmV8OpcDecodeNop, RT_BIT_32(29) | RT_BIT_32(30), 29); 511 555 512 556 … … 544 588 DIS_ARMV8_OP(0x3a400000, "ccmn", OP_ARMV8_A64_CCMN, DISOPTYPE_HARMLESS), 545 589 DIS_ARMV8_OP(0x7a400000, "ccmp", OP_ARMV8_A64_CCMP, DISOPTYPE_HARMLESS) 546 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_4(CondCmpReg, 0x7fe00c10 /*fFixedInsn*/, 547 kDisArmV8OpcDecodeNop, RT_BIT_32(30), 30, 548 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmImm, kDisArmv8OpParmCond); 590 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(CondCmpReg, 0x7fe00c10 /*fFixedInsn*/, 591 kDisArmV8OpcDecodeNop, RT_BIT_32(30), 30); 549 592 550 593 … … 596 639 DIS_ARMV8_OP(0x1ac06800, "smin", OP_ARMV8_A64_SMIN, DISOPTYPE_HARMLESS), 597 640 DIS_ARMV8_OP(0x1ac06c00, "umin", OP_ARMV8_A64_UMIN, DISOPTYPE_HARMLESS), 598 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(Reg2Src32Bit, 0xffe0fc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 599 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10, 600 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 641 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Reg2Src32Bit, 0xffe0fc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 642 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 601 643 602 644 … … 651 693 DIS_ARMV8_OP( 0x9ac06800, "smin", OP_ARMV8_A64_SMIN, DISOPTYPE_HARMLESS), 652 694 DIS_ARMV8_OP( 0x9ac06c00, "umin", OP_ARMV8_A64_UMIN, DISOPTYPE_HARMLESS) 653 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(Reg2Src64Bit, 0xffe0fc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 654 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10, 655 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 695 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Reg2Src64Bit, 0xffe0fc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 696 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 656 697 657 698 … … 663 704 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(Subps) 664 705 DIS_ARMV8_OP(0xbac00000, "subps", OP_ARMV8_A64_SUBPS, DISOPTYPE_HARMLESS), 665 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(Subps, 0xffe0fc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 666 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10, 667 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmReg); 706 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Subps, 0xffe0fc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 707 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 668 708 669 709 … … 706 746 DIS_ARMV8_OP(0x5ac01c00, "cnt", OP_ARMV8_A64_CNT, DISOPTYPE_HARMLESS), 707 747 DIS_ARMV8_OP(0x5ac02000, "abs", OP_ARMV8_A64_ABS, DISOPTYPE_HARMLESS), 708 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(Reg1SrcInsn, 0x7ffffc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 709 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10, 710 kDisArmv8OpParmReg, kDisArmv8OpParmReg); 748 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(Reg1SrcInsn, 0x7ffffc00 /*fFixedInsn*/, kDisArmV8OpcDecodeNop, 749 RT_BIT_32(10) | RT_BIT_32(11) | RT_BIT_32(12) | RT_BIT_32(13) | RT_BIT_32(14) | RT_BIT_32(15), 10); 711 750 712 751 … … 778 817 DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET), 779 818 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 780 DIS_ARMV8_INSN_DECODE(kDisParmParse GprSp,5, 5, 1 /*idxParam*/),819 DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /*idxParam*/), 781 820 DIS_ARMV8_INSN_DECODE(kDisParmParseImmMemOff, 10, 12, 1 /*idxParam*/), 782 821 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegUImmGpr) … … 797 836 INVALID_OPCODE, /** @todo PRFM */ 798 837 INVALID_OPCODE, 799 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(LdStRegUImmGpr, 0xffc00000 /*fFixedInsn*/, 800 kDisArmV8OpcDecodeCollate, 801 RT_BIT_32(22) | RT_BIT_32(23) | RT_BIT_32(30) | RT_BIT_32(31), 22, 802 kDisArmv8OpParmReg, kDisArmv8OpParmAddrInGpr); 838 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegUImmGpr, 0xffc00000 /*fFixedInsn*/, 839 kDisArmV8OpcDecodeCollate, 840 RT_BIT_32(22) | RT_BIT_32(23) | RT_BIT_32(30) | RT_BIT_32(31), 22); 803 841 804 842 … … 827 865 DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET), 828 866 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 829 DIS_ARMV8_INSN_DECODE(kDisParmParse GprSp,5, 5, 1 /*idxParam*/),867 DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /*idxParam*/), 830 868 DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /*idxParam*/), 831 869 DIS_ARMV8_INSN_DECODE(kDisParmParseOption, 13, 3, 1 /*idxParam*/), … … 848 886 INVALID_OPCODE, /** @todo PRFM */ 849 887 INVALID_OPCODE, 850 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(LdStRegOffGpr, 0xffe00c00 /*fFixedInsn*/, 851 kDisArmV8OpcDecodeCollate, 852 RT_BIT_32(22) | RT_BIT_32(23) | RT_BIT_32(30) | RT_BIT_32(31), 22, 853 kDisArmv8OpParmReg, kDisArmv8OpParmAddrInGpr); 888 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegOffGpr, 0xffe00c00 /*fFixedInsn*/, 889 kDisArmV8OpcDecodeCollate, 890 RT_BIT_32(22) | RT_BIT_32(23) | RT_BIT_32(30) | RT_BIT_32(31), 22); 854 891 855 892 … … 898 935 DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET), 899 936 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 900 DIS_ARMV8_INSN_DECODE(kDisParmParse GprSp,5, 5, 1 /*idxParam*/),937 DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /*idxParam*/), 901 938 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /*idxParam*/), 902 939 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegUnscaledImmGpr) … … 917 954 INVALID_OPCODE, /** @todo PRFUM */ 918 955 INVALID_OPCODE, 919 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_2(LdStRegUnscaledImmGpr, 0xffe00c00 /*fFixedInsn*/, 920 kDisArmV8OpcDecodeCollate, 921 RT_BIT_32(22) | RT_BIT_32(23) | RT_BIT_32(30) | RT_BIT_32(31), 22, 922 kDisArmv8OpParmReg, kDisArmv8OpParmAddrInGpr); 956 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegUnscaledImmGpr, 0xffe00c00 /*fFixedInsn*/, 957 kDisArmV8OpcDecodeCollate, 958 RT_BIT_32(22) | RT_BIT_32(23) | RT_BIT_32(30) | RT_BIT_32(31), 22); 923 959 924 960 … … 999 1035 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 1000 1036 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /*idxParam*/), 1001 DIS_ARMV8_INSN_DECODE(kDisParmParse GprSp,5, 5, 2 /*idxParam*/),1037 DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /*idxParam*/), 1002 1038 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /*idxParam*/), 1003 1039 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPairOff) … … 1010 1046 INVALID_OPCODE, 1011 1047 INVALID_OPCODE, 1012 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LdStRegPairOff, 0xffc00000 /*fFixedInsn*/, 1013 kDisArmV8OpcDecodeCollate, 1014 RT_BIT_32(22) | RT_BIT_32(30) | RT_BIT_32(31), 22, 1015 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmAddrInGpr); 1048 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairOff, 0xffc00000 /*fFixedInsn*/, 1049 kDisArmV8OpcDecodeCollate, 1050 RT_BIT_32(22) | RT_BIT_32(30) | RT_BIT_32(31), 22); 1016 1051 1017 1052 … … 1024 1059 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 1025 1060 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /*idxParam*/), 1026 DIS_ARMV8_INSN_DECODE(kDisParmParse GprSp,5, 5, 2 /*idxParam*/),1061 DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /*idxParam*/), 1027 1062 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /*idxParam*/), 1028 1063 DIS_ARMV8_INSN_DECODE(kDisParmParseSetPreIndexed, 0, 0, 2 /*idxParam*/), … … 1036 1071 INVALID_OPCODE, 1037 1072 INVALID_OPCODE, 1038 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LdStRegPairPreIndex, 0xffc00000 /*fFixedInsn*/, 1039 kDisArmV8OpcDecodeCollate, 1040 RT_BIT_32(22) | RT_BIT_32(30) | RT_BIT_32(31), 22, 1041 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmAddrInGpr); 1073 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairPreIndex, 0xffc00000 /*fFixedInsn*/, 1074 kDisArmV8OpcDecodeCollate, 1075 RT_BIT_32(22) | RT_BIT_32(30) | RT_BIT_32(31), 22); 1042 1076 1043 1077 … … 1050 1084 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /*idxParam*/), 1051 1085 DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /*idxParam*/), 1052 DIS_ARMV8_INSN_DECODE(kDisParmParse GprSp,5, 5, 2 /*idxParam*/),1086 DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /*idxParam*/), 1053 1087 DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /*idxParam*/), 1054 1088 DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 2 /*idxParam*/), … … 1062 1096 INVALID_OPCODE, 1063 1097 INVALID_OPCODE, 1064 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END_PARAMS_3(LdStRegPairPostIndex, 0xffc00000 /*fFixedInsn*/, 1065 kDisArmV8OpcDecodeCollate, 1066 RT_BIT_32(22) | RT_BIT_32(30) | RT_BIT_32(31), 22, 1067 kDisArmv8OpParmReg, kDisArmv8OpParmReg, kDisArmv8OpParmAddrInGpr); 1098 DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairPostIndex, 0xffc00000 /*fFixedInsn*/, 1099 kDisArmV8OpcDecodeCollate, 1100 RT_BIT_32(22) | RT_BIT_32(30) | RT_BIT_32(31), 22); 1068 1101 1069 1102 -
trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S
r106632 r106649 96 96 ret x2 97 97 ret x15 98 retaa 99 retab 98 100 br x15 101 braaz x15 102 brabz xzr 99 103 blr x15 104 blraaz x15 105 blrabz xzr 106 eret 107 eretaa 108 eretab 109 drps 110 braa xzr, sp 111 braa x0, x1 112 brab xzr, sp 113 brab x0, x1 114 blraa xzr, sp 115 blraa x0, x1 116 blrab xzr, sp 117 blrab x0, x1 100 118 101 119 ; System register access instructions
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