Changeset 106758 in vbox for trunk/src/VBox/Disassembler

Timestamp:

Oct 28, 2024 3:54:21 PM (6 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

165643

Message:

Disassembler: Decode ldraa/ldrab instructions, bugref:10394

Location:

trunk/src/VBox/Disassembler

Files:

• DisasmCore-armv8.cpp (modified) (3 diffs)
• DisasmInternal-armv8.h (modified) (1 diff)
• DisasmTables-armv8-a64-ld-st.cpp.h (modified) (2 diffs)
• testcase/tstDisasmArmv8-1-asm.S (modified) (1 diff)

trunk/src/VBox/Disassembler/DisasmCore-armv8.cpp

@@ -114 +114 @@
 static FNDISPARSEARMV8 disArmV8ParseSf;
 static FNDISPARSEARMV8 disArmV8ParseImmX16;
+static FNDISPARSEARMV8 disArmV8ParseLdrPacImm;
+static FNDISPARSEARMV8 disArmV8ParseLdrPacW;
 /** @}  */
 
@@ -172 +174 @@
     disArmV8ParseImmHImmB,
     disArmV8ParseSf,
-    disArmV8ParseImmX16
+    disArmV8ParseImmX16,
+    disArmV8ParseLdrPacImm,
+    disArmV8ParseLdrPacW
 };
 
@@ -1030 +1034 @@
 
 
+static int disArmV8ParseLdrPacImm(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit)
+{
+    RT_NOREF(pDis, pOp, pInsnClass, pParam, pInsnParm, pf64Bit);
+
+    Assert(pInsnParm->cBits == 0);
+    Assert(pInsnParm->idxBitStart == 0);
+    Assert(pParam->armv8.enmType != kDisArmv8OpParmNone);
+
+    uint32_t u32 = disArmV8ExtractBitVecFromInsn(u32Insn, 12, 9) | ((u32Insn & RT_BIT_32(22)) >> 13);
+    pParam->armv8.cb = sizeof(int16_t);
+    pParam->armv8.u.offBase = disArmV8ExtractBitVecFromInsnSignExtend(u32, 0, 10) << 3;
+    return VINF_SUCCESS;
+}
+
+
+static int disArmV8ParseLdrPacW(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool *pf64Bit)
+{
+    RT_NOREF(pDis, pOp, pInsnClass, pParam, pInsnParm, pf64Bit);
+
+    Assert(pInsnParm->cBits == 1);
+    Assert(pInsnParm->idxBitStart == 11);
+    if (u32Insn & RT_BIT_32(11))
+        pParam->fUse |= DISUSE_PRE_INDEXED;
+    return VINF_SUCCESS;
+}
+
+
 static uint32_t disArmV8DecodeIllegal(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass)
 {

trunk/src/VBox/Disassembler/DisasmInternal-armv8.h

@@ -92 +92 @@
     kDisParmParseSf,
     kDisParmParseImmX16,
+    kDisParmParseLdrPacImm,
+    kDisParmParseLdrPacW,
     kDisParmParseMax
 } DISPARMPARSEIDX;

trunk/src/VBox/Disassembler/DisasmTables-armv8-a64-ld-st.cpp.h

@@ -170 +170 @@
 
 
+/* LDRAA/LDRAB */
+DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPac)
+    DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr,          0,  5, 0 /*idxParam*/),
+    DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp,      5,  5, 1 /*idxParam*/),
+    DIS_ARMV8_INSN_DECODE(kDisParmParseLdrPacImm,      0,  0, 1 /*idxParam*/), /* Hardcoded */
+    DIS_ARMV8_INSN_DECODE(kDisParmParseLdrPacW,       11,  1, 1 /*idxParam*/),
+DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPac)
+    DIS_ARMV8_OP(0xf8200400, "ldraa",           OP_ARMV8_A64_LDRAA,     DISOPTYPE_HARMLESS),
+    DIS_ARMV8_OP(0xf8a00400, "ldrab",           OP_ARMV8_A64_LDRAB,     DISOPTYPE_HARMLESS),
+DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPac, 0xffa00400 /*fFixedInsn*/,
+                                       kDisArmV8OpcDecodeNop,
+                                       RT_BIT_32(23), 23);
+
+
 /*
  * C4.1.94 - Loads and Stores - Load/Store register variants
@@ -184 +198 @@
 DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegOp2_11_1)
     DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,         /** @todo */
-    DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,         /** @todo */
+    DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPac),
     DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegOff),
-    DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,         /** @todo */
+    DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPac),
 DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegOp2_11_1, RT_BIT_32(10) | RT_BIT_32(11), 10);
 

trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S

@@ -1080 +1080 @@
         ldrsw x0, [sp, w2, SXTW #2]
 
+
+        ; FEAT_PAuth memory loads
+
+        ldraa x0, [x1]
+        ldraa x0, [x1, #-1024]
+        ldraa x0, [x1, #-4096]
+        ldraa x0, [x1, #4088]
+
+        ldraa xzr, [sp]
+        ldraa xzr, [sp, #-1024]
+        ldraa xzr, [sp, #-4096]
+        ldraa xzr, [sp, #4088]
+
+        ldraa x0, [x1, #0]!
+        ldraa x0, [x1, #-1024]!
+        ldraa x0, [x1, #-4096]!
+        ldraa x0, [x1, #4088]!
+
+        ldraa xzr, [sp, #0]!
+        ldraa xzr, [sp, #-1024]!
+        ldraa xzr, [sp, #-4096]!
+        ldraa xzr, [sp, #4088]!
+
+
+        ldrab x0, [x1]
+        ldrab x0, [x1, #-1024]
+        ldrab x0, [x1, #-4096]
+        ldrab x0, [x1, #4088]
+
+        ldrab xzr, [sp]
+        ldrab xzr, [sp, #-1024]
+        ldrab xzr, [sp, #-4096]
+        ldrab xzr, [sp, #4088]
+
+        ldrab x0, [x1, #0]!
+        ldrab x0, [x1, #-1024]!
+        ldrab x0, [x1, #-4096]!
+        ldrab x0, [x1, #4088]!
+
+        ldrab xzr, [sp, #0]!
+        ldrab xzr, [sp, #-1024]!
+        ldrab xzr, [sp, #-4096]!
+        ldrab xzr, [sp, #4088]!
+
+
         ; Memory stores
         strb w0, [x28]