Changeset 107117 in vbox for trunk/include/VBox

Timestamp:

Nov 22, 2024 11:17:47 AM (5 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

166084

Message:

VMM: bugref:10759 APIC restructure [doxygen fixes]

File:

• trunk/include/VBox/vmm/pdmapic.h (modified) (10 diffs)

trunk/include/VBox/vmm/pdmapic.h

@@ -215 +215 @@
      * @param   pVCpu                   The cross context virtual CPU structure.
      * @param   u8Tpr                   The TPR value to set.
-     * @param   fForceX2ApicBehavior    Pretend the APIC is in x2APIC mode during
-     *                                  this write.
+     * @param   fForceX2ApicBehaviour   Pretend the APIC is in x2APIC mode during this
+     *                                  write.
      */
     DECLR3CALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour));
@@ -277 +277 @@
      * @param   puSrcTag    Where to store the interrupt source tag (debugging).
      */
-    DECLR3CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc));
+    DECLR3CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag));
 
     /**
@@ -321 +321 @@
      */
     DECLR3CALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
-                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
+                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag));
 
     /**
@@ -463 +463 @@
      * @param   pVCpu                   The cross context virtual CPU structure.
      * @param   u8Tpr                   The TPR value to set.
-     * @param   fForceX2ApicBehavior    Pretend the APIC is in x2APIC mode during
-     *                                  this write.
+     * @param   fForceX2ApicBehaviour   Pretend the APIC is in x2APIC mode during this
+     *                                  write.
      */
     DECLR0CALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour));
@@ -525 +525 @@
      * @param   puSrcTag    Where to store the interrupt source tag (debugging).
      */
-    DECLR0CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc));
+    DECLR0CALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puTagSrc));
 
     /**
@@ -569 +569 @@
      */
     DECLR0CALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
-                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
+                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag));
 
     /**
@@ -712 +712 @@
      * @param   pVCpu                   The cross context virtual CPU structure.
      * @param   u8Tpr                   The TPR value to set.
-     * @param   fForceX2ApicBehavior    Pretend the APIC is in x2APIC mode during
-     *                                  this write.
+     * @param   fForceX2ApicBehaviour   Pretend the APIC is in x2APIC mode during this
+     *                                  write.
      */
     DECLRGCALLBACKMEMBER(int, pfnSetTpr, (PVMCPUCC pVCpu, uint8_t u8Tpr, bool fForceX2ApicBehaviour));
@@ -774 +774 @@
      * @param   puSrcTag    Where to store the interrupt source tag (debugging).
      */
-    DECLRGCALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc));
+    DECLRGCALLBACKMEMBER(int, pfnGetInterrupt, (PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puTagSrc));
 
     /**
@@ -818 +818 @@
      */
     DECLRGCALLBACKMEMBER(int, pfnBusDeliver, (PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
-                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc));
+                                              uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uSrcTag));
 
     /**
@@ -889 +889 @@
 VMM_INT_DECL(VBOXSTRICTRC)  PDMApicGetBaseMsr(PVMCPUCC pVCpu, uint64_t *pu64Value);
 VMM_INT_DECL(int)           PDMApicSetBaseMsr(PVMCPUCC pVCpu, uint64_t u64BaseMsr);
-VMM_INT_DECL(int)           PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *pu32TagSrc);
+VMM_INT_DECL(int)           PDMApicGetInterrupt(PVMCPUCC pVCpu, uint8_t *pu8Vector, uint32_t *puSrcTag);
 VMM_INT_DECL(int)           PDMApicBusDeliver(PVMCC pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
                                               uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc);