Changeset 107171 in vbox for trunk/src/VBox/VMM/VMMR3/PGM-armv8.cpp
- Timestamp:
- Nov 28, 2024 10:38:10 AM (7 weeks ago)
- File:
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- 1 edited
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trunk/src/VBox/VMM/VMMR3/PGM-armv8.cpp
r106670 r107171 72 72 73 73 /********************************************************************************************************************************* 74 * Structures and Typedefs *75 *********************************************************************************************************************************/76 77 78 /*********************************************************************************************************************************79 74 * Internal Functions * 80 75 *********************************************************************************************************************************/ … … 101 96 { 102 97 AssertFatal(!PDMCritSectIsInitialized(&pVM->pgm.s.CritSectX)); 98 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE 103 99 pVM->pgm.s.fNemMode = true; 100 #endif 104 101 } 105 102 … … 113 110 VMMR3_INT_DECL(bool) PGMR3IsNemModeEnabled(PVM pVM) 114 111 { 115 return pVM->pgm.s.fNemMode; 112 RT_NOREF(pVM); 113 return PGM_IS_IN_NEM_MODE(pVM); 116 114 } 117 115 … … 126 124 { 127 125 LogFlow(("PGMR3Init:\n")); 128 PCFGMNODE pCfgPGM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM");129 int rc;130 126 131 127 /* … … 136 132 AssertCompileMemberAlignment(PGM, CritSectX, sizeof(uintptr_t)); 137 133 138 /*139 * If we're in driveless mode we have to use the simplified memory mode.140 */141 134 bool const fDriverless = SUPR3IsDriverless(); 142 AssertReturn(fDriverless, VERR_NOT_SUPPORTED);143 if (!pVM->pgm.s.fNemMode)144 pVM->pgm.s.fNemMode = true;145 135 146 136 /* … … 148 138 */ 149 139 /*pVM->pgm.s.fRestoreRomPagesAtReset = false;*/ 140 141 /* We always use the simplified memory mode on arm. */ 142 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE 143 pVM->pgm.s.fNemMode = true; 144 #endif 150 145 151 146 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.aHandyPages); i++) … … 168 163 for (size_t i = 0; i < RT_ELEMENTS(pVM->pgm.s.aPhysHandlerTypes); i++) 169 164 { 165 #if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0) 170 166 if (fDriverless) 167 #endif 171 168 pVM->pgm.s.aPhysHandlerTypes[i].hType = i | (RTRandU64() & ~(uint64_t)PGMPHYSHANDLERTYPE_IDX_MASK); 172 169 pVM->pgm.s.aPhysHandlerTypes[i].enmKind = PGMPHYSHANDLERKIND_INVALID; … … 183 180 #endif 184 181 185 rc = CFGMR3QueryBoolDef(CFGMR3GetRoot(pVM), "RamPreAlloc", &pVM->pgm.s.fRamPreAlloc, 182 /* 183 * Read the configuration. 184 */ 185 PCFGMNODE const pCfgPGM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM"); 186 187 int rc = CFGMR3QueryBoolDef(CFGMR3GetRoot(pVM), "RamPreAlloc", &pVM->pgm.s.fRamPreAlloc, 186 188 #ifdef VBOX_WITH_PREALLOC_RAM_BY_DEFAULT 187 189 true … … 252 254 */ 253 255 RT_ZERO(pVM->pgm.s.abZeroPg); /* paranoia */ 256 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE 254 257 if (fDriverless) 255 258 pVM->pgm.s.HCPhysZeroPg = _4G - GUEST_PAGE_SIZE * 2 /* fake to avoid PGM_PAGE_INIT_ZERO assertion */; 256 259 AssertRelease(pVM->pgm.s.HCPhysZeroPg != NIL_RTHCPHYS); 257 260 AssertRelease(pVM->pgm.s.HCPhysZeroPg != 0); 261 #endif 258 262 259 263 /* … … 262 266 */ 263 267 ASMMemFill32(pVM->pgm.s.abMmioPg, sizeof(pVM->pgm.s.abMmioPg), 0xfeedface); 268 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE 264 269 if (fDriverless) 265 270 pVM->pgm.s.HCPhysMmioPg = _4G - GUEST_PAGE_SIZE * 3 /* fake to avoid PGM_PAGE_INIT_ZERO assertion */; … … 267 272 AssertRelease(pVM->pgm.s.HCPhysMmioPg != 0); 268 273 pVM->pgm.s.HCPhysInvMmioPg = pVM->pgm.s.HCPhysMmioPg; 274 #endif 269 275 270 276 /* … … 282 288 AssertLogRelMsgStmt(cAccessHandlers >= 32, ("cAccessHandlers=%#x, min 32\n", cAccessHandlers), cAccessHandlers = 32); 283 289 AssertLogRelMsgStmt(cAccessHandlers <= _64K, ("cAccessHandlers=%#x, max 65536\n", cAccessHandlers), cAccessHandlers = _64K); 290 #if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0) 284 291 if (!fDriverless) 285 292 { … … 291 298 } 292 299 else 300 #endif 293 301 { 294 302 uint32_t cbTreeAndBitmap = 0; … … 331 339 332 340 /** 333 * Ring-3 init finalizing .341 * Ring-3 init finalizing (not required here). 334 342 * 335 343 * @returns VBox status code. … … 338 346 VMMR3DECL(int) PGMR3InitFinalize(PVM pVM) 339 347 { 340 /* 341 * Allocate memory if we're supposed to do that. 342 */ 348 RT_NOREF(pVM); 343 349 int rc = VINF_SUCCESS; 350 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE 344 351 if (pVM->pgm.s.fRamPreAlloc) 345 352 rc = pgmR3PhysRamPreAllocate(pVM); 353 #endif 346 354 347 355 //pgmLogState(pVM); 348 LogRel(("PGM: PGMR3InitFinalize : 4 MB PSE mask %RGp -> %Rrc\n", pVM->pgm.s.GCPhys4MBPSEMask, rc));356 LogRel(("PGM: PGMR3InitFinalize done: %Rrc\n", rc)); 349 357 return rc; 350 358 } … … 511 519 VMMDECL(bool) PGMHasDirtyPages(PVM pVM) 512 520 { 521 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE 513 522 return pVM->pgm.s.CTX_SUFF(pPool)->cDirtyPages != 0; 523 #else 524 RT_NOREF(pVM); 525 return false; 526 #endif 514 527 } 515 528 … … 730 743 731 744 CPUMMODE enmCpuMode = CPUMGetGuestMode(pVCpu); 732 return 733 734 745 return enmCpuMode == CPUMMODE_ARMV8_AARCH64 746 ? PGMMODE_VMSA_V8_64 747 : PGMMODE_VMSA_V8_32; 735 748 } 736 749 … … 1000 1013 return pgmGstPtWalk(pVCpu, GCPtr, pWalk, pGstWalk); /** @todo Always do full walk for now. */ 1001 1014 } 1015
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