Changeset 107227 in vbox for trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp

Timestamp:

Dec 4, 2024 3:20:14 PM (6 weeks ago)

Author:

vboxsync

Message:

VMM: Cleaning up ARMv8 / x86 split. jiraref:VBP-1470

File:

• trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp

@@ -6322 +6322 @@
 *********************************************************************************************************************************/
 
-#if !defined(VBOX_VMM_TARGET_ARMV8)
+#ifdef VBOX_VMM_TARGET_X86
 /**
  * Sets the Address Gate 20 state.
@@ -6335 +6335 @@
     if (pVCpu->pgm.s.fA20Enabled != fEnable)
     {
-#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
+# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
         PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
         if (   CPUMIsGuestInVmxRootMode(pCtx)
@@ -6343 +6343 @@
             return;
         }
-#endif
+# endif
         pVCpu->pgm.s.fA20Enabled = fEnable;
         pVCpu->pgm.s.GCPhysA20Mask = ~((RTGCPHYS)!fEnable << 20);
         if (VM_IS_NEM_ENABLED(pVCpu->CTX_SUFF(pVM)))
             NEMR3NotifySetA20(pVCpu, fEnable);
-#ifdef PGM_WITH_A20
+# ifdef PGM_WITH_A20
         VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
         pgmR3RefreshShadowModeAfterA20Change(pVCpu);
         HMFlushTlb(pVCpu);
-#endif
-#if 0 /* PGMGetPage will apply the A20 mask to the GCPhys it returns, so we must invalid both sides of the TLB. */
+# endif
+# if 0 /* PGMGetPage will apply the A20 mask to the GCPhys it returns, so we must invalid both sides of the TLB. */
         IEMTlbInvalidateAllPhysical(pVCpu);
-#else
+# else
         IEMTlbInvalidateAllGlobal(pVCpu);
-#endif
+# endif
         STAM_REL_COUNTER_INC(&pVCpu->pgm.s.cA20Changes);
     }
 }
-#endif
-
+#endif /* VBOX_VMM_TARGET_X86 */
+