VirtualBox

Changeset 107308 in vbox for trunk/src/VBox/VMM/VMMR3


Ignore:
Timestamp:
Dec 13, 2024 8:09:39 AM (5 weeks ago)
Author:
vboxsync
Message:

VMM: bugref:10759 Refactor GIC for use with different backends.

Location:
trunk/src/VBox/VMM/VMMR3
Files:
11 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR3/APIC.cpp

    r107217 r107308  
    14481448     * Register the APIC with PDM.
    14491449     */
    1450     rc = PDMDevHlpApicRegister(pDevIns);
     1450    rc = PDMDevHlpIcRegister(pDevIns);
    14511451    AssertLogRelRCReturn(rc, rc);
    14521452

  • trunk/src/VBox/VMM/VMMR3/GICR3.cpp

    r106999 r107308  
    3333#include <VBox/log.h>
    3434#include "GICInternal.h"
    35 #include <VBox/vmm/gic.h>
     35#include <VBox/vmm/pdmgic.h>
    3636#include <VBox/vmm/cpum.h>
    3737#include <VBox/vmm/hm.h>
    … …  
    425425     * Register the GIC with PDM.
    426426     */
    427     rc = PDMDevHlpApicRegister(pDevIns);
     427    rc = PDMDevHlpIcRegister(pDevIns);
     428    AssertLogRelRCReturn(rc, rc);
     429
     430    rc = PDMGicRegisterBackend(pVM, PDMGICBACKENDTYPE_VBOX, &g_GicBackend);
    428431    AssertLogRelRCReturn(rc, rc);
    429432

  • trunk/src/VBox/VMM/VMMR3/GICR3Nem-darwin.cpp

    r105687 r107308  
    3333#include <VBox/log.h>
    3434#include "GICInternal.h"
    35 #include "NEMInternal.h" /* Need access to the VM file descriptor. */
    36 #include <VBox/vmm/gic.h>
     35#include "NEMInternal.h" /* Need access to the VM file descriptor and for GIC API currently implemented in NEM. */
     36#include <VBox/vmm/pdmgic.h>
    3737#include <VBox/vmm/cpum.h>
    3838#include <VBox/vmm/hm.h>
    … …  
    4646
    4747/*********************************************************************************************************************************
    48 *   Defined Constants And Macros                                                                                                 *
    49 *********************************************************************************************************************************/
    50 
    51 
    52 /*********************************************************************************************************************************
    5348*   Structures and Typedefs                                                                                                      *
    5449*********************************************************************************************************************************/
    5550
    5651/**
    57  * GICKvm PDM instance data (per-VM).
     52 * GIC Hypervisor.Framework PDM instance data (per-VM).
    5853 */
    59 typedef struct GICKVMDEV
     54typedef struct GICHVFDEV
    6055{
    6156    /** Pointer to the PDM device instance. */
    6257    PPDMDEVINSR3        pDevIns;
    63 } GICKVMDEV;
     58} GICHVFDEV;
    6459/** Pointer to a GIC KVM device. */
    65 typedef GICKVMDEV *PGICKVMDEV;
     60typedef GICHVFDEV *PGICHVFDEV;
    6661/** Pointer to a const GIC KVM device. */
    67 typedef GICKVMDEV const *PCGICKVMDEV;
    68 
    69 
    70 /*********************************************************************************************************************************
    71 *   Global Variables                                                                                                             *
    72 *********************************************************************************************************************************/
    73 
     62typedef GICHVFDEV const *PCGICHVFDEV;
    7463
    7564
    … …  
    7766 * @interface_method_impl{PDMDEVREG,pfnConstruct}
    7867 */
    79 DECLCALLBACK(int) gicR3NemConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
     68DECLCALLBACK(int) gicR3HvfConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
    8069{
    8170    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
    82     PGICKVMDEV      pThis    = PDMDEVINS_2_DATA(pDevIns, PGICKVMDEV);
     71    PGICHVFDEV      pThis    = PDMDEVINS_2_DATA(pDevIns, PGICHVFDEV);
    8372    PVM             pVM      = PDMDevHlpGetVM(pDevIns);
    8473    PGIC            pGic     = VM_TO_GIC(pVM);
    … …  
    9180     */
    9281    pGic->pDevInsR3 = pDevIns;
    93     pGic->fNemGic   = true;
    9482    pThis->pDevIns  = pDevIns;
    9583
    … …  
    10391     * Register the GIC with PDM.
    10492     */
    105     rc = PDMDevHlpApicRegister(pDevIns);
     93    rc = PDMDevHlpIcRegister(pDevIns);
     94    AssertLogRelRCReturn(rc, rc);
     95
     96    rc = PDMGicRegisterBackend(pVM, PDMGICBACKENDTYPE_HVF, &g_GicHvfBackend);
    10697    AssertLogRelRCReturn(rc, rc);
    10798
    … …  
    131122    /* .szRCMod = */                "VMMRC.rc",
    132123    /* .szR0Mod = */                "VMMR0.r0",
    133     /* .pfnConstruct = */           gicR3NemConstruct,
     124    /* .pfnConstruct = */           gicR3HvfConstruct,
    134125    /* .pfnDestruct = */            NULL,
    135126    /* .pfnRelocate = */            NULL,
    … …  
    159150};
    160151
     152
     153/**
     154 * The Hypervisor.Framework GIC backend.
     155 */
     156const PDMGICBACKEND g_GicHvfBackend =
     157{
     158    /* .pfnReadSysReg = */  NEMR3GicReadSysReg,
     159    /* .pfnWriteSysReg = */ NEMR3GicWriteSysReg,
     160    /* .pfnSetSpi = */      NEMR3GicSetSpi,
     161    /* .pfnSetPpi = */      NEMR3GicSetPpi,
     162};
     163
    161164#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
    162165

  • trunk/src/VBox/VMM/VMMR3/GICR3Nem-linux.cpp

    r105687 r107308  
    3434#include "GICInternal.h"
    3535#include "NEMInternal.h" /* Need access to the VM file descriptor. */
    36 #include <VBox/vmm/gic.h>
     36#include <VBox/vmm/pdmgic.h>
    3737#include <VBox/vmm/cpum.h>
    3838#include <VBox/vmm/hm.h>
    … …  
    101101
    102102/**
    103  * Common worker for GICR3KvmSpiSet() and GICR3KvmPpiSet().
     103 * Common worker for gicR3KvmSpiSet() and gicR3KvmPpiSet().
    104104 *
    105105 * @returns VBox status code.
    … …  
    138138 * @param   fAsserted   Flag whether the interrupt is asserted (true) or not (false).
    139139 */
    140 VMMR3_INT_DECL(int) GICR3NemSpiSet(PVMCC pVM, uint32_t uIntId, bool fAsserted)
     140static DECLCALLBACK(int) gicR3KvmSetSpi(PVMCC pVM, uint32_t uIntId, bool fAsserted)
    141141{
    142142    PGIC pGic = VM_TO_GIC(pVM);
    … …  
    157157 * @param   fAsserted   Flag whether the interrupt is asserted (true) or not (false).
    158158 */
    159 VMMR3_INT_DECL(int) GICR3NemPpiSet(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted)
     159static DECLCALLBACK(int) gicR3KvmSetPpi(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted)
    160160{
    161161    PPDMDEVINS pDevIns = VMCPU_TO_DEVINS(pVCpu);
    162162
    163     return gicR3KvmSetIrq(pDevIns, pVCpu->idCpu, KVM_ARM_IRQ_TYPE_SPI,
     163    return gicR3KvmSetIrq(pDevIns, pVCpu->idCpu, KVM_ARM_IRQ_TYPE_PPI,
    164164                          uIntId + GIC_INTID_RANGE_PPI_START, fAsserted);
    165165}
    … …  
    294294     * Register the GIC with PDM.
    295295     */
    296     rc = PDMDevHlpApicRegister(pDevIns);
     296    rc = PDMDevHlpIcRegister(pDevIns);
     297    AssertLogRelRCReturn(rc, rc);
     298
     299    rc = PDMGicRegisterBackend(pVM, PDMGICBACKENDTYPE_KVM, &g_GicKvmBackend);
    297300    AssertLogRelRCReturn(rc, rc);
    298301
    … …  
    405408};
    406409
     410/**
     411 * The KVM GIC backend.
     412 */
     413const PDMGICBACKEND g_GicKvmBackend =
     414{
     415    /* .pfnReadSysReg = */  NULL,
     416    /* .pfnWriteSysReg = */ NULL,
     417    /* .pfnSetSpi = */      gicR3KvmSetSpi,
     418    /* .pfnSetPpi = */      gicR3KvmSetPpi,
     419};
     420
    407421#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
    408422

  • trunk/src/VBox/VMM/VMMR3/GICR3Nem-win.cpp

    r106952 r107308  
    3838#include "GICInternal.h"
    3939#include "NEMInternal.h" /* Need access to the partition handle. */
    40 #include <VBox/vmm/gic.h>
     40#include <VBox/vmm/pdmgic.h>
    4141#include <VBox/vmm/cpum.h>
    4242#include <VBox/vmm/hm.h>
    … …  
    7070    WHV_PARTITION_HANDLE hPartition;
    7171} GICHVDEV;
    72 /** Pointer to a GIC KVM device. */
     72/** Pointer to a GIC Hyper-V device. */
    7373typedef GICHVDEV *PGICHVDEV;
    74 /** Pointer to a const GIC KVM device. */
     74/** Pointer to a const GIC Hyper-V device. */
    7575typedef GICHVDEV const *PCGICHVDEV;
    7676
    … …  
    124124
    125125/**
    126  * Common worker for GICR3KvmSpiSet() and GICR3KvmPpiSet().
     126 * Common worker for gicR3HvSetSpi() and gicR3HvSetPpi().
    127127 *
    128128 * @returns VBox status code.
    129  * @param   pDevIns     The PDM KVM GIC device instance.
     129 * @param   pDevIns     The PDM Hyper-V GIC device instance.
    130130 * @param   idCpu       The CPU ID for which the interrupt is updated (only valid for PPIs).
    131131 * @param   fPpi        Flag whether this is a PPI or SPI.
    … …  
    163163
    164164/**
    165  * Sets the given SPI inside the in-kernel KVM GIC.
     165 * Sets the given SPI inside the in-kernel Hyper-V GIC.
    166166 *
    167167 * @returns VBox status code.
    … …  
    170170 * @param   fAsserted   Flag whether the interrupt is asserted (true) or not (false).
    171171 */
    172 VMMR3_INT_DECL(int) GICR3NemSpiSet(PVMCC pVM, uint32_t uIntId, bool fAsserted)
     172static DECLCALLBACK(int) gicR3HvSetSpi(PVMCC pVM, uint32_t uIntId, bool fAsserted)
    173173{
    174174    PGIC pGic = VM_TO_GIC(pVM);
    … …  
    182182
    183183/**
    184  * Sets the given PPI inside the in-kernel KVM GIC.
     184 * Sets the given PPI inside the in-kernel Hyper-V GIC.
    185185 *
    186186 * @returns VBox status code.
    … …  
    189189 * @param   fAsserted   Flag whether the interrupt is asserted (true) or not (false).
    190190 */
    191 VMMR3_INT_DECL(int) GICR3NemPpiSet(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted)
     191static DECLCALLBACK(int) gicR3HvSetPpi(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted)
    192192{
    193193    PPDMDEVINS pDevIns = VMCPU_TO_DEVINS(pVCpu);
    … …  
    259259     * Register the GIC with PDM.
    260260     */
    261     rc = PDMDevHlpApicRegister(pDevIns);
     261    rc = PDMDevHlpIcRegister(pDevIns);
     262    AssertLogRelRCReturn(rc, rc);
     263
     264    rc = PDMGicRegisterBackend(pVM, PDMGICBACKENDTYPE_HYPERV, &g_GicHvBackend);
    262265    AssertLogRelRCReturn(rc, rc);
    263266
    … …  
    331334};
    332335
     336/**
     337 * The Hypervisor.Framework GIC backend.
     338 */
     339const PDMGICBACKEND g_GicHvfBackend =
     340{
     341    /* .pfnReadSysReg = */  NULL,
     342    /* .pfnWriteSysReg = */ NULL,
     343    /* .pfnSetSpi = */      gicR3HvSetSpi,
     344    /* .pfnSetPpi = */      gicR3HvSetPpi,
     345};
     346
    333347#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
    334348

  • trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin-armv8.cpp

    r107132 r107308  
    3939#include <VBox/vmm/iem.h>
    4040#include <VBox/vmm/em.h>
    41 #include <VBox/vmm/gic.h>
     41#include <VBox/vmm/pdmgic.h>
    4242#include <VBox/vmm/pdm.h>
    4343#include <VBox/vmm/dbgftrace.h>
    … …  
    9191typedef enum hv_gic_icc_reg_t : uint16_t
    9292{
    93     HV_GIC_ICC_REG_AP0R0_EL1
     93    HV_GIC_ICC_REG_PMR_EL1,
     94    HV_GIC_ICC_REG_BPR0_EL1,
     95    HV_GIC_ICC_REG_AP0R0_EL1,
     96    HV_GIC_ICC_REG_AP1R0_EL1,
     97    HV_GIC_ICC_REG_RPR_EL1,
     98    HV_GIC_ICC_REG_BPR1_EL1,
     99    HV_GIC_ICC_REG_CTLR_EL1,
     100    HV_GIC_ICC_REG_SRE_EL1,
     101    HV_GIC_ICC_REG_IGRPEN0_EL1,
     102    HV_GIC_ICC_REG_IGRPEN1_EL1,
     103    HV_GIC_ICC_REG_INVALID,
    94104    /** @todo */
    95105} hv_gic_icc_reg_t;
    … …  
    623633    }
    624634    return "";
     635}
     636
     637
     638/**
     639 * Converts an ICC system register into Darwin's Hypervisor.Framework equivalent.
     640 *
     641 * @returns HvF's ICC system register.
     642 * @param   u32Reg      The ARMv8 ICC system register.
     643 */
     644static hv_gic_icc_reg_t nemR3DarwinIccRegFromSysReg(uint32_t u32Reg)
     645{
     646    switch (u32Reg)
     647    {
     648        case ARMV8_AARCH64_SYSREG_ICC_PMR_EL1:      return HV_GIC_ICC_REG_PMR_EL1;
     649        case ARMV8_AARCH64_SYSREG_ICC_IAR0_EL1:     return HV_GIC_ICC_REG_INVALID;
     650        case ARMV8_AARCH64_SYSREG_ICC_EOIR0_EL1:    return HV_GIC_ICC_REG_INVALID;
     651        case ARMV8_AARCH64_SYSREG_ICC_HPPIR0_EL1:   return HV_GIC_ICC_REG_INVALID;
     652        case ARMV8_AARCH64_SYSREG_ICC_BPR0_EL1:     return HV_GIC_ICC_REG_BPR0_EL1;
     653        case ARMV8_AARCH64_SYSREG_ICC_AP0R0_EL1:    return HV_GIC_ICC_REG_AP0R0_EL1;
     654        case ARMV8_AARCH64_SYSREG_ICC_AP0R1_EL1:    return HV_GIC_ICC_REG_INVALID;
     655        case ARMV8_AARCH64_SYSREG_ICC_AP0R2_EL1:    return HV_GIC_ICC_REG_INVALID;
     656        case ARMV8_AARCH64_SYSREG_ICC_AP0R3_EL1:    return HV_GIC_ICC_REG_INVALID;
     657        case ARMV8_AARCH64_SYSREG_ICC_AP1R0_EL1:    return HV_GIC_ICC_REG_AP1R0_EL1;
     658        case ARMV8_AARCH64_SYSREG_ICC_AP1R1_EL1:    return HV_GIC_ICC_REG_INVALID;
     659        case ARMV8_AARCH64_SYSREG_ICC_AP1R2_EL1:    return HV_GIC_ICC_REG_INVALID;
     660        case ARMV8_AARCH64_SYSREG_ICC_AP1R3_EL1:    return HV_GIC_ICC_REG_INVALID;
     661        case ARMV8_AARCH64_SYSREG_ICC_NMIAR1_EL1:   return HV_GIC_ICC_REG_INVALID;
     662        case ARMV8_AARCH64_SYSREG_ICC_DIR_EL1:      return HV_GIC_ICC_REG_INVALID;
     663        case ARMV8_AARCH64_SYSREG_ICC_RPR_EL1:      return HV_GIC_ICC_REG_RPR_EL1;
     664        case ARMV8_AARCH64_SYSREG_ICC_SGI1R_EL1:    return HV_GIC_ICC_REG_INVALID;
     665        case ARMV8_AARCH64_SYSREG_ICC_ASGI1R_EL1:   return HV_GIC_ICC_REG_INVALID;
     666        case ARMV8_AARCH64_SYSREG_ICC_SGI0R_EL1:    return HV_GIC_ICC_REG_INVALID;
     667        case ARMV8_AARCH64_SYSREG_ICC_IAR1_EL1:     return HV_GIC_ICC_REG_INVALID;
     668        case ARMV8_AARCH64_SYSREG_ICC_EOIR1_EL1:    return HV_GIC_ICC_REG_INVALID;
     669        case ARMV8_AARCH64_SYSREG_ICC_HPPIR1_EL1:   return HV_GIC_ICC_REG_INVALID;
     670        case ARMV8_AARCH64_SYSREG_ICC_BPR1_EL1:     return HV_GIC_ICC_REG_BPR1_EL1;
     671        case ARMV8_AARCH64_SYSREG_ICC_CTLR_EL1:     return HV_GIC_ICC_REG_CTLR_EL1;
     672        case ARMV8_AARCH64_SYSREG_ICC_SRE_EL1:      return HV_GIC_ICC_REG_SRE_EL1;
     673        case ARMV8_AARCH64_SYSREG_ICC_IGRPEN0_EL1:  return HV_GIC_ICC_REG_IGRPEN0_EL1;
     674        case ARMV8_AARCH64_SYSREG_ICC_IGRPEN1_EL1:  return HV_GIC_ICC_REG_IGRPEN1_EL1;
     675    }
     676    AssertReleaseFailed();
     677    return HV_GIC_ICC_REG_INVALID;
    625678}
    626679
    … …  
    11411194
    11421195/**
    1143  * Sets the given SPI inside the in-kernel KVM GIC.
     1196 * Sets the given SPI inside the in-kernel HvF GIC.
    11441197 *
    11451198 * @returns VBox status code.
    … …  
    11481201 * @param   fAsserted   Flag whether the interrupt is asserted (true) or not (false).
    11491202 */
    1150 VMMR3_INT_DECL(int) GICR3NemSpiSet(PVMCC pVM, uint32_t uIntId, bool fAsserted)
     1203VMM_INT_DECL(int) NEMR3GicSetSpi(PVMCC pVM, uint32_t uIntId, bool fAsserted)
    11511204{
    11521205    RT_NOREF(pVM);
    … …  
    11591212
    11601213/**
    1161  * Sets the given PPI inside the in-kernel KVM GIC.
     1214 * Sets the given PPI inside the in-kernel HvF GIC.
    11621215 *
    11631216 * @returns VBox status code.
    1164  * @param   pVCpu       The vCPU for whih the PPI state is updated.
     1217 * @param   pVCpu       The vCPU for which the PPI state is to be updated.
    11651218 * @param   uIntId      The PPI ID to update.
    11661219 * @param   fAsserted   Flag whether the interrupt is asserted (true) or not (false).
    11671220 */
    1168 VMMR3_INT_DECL(int) GICR3NemPpiSet(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted)
     1221VMM_INT_DECL(int) NEMR3GicSetPpi(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted)
    11691222{
    11701223    RT_NOREF(pVCpu, uIntId, fAsserted);
    … …  
    11731226    AssertFailed();
    11741227    return VERR_NEM_IPE_9;
     1228}
     1229
     1230
     1231/**
     1232 * Writes a system ICC register inside the in-kernel HvF GIC.
     1233 *
     1234 * @returns VBox status code.
     1235 * @param   pVCpu       The cross context virtual CPU structure.
     1236 * @param   u32Reg      The ICC register.
     1237 * @param   u64Value    The value being set.
     1238 */
     1239VMM_INT_DECL(VBOXSTRICTRC) NEMR3GicWriteSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t u64Value)
     1240{
     1241    hv_gic_icc_reg_t const enmIccReg = nemR3DarwinIccRegFromSysReg(u32Reg);
     1242    hv_return_t const hrc = hv_gic_set_icc_reg(pVCpu->nem.s.hVCpu, enmIccReg, u64Value);
     1243    return nemR3DarwinHvSts2Rc(hrc);
     1244}
     1245
     1246
     1247/**
     1248 * Reads a system ICC register inside the in-kernel HvF GIC.
     1249 *
     1250 * @returns VBox status code.
     1251 * @param   pVCpu       The cross context virtual CPU structure.
     1252 * @param   u32Reg      The ICC register.
     1253 * @param   u64Value    Where to store value.
     1254 */
     1255VMM_INT_DECL(VBOXSTRICTRC) NEMR3GicReadSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t *pu64Value)
     1256{
     1257    hv_gic_icc_reg_t const enmIccReg = nemR3DarwinIccRegFromSysReg(u32Reg);
     1258    hv_return_t const hrc = hv_gic_get_icc_reg(pVCpu->nem.s.hVCpu, enmIccReg, pu64Value);
     1259    return nemR3DarwinHvSts2Rc(hrc);
    11751260}
    11761261
    … …  
    21212206            TMCpuSetVTimerNextActivation(pVCpu, UINT64_MAX);
    21222207            pVCpu->nem.s.fVTimerActivated = true;
    2123             return GICPpiSet(pVCpu, pVM->nem.s.u32GicPpiVTimer, true /*fAsserted*/);
     2208            return PDMGicSetPpi(pVCpu, pVM->nem.s.u32GicPpiVTimer, true /*fAsserted*/);
    21242209        }
    21252210        default:
    … …  
    22062291        {
    22072292            /* Clear the interrupt. */
    2208             GICPpiSet(pVCpu, pVM->nem.s.u32GicPpiVTimer, false /*fAsserted*/);
     2293            PDMGicSetPpi(pVCpu, pVM->nem.s.u32GicPpiVTimer, false /*fAsserted*/);
    22092294
    22102295            pVCpu->nem.s.fVTimerActivated = false;

  • trunk/src/VBox/VMM/VMMR3/NEMR3Native-linux-armv8.cpp

    r107026 r107308  
    3535#include <VBox/vmm/iem.h>
    3636#include <VBox/vmm/em.h>
    37 #include <VBox/vmm/gic.h>
     37#include <VBox/vmm/pdmgic.h>
    3838#include <VBox/vmm/pdm.h>
    3939#include <VBox/vmm/trpm.h>
    … …  
    11921192        {
    11931193            TMCpuSetVTimerNextActivation(pVCpu, UINT64_MAX);
    1194             GICPpiSet(pVCpu, pVM->nem.s.u32GicPpiVTimer, RT_BOOL(pRun->s.regs.device_irq_level & KVM_ARM_DEV_EL1_VTIMER));
     1194            PDMGicSetPpi(pVCpu, pVM->nem.s.u32GicPpiVTimer, RT_BOOL(pRun->s.regs.device_irq_level & KVM_ARM_DEV_EL1_VTIMER));
    11951195        }
    11961196
    … …  
    11981198        {
    11991199            //TMCpuSetVTimerNextActivation(pVCpu, UINT64_MAX);
    1200             GICPpiSet(pVCpu, pVM->nem.s.u32GicPpiVTimer, RT_BOOL(pRun->s.regs.device_irq_level & KVM_ARM_DEV_EL1_PTIMER));
     1200            PDMGicSetPpi(pVCpu, pVM->nem.s.u32GicPpiVTimer, RT_BOOL(pRun->s.regs.device_irq_level & KVM_ARM_DEV_EL1_PTIMER));
    12011201        }
    12021202

  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r107215 r107308  
    41864186
    41874187
    4188 /** @interface_method_impl{PDMDEVHLPR3,pfnApicRegister} */
    4189 static DECLCALLBACK(int) pdmR3DevHlp_ApicRegister(PPDMDEVINS pDevIns)
     4188/** @interface_method_impl{PDMDEVHLPR3,pfnIcRegister} */
     4189static DECLCALLBACK(int) pdmR3DevHlp_IcRegister(PPDMDEVINS pDevIns)
    41904190{
    41914191    PDMDEV_ASSERT_DEVINS(pDevIns);
    … …  
    42214221    RTCritSectRwLeaveExcl(&pVM->pdm.s.CoreListCritSectRw);
    42224222
    4223     LogFlow(("pdmR3DevHlp_ApicRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
     4223    LogFlow(("pdmR3DevHlp_IcRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
    42244224    return VINF_SUCCESS;
    42254225}
    … …  
    52755275    pdmR3DevHlp_IommuRegister,
    52765276    pdmR3DevHlp_PICRegister,
    5277     pdmR3DevHlp_ApicRegister,
     5277    pdmR3DevHlp_IcRegister,
    52785278    pdmR3DevHlp_IoApicRegister,
    52795279    pdmR3DevHlp_HpetRegister,
    … …  
    56765676    pdmR3DevHlp_IommuRegister,
    56775677    pdmR3DevHlp_PICRegister,
    5678     pdmR3DevHlp_ApicRegister,
     5678    pdmR3DevHlp_IcRegister,
    56795679    pdmR3DevHlp_IoApicRegister,
    56805680    pdmR3DevHlp_HpetRegister,
    … …  
    64056405    pdmR3DevHlp_IommuRegister,
    64066406    pdmR3DevHlp_PICRegister,
    6407     pdmR3DevHlp_ApicRegister,
     6407    pdmR3DevHlp_IcRegister,
    64086408    pdmR3DevHlp_IoApicRegister,
    64096409    pdmR3DevHlp_HpetRegister,

  • trunk/src/VBox/VMM/VMMR3/PDMDevice.cpp

    r107227 r107308  
    3535#include <VBox/vmm/pdm.h>
    3636#ifdef VBOX_VMM_TARGET_ARMV8
    37 # include <VBox/vmm/gic.h>
     37# include <VBox/vmm/pdmgic.h>
    3838# include <VBox/vmm/pmu.h>
    3939#elif defined(VBOX_VMM_TARGET_X86)

  • trunk/src/VBox/VMM/VMMR3/PMUR3.cpp

    r106479 r107308  
    3333#include <VBox/log.h>
    3434#include "PMUInternal.h"
    35 #include <VBox/vmm/gic.h>
     35#include <VBox/vmm/pdmgic.h>
    3636#include <VBox/vmm/cpum.h>
    3737#include <VBox/vmm/hm.h>

  • trunk/src/VBox/VMM/VMMR3/VMM.cpp

    r107227 r107308  
    131131#include <VBox/vmm/dbgf.h>
    132132#ifdef VBOX_VMM_TARGET_ARMV8
    133 # include <VBox/vmm/gic.h>
     133# include <VBox/vmm/pdmgic.h>
    134134#elif defined(VBOX_VMM_TARGET_X86)
    135135# include <VBox/vmm/pdmapic.h>
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