VirtualBox

Changeset 107703 in vbox for trunk/src/VBox/VMM/VMMR0


Ignore:
Timestamp:
Jan 11, 2025 10:55:53 PM (4 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
166799
Message:

VMM/CPUM: Try consolidate the MSR_IA32_ARCH_CAPABILITIES handling in CPUM and do better sanitizing of what's exposed to the guest. jiraref:VBP-947

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp

    r107650 r107703  
    361361         * Copy MSR_IA32_ARCH_CAPABILITIES bits over into the host and guest feature
    362362         * structure and as well as the guest MSR.
    363          * Note! we assume this happens after the CPUMR3Init is done, so CPUID bits are settled.
     363         * Note! We assume this happens after the CPUMR3Init is done, so CPUID bits are settled.
    364364         */
    365         pVM->cpum.s.HostFeatures.s.fArchRdclNo             = 0;
    366         pVM->cpum.s.HostFeatures.s.fArchIbrsAll            = 0;
    367         pVM->cpum.s.HostFeatures.s.fArchRsbOverride        = 0;
    368         pVM->cpum.s.HostFeatures.s.fArchVmmNeedNotFlushL1d = 0;
    369         pVM->cpum.s.HostFeatures.s.fArchMdsNo              = 0;
    370         uint32_t const cStdRange = ASMCpuId_EAX(0);
     365        uint64_t       fHostArchVal = 0;
     366        bool           fHasArchCap  = false;
     367        uint32_t const cStdRange    = ASMCpuId_EAX(0);
    371368        if (   RTX86IsValidStdRange(cStdRange)
    372369            && cStdRange >= 7)
     
    377374                && (fFeatures & X86_CPUID_FEATURE_EDX_MSR))
    378375            {
    379                 /* Host: */
    380                 uint64_t const fHostArchVal = ASMRdMsr(MSR_IA32_ARCH_CAPABILITIES);
    381                 uint64_t fArchVal = fHostArchVal;
    382                 pVM->cpum.s.HostFeatures.s.fArchRdclNo             = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RDCL_NO);
    383                 pVM->cpum.s.HostFeatures.s.fArchIbrsAll            = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_IBRS_ALL);
    384                 pVM->cpum.s.HostFeatures.s.fArchRsbOverride        = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RSBO);
    385                 pVM->cpum.s.HostFeatures.s.fArchVmmNeedNotFlushL1d = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_VMM_NEED_NOT_FLUSH_L1D);
    386                 pVM->cpum.s.HostFeatures.s.fArchMdsNo              = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_MDS_NO);
    387 
    388                 /* guest: */
    389                 if (!pVM->cpum.s.GuestFeatures.fArchCap)
    390                     fArchVal = 0;
    391                 else if (!pVM->cpum.s.GuestFeatures.fIbrs)
    392                     fArchVal &= ~MSR_IA32_ARCH_CAP_F_IBRS_ALL;
    393                 VMCC_FOR_EACH_VMCPU_STMT(pVM, pVCpu->cpum.s.GuestMsrs.msr.ArchCaps = fArchVal);
    394                 pVM->cpum.s.GuestFeatures.fArchRdclNo             = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RDCL_NO);
    395                 pVM->cpum.s.GuestFeatures.fArchIbrsAll            = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_IBRS_ALL);
    396                 pVM->cpum.s.GuestFeatures.fArchRsbOverride        = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RSBO);
    397                 pVM->cpum.s.GuestFeatures.fArchVmmNeedNotFlushL1d = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_VMM_NEED_NOT_FLUSH_L1D);
    398                 pVM->cpum.s.GuestFeatures.fArchMdsNo              = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_MDS_NO);
    399                 LogRel(("CPUM: IA32_ARCH_CAPABILITIES (Host=%#RX64 Guest=%#RX64)\n", fHostArchVal, fArchVal));
     376                fHostArchVal = ASMRdMsr(MSR_IA32_ARCH_CAPABILITIES);
     377                fHasArchCap  = true;
    400378            }
    401             else
    402             {
    403                 pVM->cpum.s.HostFeatures.s.fArchCap = 0;
    404                 LogRel(("CPUM: IA32_ARCH_CAPABILITIES unsupported\n"));
    405             }
    406         }
     379        }
     380        CPUMCpuIdApplyX86HostArchCapabilities(pVM, fHasArchCap, fHostArchVal);
    407381
    408382        /*
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