Changeset 107703 in vbox for trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin.cpp

Timestamp:

Jan 11, 2025 10:55:53 PM (3 weeks ago)

Author:

vboxsync

Message:

VMM/CPUM: Try consolidate the MSR_IA32_ARCH_CAPABILITIES handling in CPUM and do better sanitizing of what's exposed to the guest. jiraref:VBP-947

File:

• trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin.cpp

@@ -2203 +2203 @@
     /*
      * Get MSR_IA32_ARCH_CAPABILITIES and expand it into the host feature structure.
+     *
      * This is only available with 11.0+ (BigSur) as the required API is only available there,
      * we could in theory initialize this when creating the EMTs using hv_vcpu_read_msr() but
      * the required vCPU handle is created after CPUM was initialized which is too late.
      * Given that the majority of users is on 11.0 and later we don't care for now.
+     *
+     * (Yes, this is done after CPUM init.)
      */
+    uint64_t fHostArchVal = 0;
+    bool     fHasArchCap  = false;
     if (   hrc == HV_SUCCESS
         && hv_vmx_get_msr_info)
     {
-        g_CpumHostFeatures.s.fArchRdclNo             = 0;
-        g_CpumHostFeatures.s.fArchIbrsAll            = 0;
-        g_CpumHostFeatures.s.fArchRsbOverride        = 0;
-        g_CpumHostFeatures.s.fArchVmmNeedNotFlushL1d = 0;
-        g_CpumHostFeatures.s.fArchMdsNo              = 0;
         uint32_t const cStdRange = ASMCpuId_EAX(0);
         if (   RTX86IsValidStdRange(cStdRange)
@@ -2226 +2226 @@
                 && (fStdFeaturesEdx    & X86_CPUID_FEATURE_EDX_MSR))
             {
-                uint64_t fArchVal;
-                hrc = hv_vmx_get_msr_info(HV_VMX_INFO_MSR_IA32_ARCH_CAPABILITIES, &fArchVal);
-                if (hrc == HV_SUCCESS)
-                {
-                    g_CpumHostFeatures.s.fArchRdclNo             = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RDCL_NO);
-                    g_CpumHostFeatures.s.fArchIbrsAll            = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_IBRS_ALL);
-                    g_CpumHostFeatures.s.fArchRsbOverride        = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RSBO);
-                    g_CpumHostFeatures.s.fArchVmmNeedNotFlushL1d = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_VMM_NEED_NOT_FLUSH_L1D);
-                    g_CpumHostFeatures.s.fArchMdsNo              = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_MDS_NO);
-                }
+                fHasArchCap = true;
+                hrc = hv_vmx_get_msr_info(HV_VMX_INFO_MSR_IA32_ARCH_CAPABILITIES, &fHostArchVal);
+                if (hrc != HV_SUCCESS)
+                    fHostArchVal = 0;
             }
-            else
-                g_CpumHostFeatures.s.fArchCap = 0;
-        }
-    }
+        }
+    }
+    CPUMCpuIdApplyX86HostArchCapabilities(pVM, fHasArchCap, fHostArchVal);
 
     return nemR3DarwinHvSts2Rc(hrc);