VirtualBox

Changeset 107729 in vbox


Ignore:
Timestamp:
Jan 13, 2025 10:08:51 PM (2 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
166835
Message:

VMM/CPUM: Explode more MSR_IA32_ARCH_CAPABILITIES bits into the CPUMFEATURES. VBP-947

Location:
trunk
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/cpum.h

    r107703 r107729  
    556556    uint32_t        fSpeculationControl : 1;
    557557
    558     /** MSR_IA32_ARCH_CAPABILITIES: RDCL_NO (bit 0).
    559      * @remarks Only safe use after CPUM ring-0 init! */
     558    /** @name MSR_IA32_ARCH_CAPABILITIES
     559     * @remarks Only safe use after CPUM ring-0 init!
     560     * @{  */
     561    /** MSR_IA32_ARCH_CAPABILITIES[0]: RDCL_NO */
    560562    uint32_t        fArchRdclNo : 1;
    561     /** MSR_IA32_ARCH_CAPABILITIES: IBRS_ALL (bit 1).
    562      * @remarks Only safe use after CPUM ring-0 init! */
     563    /** MSR_IA32_ARCH_CAPABILITIES[1]: IBRS_ALL */
    563564    uint32_t        fArchIbrsAll : 1;
    564     /** MSR_IA32_ARCH_CAPABILITIES: RSB Override (bit 2).
    565      * @remarks Only safe use after CPUM ring-0 init! */
     565    /** MSR_IA32_ARCH_CAPABILITIES[2]: RSB Alternate */
    566566    uint32_t        fArchRsbOverride : 1;
    567     /** MSR_IA32_ARCH_CAPABILITIES: RSB Override (bit 3).
    568      * @remarks Only safe use after CPUM ring-0 init! */
     567    /** MSR_IA32_ARCH_CAPABILITIES[3]: SKIP_L1DFL_VMENTRY */
    569568    uint32_t        fArchVmmNeedNotFlushL1d : 1;
    570     /** MSR_IA32_ARCH_CAPABILITIES: MDS_NO (bit 4).
    571      * @remarks Only safe use after CPUM ring-0 init! */
     569    /** MSR_IA32_ARCH_CAPABILITIES[4]: SSB_NO - No Speculative Store Bypass */
     570    uint32_t        fArchSsbNo : 1;
     571    /** MSR_IA32_ARCH_CAPABILITIES[5]: MDS_NO - No Microarchitecural Data Sampling */
    572572    uint32_t        fArchMdsNo : 1;
    573 
    574     /** Alignment padding / reserved for future use (96 bits total, plus 12 bytes
    575      *  prior to the bit fields -> total of 24 bytes) */
    576     uint32_t        fPadding0 : 19;
    577 
     573    /** MSR_IA32_ARCH_CAPABILITIES[6]: IF_PSCHANGE_MC_NO */
     574    uint32_t        fArchIfPschangeMscNo : 1;
     575    /** MSR_IA32_ARCH_CAPABILITIES[7]: TSX_CTRL (MSR: IA32_TSX_CTRL_MSR[1:0]) */
     576    uint32_t        fArchTsxCtrl : 1;
     577    /** MSR_IA32_ARCH_CAPABILITIES[8]: TAA_NO - No Transactional Synchronization
     578     *  Extensions Asynchronous Abort. */
     579    uint32_t        fArchTaaNo : 1;
     580    /** MSR_IA32_ARCH_CAPABILITIES[10]: MISC_PACKAGE_CTRLS (MSR: IA32_UARCH_MISC_CTL) */
     581    uint32_t        fArchMiscPackageCtrls : 1;
     582    /** MSR_IA32_ARCH_CAPABILITIES[11]: ENERGY_FILTERING_CTL (MSR: IA32_MISC_PACKAGE_CTLS[0]) */
     583    uint32_t        fArchEnergyFilteringCtl : 1;
     584    /** MSR_IA32_ARCH_CAPABILITIES[12]: DOITM (MSR: IA32_UARCH_MISC_CTL[0]) */
     585    uint32_t        fArchDoitm : 1;
     586    /** MSR_IA32_ARCH_CAPABILITIES[13]: SBDR_SSDP_NO - No Shared Buffers Data Read
     587     * nor Sideband Stale Data Propagator issues. */
     588    uint32_t        fArchSbdrSsdpNo : 1;
     589    /** MSR_IA32_ARCH_CAPABILITIES[14]: FBSDP_NO - Fill Buffer Stale Data Propagator */
     590    uint32_t        fArchFbsdpNo : 1;
     591    /** MSR_IA32_ARCH_CAPABILITIES[15]: PSDP_NO - Primary Stale Data Propagator */
     592    uint32_t        fArchPsdpNo : 1;
     593    /** MSR_IA32_ARCH_CAPABILITIES[17]: FB_CLEAR (VERW) */
     594    uint32_t        fArchFbClear : 1;
     595    /** MSR_IA32_ARCH_CAPABILITIES[18]: FB_CLEAR_CTRL (MSR: IA32_MCU_OPT_CTRL[3]) */
     596    uint32_t        fArchFbClearCtrl : 1;
     597    /** MSR_IA32_ARCH_CAPABILITIES[19]: RRSBA  */
     598    uint32_t        fArchRrsba : 1;
     599    /** MSR_IA32_ARCH_CAPABILITIES[20]: BHI_NO */
     600    uint32_t        fArchBhiNo : 1;
     601    /** MSR_IA32_ARCH_CAPABILITIES[21]: XAPIC_DISABLE_STATUS (MSR: IA32_XAPIC_DISABLE_STATUS ) */
     602    uint32_t        fArchXapicDisableStatus : 1;
     603    /** MSR_IA32_ARCH_CAPABILITIES[23]: OVERCLOCKING_STATUS (MSR: IA32_OVERCLOCKING STATUS) */
     604    uint32_t        fArchOverclockingStatus : 1;
     605    /** MSR_IA32_ARCH_CAPABILITIES[24]: PBRSB_NO - No post-barrier Return Stack Buffer predictions */
     606    uint32_t        fArchPbrsbNo : 1;
     607    /** MSR_IA32_ARCH_CAPABILITIES[25]: GDS_CTRL (MSR: IA32_MCU_OPT_CTRL[5:4]) */
     608    uint32_t        fArchGdsCtrl : 1;
     609    /** MSR_IA32_ARCH_CAPABILITIES[26]: GDS_NO - No Gather Data Sampling  */
     610    uint32_t        fArchGdsNo : 1;
     611    /** MSR_IA32_ARCH_CAPABILITIES[27]: RFDS_NO - No Register File Data Sampling */
     612    uint32_t        fArchRfdsNo : 1;
     613    /** MSR_IA32_ARCH_CAPABILITIES[28]: RFDS_CLEAR (VERW++)  */
     614    uint32_t        fArchRfdsClear : 1;
     615    /** MSR_IA32_ARCH_CAPABILITIES[29]: IGN_UMONITOR_SUPPORT (MSR: IA32_MCU_OPT_CTRL[6]) */
     616    uint32_t        fArchIgnUmonitorSupport : 1;
     617    /** MSR_IA32_ARCH_CAPABILITIES[30]: MON_UMON_MITG_SUPPORT (MSR: IA32_MCU_OPT_CTRL[7]) */
     618    uint32_t        fArchMonUmonMitigSupport : 1;
     619    /** @} */
     620
     621    /** Alignment padding / reserved for future use. */
     622    uint32_t        fPadding0 : 28;
     623    uint32_t        auPadding[3];
    578624
    579625    /** @name SVM
    … …  
    839885    /** VMX: Padding / reserved for future, making it a total of 128 bits.  */
    840886    uint32_t        fVmxPadding1;
    841     uint32_t        auPadding[4];
    842887} CPUMFEATURESX86;
    843888#ifndef VBOX_FOR_DTRACE_LIB

  • trunk/include/iprt/x86.h

    r107703 r107729  
    16391639#define MSR_BBL_CR_CTL3                     UINT32_C(0x11e)
    16401640
    1641 /** Microcode Update Operation Control (R/W). */
     1641/** Microcode Update Option Control (R/W). */
    16421642#define MSR_IA32_MCU_OPT_CTRL                       0x123
     1643/** MSR_IA32_MCU_OPT_CTRL[0]: RNGDS_MITG_DIS - disable SRBDS mitigations
     1644 *  for RDRAND & RDSEED when set. */
    16431645#define MSR_IA32_MCU_OPT_CTRL_RNGDS_MITG_DIS        RT_BIT_64(0)
     1646/** MSR_IA32_MCU_OPT_CTRL[1]: RTM_ALLOW - Allow TXS according to IA32_TSX_CTRL. */
    16441647#define MSR_IA32_MCU_OPT_CTRL_RTM_ALLOW             RT_BIT_64(1)
     1648/** MSR_IA32_MCU_OPT_CTRL[2]: RTM_LOCKED - Lock RTM_ALLOW at zero. */
    16451649#define MSR_IA32_MCU_OPT_CTRL_RTM_LOCKED            RT_BIT_64(2)
     1650/** MSR_IA32_MCU_OPT_CTRL[3]: FB_CLEAR_DIS - Disables FB_CLEAR part of VERW. */
    16461651#define MSR_IA32_MCU_OPT_CTRL_FB_CLEAR_DIS          RT_BIT_64(3)
     1652/** MSR_IA32_MCU_OPT_CTRL[4]: GDS_MITG_DIS - Disables GDS mitigation on core. */
    16471653#define MSR_IA32_MCU_OPT_CTRL_GDS_MITG_DIS          RT_BIT_64(4)
     1654/** MSR_IA32_MCU_OPT_CTRL[5]: GDS_MITG_DIS - Disables GDS mitigation on core. */
    16481655#define MSR_IA32_MCU_OPT_CTRL_GDS_MITG_LOCK         RT_BIT_64(5)
     1656/** MSR_IA32_MCU_OPT_CTRL[6]: IGN_UMONITOR - Ignore UMONITOR & fail UMWAIT. */
    16491657#define MSR_IA32_MCU_OPT_CTRL_IGN_UMONITOR          RT_BIT_64(6)
     1658/** MSR_IA32_MCU_OPT_CTRL[7]: MON_UMON_MITG - UMONITOR/MONITOR mitigation
     1659 * (may affect sibling hyperthreads). */
    16501660#define MSR_IA32_MCU_OPT_CTRL_MON_UMON_MITG         RT_BIT_64(7)
    16511661/* Bits 63:7 reserved. */

  • trunk/src/VBox/VMM/VMMAll/CPUMAllCpuId.cpp

    r107703 r107729  
    16561656    pFeatures->fArchRsbOverride        = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RSBO);
    16571657    pFeatures->fArchVmmNeedNotFlushL1d = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_VMM_NEED_NOT_FLUSH_L1D);
    1658 #if 0
    16591658    pFeatures->fArchSsbNo              = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_SSB_NO);
    1660 #endif
    16611659    pFeatures->fArchMdsNo              = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_MDS_NO);
    1662 #if 0
    16631660    pFeatures->fArchIfPschangeMscNo    = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_IF_PSCHANGE_MC_NO);
    16641661    pFeatures->fArchTsxCtrl            = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_TSX_CTRL);
    … …  
    16741671    pFeatures->fArchRrsba              = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_RRSBA);
    16751672    pFeatures->fArchBhiNo              = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_BHI_NO);
    1676     pFeatures->fArchXapicDisableStatus = RT_BOOL(fArchVal & XAPIC_DISABLE_STATUS);
     1673    pFeatures->fArchXapicDisableStatus = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_XAPIC_DISABLE_STATUS);
    16771674    pFeatures->fArchOverclockingStatus = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_OVERCLOCKING_STATUS);
    16781675    pFeatures->fArchPbrsbNo            = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_PBRSB_NO);
    … …  
    16831680    pFeatures->fArchIgnUmonitorSupport = RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_IGN_UMONITOR_SUPPORT);
    16841681    pFeatures->fArchMonUmonMitigSupport= RT_BOOL(fArchVal & MSR_IA32_ARCH_CAP_F_MON_UMON_MITIG_SUPPORT);
    1685 #endif
    16861682}
    16871683
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