VirtualBox

Ignore:
Timestamp:
Jan 28, 2025 8:38:40 AM (3 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
167204
Message:

VMM/GIC: bugref:10404 Some register renaming, minor bits.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/GICAll.cpp

    r107929 r107957  
    300300
    301301/**
    302  * Updates the internal IRQ state and sets or clears the appropirate force action flags.
     302 * Updates the internal IRQ state and sets or clears the appropriate force action
     303 * flags.
    303304 *
    304305 * @returns Strict VBox status code.
    … …  
    385386{
    386387    VMCPU_ASSERT_EMT(pVCpu);
    387     PGICDEV pThis  = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
     388    PGICDEV pThis = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
    388389
    389390    if (offReg >= GIC_DIST_REG_IROUTERn_OFF_START && offReg <= GIC_DIST_REG_IROUTERn_OFF_LAST)
    … …  
    437438            AssertReleaseFailed();
    438439            break;
    439         case GIC_DIST_REG_IPRIORITYn_OFF_START:
    440         case GIC_DIST_REG_IPRIORITYn_OFF_START + 4: /* These are banked for the PEs and access the redistributor. */
     440        case GIC_DIST_REG_IPRIORITYRn_OFF_START:
     441        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 4: /* These are banked for the PEs and access the redistributor. */
    441442        {
    442443            PGICCPU pGicVCpu = VMCPU_TO_GICCPU(pVCpu);
    443444
    444445            /* Figure out the register which is written. */
    445             uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START;
     446            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START;
    446447            Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
    447448
    … …  
    453454            break;
    454455        }
    455         case GIC_DIST_REG_IPRIORITYn_OFF_START + 32: /* Only 32 lines for now. */
     456        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 32: /* Only 32 lines for now. */
    456457        {
    457458            /* Figure out the register which is written. */
    458             uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START - 32;
     459            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START - 32;
    459460            Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
    460461
    … …  
    491492            break;
    492493        case GIC_DIST_REG_PIDR2_OFF:
    493             *puValue = GIC_REDIST_REG_PIDR2_ARCH_REV_SET(GIC_REDIST_REG_PIDR2_ARCH_REV_GICV3);
     494            Assert(pThis->uArchRev <= GIC_DIST_REG_PIDR2_ARCH_REV_GICV4);
     495            *puValue = GIC_DIST_REG_PIDR2_ARCH_REV_SET(pThis->uArchRev);
    494496            break;
    495497        case GIC_DIST_REG_IIDR_OFF:
    … …  
    519521{
    520522    VMCPU_ASSERT_EMT(pVCpu); RT_NOREF(pVCpu);
    521     PGICDEV pThis  = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
    522     PVMCC    pVM   = PDMDevHlpGetVM(pDevIns);
     523    PGICDEV pThis = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
     524    PVMCC   pVM   = PDMDevHlpGetVM(pDevIns);
    523525
    524526    if (offReg >= GIC_DIST_REG_IROUTERn_OFF_START && offReg <= GIC_DIST_REG_IROUTERn_OFF_LAST)
    … …  
    586588            rcStrict = gicDistUpdateIrqState(pVM, pThis);
    587589            break;
    588         case GIC_DIST_REG_IPRIORITYn_OFF_START: /* These are banked for the PEs and access the redistributor. */
    589         case GIC_DIST_REG_IPRIORITYn_OFF_START + 4:
    590         case GIC_DIST_REG_IPRIORITYn_OFF_START + 8:
    591         case GIC_DIST_REG_IPRIORITYn_OFF_START + 12:
    592         case GIC_DIST_REG_IPRIORITYn_OFF_START + 16:
    593         case GIC_DIST_REG_IPRIORITYn_OFF_START + 20:
    594         case GIC_DIST_REG_IPRIORITYn_OFF_START + 24:
    595         case GIC_DIST_REG_IPRIORITYn_OFF_START + 28:
     590        case GIC_DIST_REG_IPRIORITYRn_OFF_START: /* These are banked for the PEs and access the redistributor. */
     591        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 4:
     592        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 8:
     593        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 12:
     594        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 16:
     595        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 20:
     596        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 24:
     597        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 28:
    596598        {
    597599            PGICCPU pGicVCpu = VMCPU_TO_GICCPU(pVCpu);
    598600
    599601            /* Figure out the register which is written. */
    600             uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START;
     602            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START;
    601603            Assert(idxPrio <= RT_ELEMENTS(pGicVCpu->abIntPriority) - sizeof(uint32_t));
    602604            for (uint32_t i = idxPrio; i < idxPrio + sizeof(uint32_t); i++)
    … …  
    607609            break;
    608610        }
    609         case GIC_DIST_REG_IPRIORITYn_OFF_START + 32: /* Only 32 lines for now. */
    610         case GIC_DIST_REG_IPRIORITYn_OFF_START + 36:
    611         case GIC_DIST_REG_IPRIORITYn_OFF_START + 40:
    612         case GIC_DIST_REG_IPRIORITYn_OFF_START + 44:
    613         case GIC_DIST_REG_IPRIORITYn_OFF_START + 48:
    614         case GIC_DIST_REG_IPRIORITYn_OFF_START + 52:
    615         case GIC_DIST_REG_IPRIORITYn_OFF_START + 56:
    616         case GIC_DIST_REG_IPRIORITYn_OFF_START + 60:
     611        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 32: /* Only 32 lines for now. */
     612        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 36:
     613        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 40:
     614        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 44:
     615        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 48:
     616        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 52:
     617        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 56:
     618        case GIC_DIST_REG_IPRIORITYRn_OFF_START + 60:
    617619        {
    618620            /* Figure out the register which is written. */
    619             uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYn_OFF_START - 32;
     621            uint8_t idxPrio = offReg - GIC_DIST_REG_IPRIORITYRn_OFF_START - 32;
    620622            Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
    621623            for (uint32_t i = idxPrio; i < idxPrio + sizeof(uint32_t); i++)
    … …  
    686688DECLINLINE(VBOXSTRICTRC) gicReDistRegisterRead(PPDMDEVINS pDevIns, PVMCPUCC pVCpu, uint32_t idRedist, uint16_t offReg, uint32_t *puValue)
    687689{
    688     RT_NOREF(pDevIns);
     690    PGICDEV pThis = PDMDEVINS_2_DATA(pDevIns, PGICDEV);
    689691
    690692    switch (offReg)
    … …  
    702704            break;
    703705        case GIC_REDIST_REG_PIDR2_OFF:
    704             *puValue = GIC_REDIST_REG_PIDR2_ARCH_REV_SET(GIC_REDIST_REG_PIDR2_ARCH_REV_GICV3);
     706            Assert(pThis->uArchRev <= GIC_DIST_REG_PIDR2_ARCH_REV_GICV4);
     707            *puValue = GIC_REDIST_REG_PIDR2_ARCH_REV_SET(pThis->uArchRev);
    705708            break;
    706709        default:
    … …  
    741744            *puValue = ASMAtomicReadU32(&pThis->bmIntActive);
    742745            break;
    743         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START:
    744         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  4:
    745         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  8:
    746         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 12:
    747         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 16:
    748         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 20:
    749         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 24:
    750         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 28:
     746        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START:
     747        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  4:
     748        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  8:
     749        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 12:
     750        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 16:
     751        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 20:
     752        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 24:
     753        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 28:
    751754        {
    752755            /* Figure out the register which is written. */
    753             uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START;
     756            uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START;
    754757            Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
    755758
    … …  
    875878            rcStrict = gicReDistUpdateIrqState(pThis, pVCpu);
    876879            break;
    877         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START:
    878         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  4:
    879         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START +  8:
    880         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 12:
    881         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 16:
    882         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 20:
    883         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 24:
    884         case GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START + 28:
     880        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START:
     881        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  4:
     882        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START +  8:
     883        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 12:
     884        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 16:
     885        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 20:
     886        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 24:
     887        case GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START + 28:
    885888        {
    886             /* Figure out the register whch is written. */
    887             uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYn_OFF_START;
     889            /* Figure out the register which is written. */
     890            uint8_t idxPrio = offReg - GIC_REDIST_SGI_PPI_REG_IPRIORITYRn_OFF_START;
    888891            Assert(idxPrio <= RT_ELEMENTS(pThis->abIntPriority) - sizeof(uint32_t));
    889892            for (uint32_t i = idxPrio; i < idxPrio + sizeof(uint32_t); i++)
    … …  
    14161419
    14171420    /*
    1418      * Determine the redistributor being targeted. Each redistributor takes GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
     1421     * Determine the redistributor being targeted. Each redistributor takes
     1422     * GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
    14191423     * and the redistributors are adjacent.
    14201424     */
    … …  
    14561460
    14571461    /*
    1458      * Determine the redistributor being targeted. Each redistributor takes GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
     1462     * Determine the redistributor being targeted. Each redistributor takes
     1463     * GIC_REDIST_REG_FRAME_SIZE + GIC_REDIST_SGI_PPI_REG_FRAME_SIZE bytes
    14591464     * and the redistributors are adjacent.
    14601465     */
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