VirtualBox

Changeset 108132 in vbox for trunk


Ignore:
Timestamp:
Feb 10, 2025 11:05:23 AM (3 months ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
167432
Message:

VMM/PGM: Merge and deduplicate code targeting x86 & amd64 in PGM.cpp. Don't bother compiling pool stuff on arm and darwin.amd64. jiraref:VBP-1531

Location:
trunk
Files:
18 edited
1 copied

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/pgm.h

    r107227 r108132  
    257257 *
    258258 * @note    Part of saved state.  Change with extreme care.
     259 * @note    Due to PGMGetShadowMode() and the possibility that we will be
     260 *          running ARMv8 VMs on a AMD64 hosts, it's safer to combine these
     261 *          modes. We could rethink this if we start using PGMMODE exclusively
     262 *          for the guest mode and come up with a different enum for the host.
    259263 */
    260264typedef enum PGMMODE
    … …  
    262266    /** The usual invalid value. */
    263267    PGMMODE_INVALID = 0,
    264 #ifndef VBOX_VMM_TARGET_ARMV8
     268
     269    /** @name X86
     270     * @{ */
    265271    /** Real mode. */
    266272    PGMMODE_REAL,
    … …  
    285291    /** Extended paging (Intel) mode. */
    286292    PGMMODE_EPT,
    287     /** Special mode used by NEM to indicate no shadow paging necessary. */
    288     PGMMODE_NONE,
    289 #else
    290     /** Paging is not enabled by the guest. */
    291     PGMMODE_NONE,
     293    /** @} */
     294
     295    /** ARMv8: Paging is not enabled by the guest.
     296     * AMD64 host: Special mode used by NEM to indicate no shadow paging
     297     * necessary.  Not used by X86 guests. */
     298    PGMMODE_NONE = 32,
     299
     300    /** @name ARMv8
     301     * @{ */
    292302    /** VMSAv8-32 Virtual Memory System Architecture v8 - 32-bit variant enabled. */
    293303    PGMMODE_VMSA_V8_32,
    294304    /** VMSAv8-64 Virtual Memory System Architecture v8 - 64-bit variant enabled. */
    295305    PGMMODE_VMSA_V8_64,
    296 #endif
     306    /** @} */
     307
    297308    /** The max number of modes */
    298309    PGMMODE_MAX,
    … …  
    782793VMM_INT_DECL(const char *) PGMGetSlatModeName(PGMSLAT enmSlatMode);
    783794#endif
    784 VMM_INT_DECL(RTGCPHYS) PGMGetGuestCR3Phys(PVMCPU pVCpu);
    785795VMM_INT_DECL(void)  PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe);
    786796VMMDECL(bool)       PGMHasDirtyPages(PVM pVM);

  • trunk/include/VBox/vmm/vmmr3vtable-def.h

    r107276 r108132  
    662662VTABLE_ENTRY(PGMPhysSimpleWriteGCPtr)
    663663VTABLE_ENTRY(PGMPhysWriteGCPtr)
    664 VTABLE_ENTRY(PGMShwMakePageWritable)
     664VTABLE_RESERVED(pfnPGMR3Reserved0)
    665665VTABLE_ENTRY(PGMR3QueryGlobalMemoryStats)
    666666VTABLE_ENTRY(PGMR3QueryMemoryStats)

  • trunk/src/VBox/VMM/Makefile.kmk

    r107893 r108132  
    169169        VMMR3/PGMHandler.cpp \
    170170        VMMR3/PGMPhys.cpp \
    171         VMMR3/PGMPool.cpp \
    172171        VMMR3/PGMSavedState.cpp \
    173172        VMMR3/PGMSharedPage.cpp \
    … …  
    219218        VMMAll/PGMAllHandler.cpp \
    220219        VMMAll/PGMAllPhys.cpp \
    221         VMMAll/PGMAllPool.cpp \
    222220        VMMAll/SELMAll.cpp \
    223221        VMMAll/EMAll.cpp \
    … …  
    233231        VMMAll/VMAll.cpp \
    234232        VMMAll/VMMAll.cpp
     233ifn1of (VBOX_WITH_ONLY_PGM_NEM_MODE, $(VBoxVMM_DEFS))
     234 VBoxVMM_SOURCES += \
     235        VMMR3/PGMPool.cpp \
     236        VMMAll/PGMAllPool.cpp
     237endif
    235238VBoxVMM_SOURCES.amd64 += \
    236239        VMMR3/PGMR3DbgA.asm \
    … …  
    466469        VMMR3/PDMThread.cpp \
    467470        VMMR3/PGM.cpp \
    468         VMMR3/PGM-armv8.cpp \
    469471        VMMR3/PGMDbg.cpp \
    470472        VMMR3/PGMHandler.cpp \
    471473        VMMR3/PGMPhys.cpp \
    472         VMMR3/PGMPool.cpp \
    473474        VMMR3/PGMSavedState.cpp \
    474475        VMMR3/PGMSharedPage.cpp \
    … …  
    502503        VMMAll/PDMAllQueue.cpp \
    503504        VMMAll/PDMAllTask.cpp \
     505        VMMAll/PGMAll.cpp \
    504506        VMMAll/PGMAllHandler.cpp \
    505507        VMMAll/PGMAllPhys.cpp \
    506         VMMAll/PGMAllPool.cpp \
    507508        VMMAll/EMAll.cpp \
    508509        VMMAll/GICAll.cpp \

  • trunk/src/VBox/VMM/VMMAll/AllPdbTypeHack.cpp

    r106061 r108132  
    3030*   Header Files                                                                                                                 *
    3131*********************************************************************************************************************************/
     32#ifdef VBOX_VMM_TARGET_AGNOSTIC
     33# ifdef RT_ARCH_AMD64
     34#  define VBOX_VMM_TARGET_X86
     35# elif defined(RT_ARCH_ARM64)
     36#  define VBOX_VMM_TARGET_ARMV8
     37# else
     38#  error "port me"
     39# endif
     40#endif
    3241#include <VBox/vmm/cfgm.h>
    3342#include <VBox/vmm/cpum.h>
    … …  
    4049#include "../include/PDMInternal.h"
    4150#include <VBox/vmm/pdm.h>
    42 #include "../include/CFGMInternal.h"
    43 #include "../include/CPUMInternal.h"
    44 #include "../include/MMInternal.h"
    45 #include "../include/PGMInternal.h"
    46 #include "../include/SELMInternal.h"
    47 #include "../include/TRPMInternal.h"
    48 #include "../include/TMInternal.h"
    49 #include "../include/IOMInternal.h"
     51#if !defined(VBOX_WITH_MINIMAL_R0) || !defined(IN_RING0)
     52# include "../include/CPUMInternal.h"
     53# include "../include/CFGMInternal.h"
     54# include "../include/MMInternal.h"
     55# include "../include/PGMInternal.h"
     56# include "../include/SELMInternal.h"
     57# include "../include/TRPMInternal.h"
     58# include "../include/TMInternal.h"
     59# include "../include/IOMInternal.h"
     60#endif
    5061#ifdef IN_RING3
    51 # include "../include/SSMInternal.h"
     62#  include "../include/SSMInternal.h"
    5263#endif
    53 #include "../include/HMInternal.h"
    5464#include "../include/VMMInternal.h"
    55 #include "../include/DBGFInternal.h"
    56 #include "../include/GIMInternal.h"
    57 #include "../include/APICInternal.h"
    58 #include "../include/STAMInternal.h"
     65#if !defined(VBOX_WITH_MINIMAL_R0) || !defined(IN_RING0)
     66# include "../include/HMInternal.h"
     67# include "../include/DBGFInternal.h"
     68# include "../include/GIMInternal.h"
     69# include "../include/APICInternal.h"
     70# include "../include/STAMInternal.h"
     71# include "../include/IEMInternal.h"
     72# include "../include/NEMInternal.h"
     73# include "../VMMR0/GMMR0Internal.h"
     74# include "../include/EMInternal.h"
     75#endif
    5976#include "../include/VMInternal.h"
    60 #include "../include/EMInternal.h"
    61 #include "../include/IEMInternal.h"
    62 #include "../include/NEMInternal.h"
    63 #include "../VMMR0/GMMR0Internal.h"
    6477#include "../VMMR0/GVMMR0Internal.h"
    6578#include <VBox/vmm/vmcc.h>

  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r107171 r108132  
    3232#define LOG_GROUP LOG_GROUP_PGM
    3333#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
     34#ifdef IN_RING0
     35# define VBOX_VMM_TARGET_X86
     36#endif
    3437#include <VBox/vmm/pgm.h>
    3538#include <VBox/vmm/cpum.h>
    … …  
    6063*   Internal Functions                                                                                                           *
    6164*********************************************************************************************************************************/
     65#ifdef VBOX_VMM_TARGET_X86
    6266DECLINLINE(int) pgmShwGetLongModePDPtr(PVMCPUCC pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD);
    6367DECLINLINE(int) pgmShwGetPaePoolPagePD(PVMCPUCC pVCpu, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde);
    6468DECLINLINE(int) pgmGstMapCr3(PVMCPUCC pVCpu, RTGCPHYS GCPhysCr3, PRTHCPTR pHCPtrGuestCr3);
    65 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     69# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    6670static int pgmGstSlatWalk(PVMCPUCC pVCpu, RTGCPHYS GCPhysNested, bool fIsLinearAddrValid, RTGCPTR GCPtrNested, PPGMPTWALK pWalk,
    6771                          PPGMPTWALKGST pGstWalk);
    … …  
    6973static int pgmShwGetNestedEPTPDPtr(PVMCPUCC pVCpu, RTGCPTR64 GCPhysNested, PEPTPDPT *ppPdpt, PEPTPD *ppPD,
    7074                                   PPGMPTWALKGST pGstWalkAll);
    71 #endif
     75# endif
    7276static int pgmShwSyncLongModePDPtr(PVMCPUCC pVCpu, RTGCPTR64 GCPtr, X86PGPAEUINT uGstPml4e, X86PGPAEUINT uGstPdpe, PX86PDPAE *ppPD);
    7377static int pgmShwGetEPTPDPtr(PVMCPUCC pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD);
    74 #ifdef PGM_WITH_PAGE_ZEROING_DETECTION
     78# ifdef PGM_WITH_PAGE_ZEROING_DETECTION
    7579static bool pgmHandlePageZeroingCode(PVMCPUCC pVCpu, PCPUMCTX pCtx);
    76 #endif
    77 
     80# endif
     81#endif /* VBOX_VMM_TARGET_X86 */
     82
     83
     84#ifdef VBOX_VMM_TARGET_X86
    7885
    7986/*
    8087 * Second level transation - EPT.
    8188 */
    82 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    83 # define PGM_SLAT_TYPE               PGM_SLAT_TYPE_EPT
    84 # include "PGMSlatDefs.h"
    85 # include "PGMAllGstSlatEpt.cpp.h"
    86 # undef PGM_SLAT_TYPE
    87 #endif
     89# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     90#  define PGM_SLAT_TYPE               PGM_SLAT_TYPE_EPT
     91#  include "PGMSlatDefs.h"
     92#  include "PGMAllGstSlatEpt.cpp.h"
     93#  undef PGM_SLAT_TYPE
     94# endif
    8895
    8996
    … …  
    9198 * Shadow - 32-bit mode
    9299 */
    93 #define PGM_SHW_TYPE                PGM_TYPE_32BIT
    94 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_32BIT(name)
    95 #include "PGMAllShw.h"
     100# define PGM_SHW_TYPE                PGM_TYPE_32BIT
     101# define PGM_SHW_NAME(name)          PGM_SHW_NAME_32BIT(name)
     102# include "PGMAllShw.h"
    96103
    97104/* Guest - real mode */
    98 #define PGM_GST_TYPE                PGM_TYPE_REAL
    99 #define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
    100 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_REAL(name)
    101 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
    102 #define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD_PHYS
    103 #include "PGMGstDefs.h"
    104 #include "PGMAllGst.h"
    105 #include "PGMAllBth.h"
    106 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    107 #undef BTH_PGMPOOLKIND_ROOT
    108 #undef PGM_BTH_NAME
    109 #undef PGM_GST_TYPE
    110 #undef PGM_GST_NAME
     105# define PGM_GST_TYPE                PGM_TYPE_REAL
     106# define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     107# define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_REAL(name)
     108# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
     109# define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD_PHYS
     110# include "PGMGstDefs.h"
     111# include "PGMAllGst.h"
     112# include "PGMAllBth.h"
     113# undef BTH_PGMPOOLKIND_PT_FOR_PT
     114# undef BTH_PGMPOOLKIND_ROOT
     115# undef PGM_BTH_NAME
     116# undef PGM_GST_TYPE
     117# undef PGM_GST_NAME
    111118
    112119/* Guest - protected mode */
    113 #define PGM_GST_TYPE                PGM_TYPE_PROT
    114 #define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
    115 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_PROT(name)
    116 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
    117 #define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD_PHYS
    118 #include "PGMGstDefs.h"
    119 #include "PGMAllGst.h"
    120 #include "PGMAllBth.h"
    121 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    122 #undef BTH_PGMPOOLKIND_ROOT
    123 #undef PGM_BTH_NAME
    124 #undef PGM_GST_TYPE
    125 #undef PGM_GST_NAME
     120# define PGM_GST_TYPE                PGM_TYPE_PROT
     121# define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     122# define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_PROT(name)
     123# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_PHYS
     124# define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD_PHYS
     125# include "PGMGstDefs.h"
     126# include "PGMAllGst.h"
     127# include "PGMAllBth.h"
     128# undef BTH_PGMPOOLKIND_PT_FOR_PT
     129# undef BTH_PGMPOOLKIND_ROOT
     130# undef PGM_BTH_NAME
     131# undef PGM_GST_TYPE
     132# undef PGM_GST_NAME
    126133
    127134/* Guest - 32-bit mode */
    128 #define PGM_GST_TYPE                PGM_TYPE_32BIT
    129 #define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
    130 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_32BIT(name)
    131 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT
    132 #define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB
    133 #define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD
    134 #include "PGMGstDefs.h"
    135 #include "PGMAllGst.h"
    136 #include "PGMAllBth.h"
    137 #undef BTH_PGMPOOLKIND_PT_FOR_BIG
    138 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    139 #undef BTH_PGMPOOLKIND_ROOT
    140 #undef PGM_BTH_NAME
    141 #undef PGM_GST_TYPE
    142 #undef PGM_GST_NAME
    143 
    144 #undef PGM_SHW_TYPE
    145 #undef PGM_SHW_NAME
    146 
    147 
    148 /*
    149  * Shadow - PAE mode
    150  */
    151 #define PGM_SHW_TYPE                PGM_TYPE_PAE
    152 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_PAE(name)
    153 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_REAL(name)
    154 #include "PGMAllShw.h"
    155 
    156 /* Guest - real mode */
    157 #define PGM_GST_TYPE                PGM_TYPE_REAL
    158 #define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
    159 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_REAL(name)
    160 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
    161 #define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_PHYS
    162 #include "PGMGstDefs.h"
    163 #include "PGMAllBth.h"
    164 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    165 #undef BTH_PGMPOOLKIND_ROOT
    166 #undef PGM_BTH_NAME
    167 #undef PGM_GST_TYPE
    168 #undef PGM_GST_NAME
    169 
    170 /* Guest - protected mode */
    171 #define PGM_GST_TYPE                PGM_TYPE_PROT
    172 #define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
    173 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_PROT(name)
    174 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
    175 #define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_PHYS
    176 #include "PGMGstDefs.h"
    177 #include "PGMAllBth.h"
    178 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    179 #undef BTH_PGMPOOLKIND_ROOT
    180 #undef PGM_BTH_NAME
    181 #undef PGM_GST_TYPE
    182 #undef PGM_GST_NAME
    183 
    184 /* Guest - 32-bit mode */
    185 #define PGM_GST_TYPE                PGM_TYPE_32BIT
    186 #define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
    187 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_32BIT(name)
    188 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
    189 #define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
    190 #define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_FOR_32BIT
    191 #include "PGMGstDefs.h"
    192 #include "PGMAllBth.h"
    193 #undef BTH_PGMPOOLKIND_PT_FOR_BIG
    194 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    195 #undef BTH_PGMPOOLKIND_ROOT
    196 #undef PGM_BTH_NAME
    197 #undef PGM_GST_TYPE
    198 #undef PGM_GST_NAME
    199 
    200 
    201 /* Guest - PAE mode */
    202 #define PGM_GST_TYPE                PGM_TYPE_PAE
    203 #define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
    204 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_PAE(name)
    205 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    206 #define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
    207 #define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT
    208 #include "PGMGstDefs.h"
    209 #include "PGMAllGst.h"
    210 #include "PGMAllBth.h"
    211 #undef BTH_PGMPOOLKIND_PT_FOR_BIG
    212 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    213 #undef BTH_PGMPOOLKIND_ROOT
    214 #undef PGM_BTH_NAME
    215 #undef PGM_GST_TYPE
    216 #undef PGM_GST_NAME
    217 
    218 #undef PGM_SHW_TYPE
    219 #undef PGM_SHW_NAME
    220 
    221 
    222 /*
    223  * Shadow - AMD64 mode
    224  */
    225 #define PGM_SHW_TYPE               PGM_TYPE_AMD64
    226 #define PGM_SHW_NAME(name)         PGM_SHW_NAME_AMD64(name)
    227 #include "PGMAllShw.h"
    228 
    229 /* Guest - protected mode (only used for AMD-V nested paging in 64 bits mode) */
    230 /** @todo retire this hack. */
    231 #define PGM_GST_TYPE               PGM_TYPE_PROT
    232 #define PGM_GST_NAME(name)         PGM_GST_NAME_PROT(name)
    233 #define PGM_BTH_NAME(name)         PGM_BTH_NAME_AMD64_PROT(name)
    234 #define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_PAE_PT_FOR_PHYS
    235 #define BTH_PGMPOOLKIND_ROOT       PGMPOOLKIND_PAE_PD_PHYS
    236 #include "PGMGstDefs.h"
    237 #include "PGMAllBth.h"
    238 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    239 #undef BTH_PGMPOOLKIND_ROOT
    240 #undef PGM_BTH_NAME
    241 #undef PGM_GST_TYPE
    242 #undef PGM_GST_NAME
    243 
    244 #ifdef VBOX_WITH_64_BITS_GUESTS
    245 /* Guest - AMD64 mode */
    246 # define PGM_GST_TYPE              PGM_TYPE_AMD64
    247 # define PGM_GST_NAME(name)        PGM_GST_NAME_AMD64(name)
    248 # define PGM_BTH_NAME(name)        PGM_BTH_NAME_AMD64_AMD64(name)
    249 # define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    250 # define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
    251 # define BTH_PGMPOOLKIND_ROOT      PGMPOOLKIND_64BIT_PML4
     135# define PGM_GST_TYPE                PGM_TYPE_32BIT
     136# define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     137# define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_32BIT(name)
     138# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT
     139# define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB
     140# define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_32BIT_PD
    252141# include "PGMGstDefs.h"
    253142# include "PGMAllGst.h"
    … …  
    259148# undef PGM_GST_TYPE
    260149# undef PGM_GST_NAME
    261 #endif /* VBOX_WITH_64_BITS_GUESTS */
    262 
    263 #undef PGM_SHW_TYPE
    264 #undef PGM_SHW_NAME
     150
     151# undef PGM_SHW_TYPE
     152# undef PGM_SHW_NAME
     153
     154
     155/*
     156 * Shadow - PAE mode
     157 */
     158# define PGM_SHW_TYPE                PGM_TYPE_PAE
     159# define PGM_SHW_NAME(name)          PGM_SHW_NAME_PAE(name)
     160# define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_REAL(name)
     161# include "PGMAllShw.h"
     162
     163/* Guest - real mode */
     164# define PGM_GST_TYPE                PGM_TYPE_REAL
     165# define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     166# define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_REAL(name)
     167# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     168# define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_PHYS
     169# include "PGMGstDefs.h"
     170# include "PGMAllBth.h"
     171# undef BTH_PGMPOOLKIND_PT_FOR_PT
     172# undef BTH_PGMPOOLKIND_ROOT
     173# undef PGM_BTH_NAME
     174# undef PGM_GST_TYPE
     175# undef PGM_GST_NAME
     176
     177/* Guest - protected mode */
     178# define PGM_GST_TYPE                PGM_TYPE_PROT
     179# define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     180# define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_PROT(name)
     181# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     182# define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_PHYS
     183# include "PGMGstDefs.h"
     184# include "PGMAllBth.h"
     185# undef BTH_PGMPOOLKIND_PT_FOR_PT
     186# undef BTH_PGMPOOLKIND_ROOT
     187# undef PGM_BTH_NAME
     188# undef PGM_GST_TYPE
     189# undef PGM_GST_NAME
     190
     191/* Guest - 32-bit mode */
     192# define PGM_GST_TYPE                PGM_TYPE_32BIT
     193# define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     194# define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_32BIT(name)
     195# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
     196# define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
     197# define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT_FOR_32BIT
     198# include "PGMGstDefs.h"
     199# include "PGMAllBth.h"
     200# undef BTH_PGMPOOLKIND_PT_FOR_BIG
     201# undef BTH_PGMPOOLKIND_PT_FOR_PT
     202# undef BTH_PGMPOOLKIND_ROOT
     203# undef PGM_BTH_NAME
     204# undef PGM_GST_TYPE
     205#  undef PGM_GST_NAME
     206
     207
     208/* Guest - PAE mode */
     209# define PGM_GST_TYPE                PGM_TYPE_PAE
     210# define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
     211# define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_PAE(name)
     212# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
     213# define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     214# define BTH_PGMPOOLKIND_ROOT        PGMPOOLKIND_PAE_PDPT
     215# include "PGMGstDefs.h"
     216# include "PGMAllGst.h"
     217# include "PGMAllBth.h"
     218# undef BTH_PGMPOOLKIND_PT_FOR_BIG
     219# undef BTH_PGMPOOLKIND_PT_FOR_PT
     220# undef BTH_PGMPOOLKIND_ROOT
     221# undef PGM_BTH_NAME
     222# undef PGM_GST_TYPE
     223# undef PGM_GST_NAME
     224
     225# undef PGM_SHW_TYPE
     226# undef PGM_SHW_NAME
     227
     228
     229/*
     230 * Shadow - AMD64 mode
     231 */
     232# define PGM_SHW_TYPE               PGM_TYPE_AMD64
     233# define PGM_SHW_NAME(name)         PGM_SHW_NAME_AMD64(name)
     234# include "PGMAllShw.h"
     235
     236/* Guest - protected mode (only used for AMD-V nested paging in 64 bits mode) */
     237/** @todo retire this hack. */
     238# define PGM_GST_TYPE               PGM_TYPE_PROT
     239# define PGM_GST_NAME(name)         PGM_GST_NAME_PROT(name)
     240# define PGM_BTH_NAME(name)         PGM_BTH_NAME_AMD64_PROT(name)
     241# define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_PAE_PT_FOR_PHYS
     242# define BTH_PGMPOOLKIND_ROOT       PGMPOOLKIND_PAE_PD_PHYS
     243# include "PGMGstDefs.h"
     244# include "PGMAllBth.h"
     245# undef BTH_PGMPOOLKIND_PT_FOR_PT
     246# undef BTH_PGMPOOLKIND_ROOT
     247# undef PGM_BTH_NAME
     248# undef PGM_GST_TYPE
     249# undef PGM_GST_NAME
     250
     251# ifdef VBOX_WITH_64_BITS_GUESTS
     252/* Guest - AMD64 mode */
     253#  define PGM_GST_TYPE              PGM_TYPE_AMD64
     254#  define PGM_GST_NAME(name)        PGM_GST_NAME_AMD64(name)
     255#  define PGM_BTH_NAME(name)        PGM_BTH_NAME_AMD64_AMD64(name)
     256#  define BTH_PGMPOOLKIND_PT_FOR_PT PGMPOOLKIND_PAE_PT_FOR_PAE_PT
     257#  define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     258#  define BTH_PGMPOOLKIND_ROOT      PGMPOOLKIND_64BIT_PML4
     259#  include "PGMGstDefs.h"
     260#  include "PGMAllGst.h"
     261#  include "PGMAllBth.h"
     262#  undef BTH_PGMPOOLKIND_PT_FOR_BIG
     263#  undef BTH_PGMPOOLKIND_PT_FOR_PT
     264#  undef BTH_PGMPOOLKIND_ROOT
     265#  undef PGM_BTH_NAME
     266#  undef PGM_GST_TYPE
     267#  undef PGM_GST_NAME
     268# endif /* VBOX_WITH_64_BITS_GUESTS */
     269
     270# undef PGM_SHW_TYPE
     271# undef PGM_SHW_NAME
    265272
    266273
    … …  
    268275 * Shadow - 32-bit nested paging mode.
    269276 */
    270 #define PGM_SHW_TYPE                PGM_TYPE_NESTED_32BIT
    271 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_32BIT(name)
    272 #include "PGMAllShw.h"
     277# define PGM_SHW_TYPE                PGM_TYPE_NESTED_32BIT
     278# define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_32BIT(name)
     279# include "PGMAllShw.h"
    273280
    274281/* Guest - real mode */
    275 #define PGM_GST_TYPE                PGM_TYPE_REAL
    276 #define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
    277 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_REAL(name)
    278 #include "PGMGstDefs.h"
    279 #include "PGMAllBth.h"
    280 #undef PGM_BTH_NAME
    281 #undef PGM_GST_TYPE
    282 #undef PGM_GST_NAME
    283 
    284 /* Guest - protected mode */
    285 #define PGM_GST_TYPE                PGM_TYPE_PROT
    286 #define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
    287 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_PROT(name)
    288 #include "PGMGstDefs.h"
    289 #include "PGMAllBth.h"
    290 #undef PGM_BTH_NAME
    291 #undef PGM_GST_TYPE
    292 #undef PGM_GST_NAME
    293 
    294 /* Guest - 32-bit mode */
    295 #define PGM_GST_TYPE                PGM_TYPE_32BIT
    296 #define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
    297 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_32BIT(name)
    298 #include "PGMGstDefs.h"
    299 #include "PGMAllBth.h"
    300 #undef PGM_BTH_NAME
    301 #undef PGM_GST_TYPE
    302 #undef PGM_GST_NAME
    303 
    304 /* Guest - PAE mode */
    305 #define PGM_GST_TYPE                PGM_TYPE_PAE
    306 #define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
    307 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_PAE(name)
    308 #include "PGMGstDefs.h"
    309 #include "PGMAllBth.h"
    310 #undef PGM_BTH_NAME
    311 #undef PGM_GST_TYPE
    312 #undef PGM_GST_NAME
    313 
    314 #ifdef VBOX_WITH_64_BITS_GUESTS
    315 /* Guest - AMD64 mode */
    316 # define PGM_GST_TYPE               PGM_TYPE_AMD64
    317 # define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
    318 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT_AMD64(name)
     282# define PGM_GST_TYPE                PGM_TYPE_REAL
     283# define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     284# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_REAL(name)
    319285# include "PGMGstDefs.h"
    320286# include "PGMAllBth.h"
    … …  
    322288# undef PGM_GST_TYPE
    323289# undef PGM_GST_NAME
    324 #endif /* VBOX_WITH_64_BITS_GUESTS */
    325 
    326 #undef PGM_SHW_TYPE
    327 #undef PGM_SHW_NAME
    328 
    329 
    330 /*
    331  * Shadow - PAE nested paging mode.
    332  */
    333 #define PGM_SHW_TYPE                PGM_TYPE_NESTED_PAE
    334 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_PAE(name)
    335 #include "PGMAllShw.h"
    336 
    337 /* Guest - real mode */
    338 #define PGM_GST_TYPE                PGM_TYPE_REAL
    339 #define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
    340 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_REAL(name)
    341 #include "PGMGstDefs.h"
    342 #include "PGMAllBth.h"
    343 #undef PGM_BTH_NAME
    344 #undef PGM_GST_TYPE
    345 #undef PGM_GST_NAME
    346290
    347291/* Guest - protected mode */
    348 #define PGM_GST_TYPE                PGM_TYPE_PROT
    349 #define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
    350 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_PROT(name)
    351 #include "PGMGstDefs.h"
    352 #include "PGMAllBth.h"
    353 #undef PGM_BTH_NAME
    354 #undef PGM_GST_TYPE
    355 #undef PGM_GST_NAME
    356 
    357 /* Guest - 32-bit mode */
    358 #define PGM_GST_TYPE                PGM_TYPE_32BIT
    359 #define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
    360 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_32BIT(name)
    361 #include "PGMGstDefs.h"
    362 #include "PGMAllBth.h"
    363 #undef PGM_BTH_NAME
    364 #undef PGM_GST_TYPE
    365 #undef PGM_GST_NAME
    366 
    367 /* Guest - PAE mode */
    368 #define PGM_GST_TYPE                PGM_TYPE_PAE
    369 #define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
    370 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_PAE(name)
    371 #include "PGMGstDefs.h"
    372 #include "PGMAllBth.h"
    373 #undef PGM_BTH_NAME
    374 #undef PGM_GST_TYPE
    375 #undef PGM_GST_NAME
    376 
    377 #ifdef VBOX_WITH_64_BITS_GUESTS
    378 /* Guest - AMD64 mode */
    379 # define PGM_GST_TYPE               PGM_TYPE_AMD64
    380 # define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
    381 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE_AMD64(name)
     292# define PGM_GST_TYPE                PGM_TYPE_PROT
     293# define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     294# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_PROT(name)
    382295# include "PGMGstDefs.h"
    383296# include "PGMAllBth.h"
    … …  
    385298# undef PGM_GST_TYPE
    386299# undef PGM_GST_NAME
    387 #endif /* VBOX_WITH_64_BITS_GUESTS */
    388 
    389 #undef PGM_SHW_TYPE
    390 #undef PGM_SHW_NAME
    391 
    392 
    393 /*
    394  * Shadow - AMD64 nested paging mode.
    395  */
    396 #define PGM_SHW_TYPE                PGM_TYPE_NESTED_AMD64
    397 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_AMD64(name)
    398 #include "PGMAllShw.h"
    399 
    400 /* Guest - real mode */
    401 #define PGM_GST_TYPE                PGM_TYPE_REAL
    402 #define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
    403 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_REAL(name)
    404 #include "PGMGstDefs.h"
    405 #include "PGMAllBth.h"
    406 #undef PGM_BTH_NAME
    407 #undef PGM_GST_TYPE
    408 #undef PGM_GST_NAME
    409 
    410 /* Guest - protected mode */
    411 #define PGM_GST_TYPE                PGM_TYPE_PROT
    412 #define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
    413 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_PROT(name)
    414 #include "PGMGstDefs.h"
    415 #include "PGMAllBth.h"
    416 #undef PGM_BTH_NAME
    417 #undef PGM_GST_TYPE
    418 #undef PGM_GST_NAME
    419300
    420301/* Guest - 32-bit mode */
    421 #define PGM_GST_TYPE                PGM_TYPE_32BIT
    422 #define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
    423 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_32BIT(name)
    424 #include "PGMGstDefs.h"
    425 #include "PGMAllBth.h"
    426 #undef PGM_BTH_NAME
    427 #undef PGM_GST_TYPE
    428 #undef PGM_GST_NAME
    429 
    430 /* Guest - PAE mode */
    431 #define PGM_GST_TYPE                PGM_TYPE_PAE
    432 #define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
    433 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_PAE(name)
    434 #include "PGMGstDefs.h"
    435 #include "PGMAllBth.h"
    436 #undef PGM_BTH_NAME
    437 #undef PGM_GST_TYPE
    438 #undef PGM_GST_NAME
    439 
    440 #ifdef VBOX_WITH_64_BITS_GUESTS
    441 /* Guest - AMD64 mode */
    442 # define PGM_GST_TYPE               PGM_TYPE_AMD64
    443 # define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
    444 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64_AMD64(name)
     302# define PGM_GST_TYPE                PGM_TYPE_32BIT
     303# define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     304# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_32BIT(name)
    445305# include "PGMGstDefs.h"
    446306# include "PGMAllBth.h"
    … …  
    448308# undef PGM_GST_TYPE
    449309# undef PGM_GST_NAME
    450 #endif /* VBOX_WITH_64_BITS_GUESTS */
    451 
    452 #undef PGM_SHW_TYPE
    453 #undef PGM_SHW_NAME
     310
     311/* Guest - PAE mode */
     312# define PGM_GST_TYPE                PGM_TYPE_PAE
     313# define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
     314# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_PAE(name)
     315# include "PGMGstDefs.h"
     316# include "PGMAllBth.h"
     317# undef PGM_BTH_NAME
     318# undef PGM_GST_TYPE
     319# undef PGM_GST_NAME
     320
     321# ifdef VBOX_WITH_64_BITS_GUESTS
     322/* Guest - AMD64 mode */
     323#  define PGM_GST_TYPE               PGM_TYPE_AMD64
     324#  define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
     325#  define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT_AMD64(name)
     326#  include "PGMGstDefs.h"
     327#  include "PGMAllBth.h"
     328#  undef PGM_BTH_NAME
     329#  undef PGM_GST_TYPE
     330#  undef PGM_GST_NAME
     331# endif /* VBOX_WITH_64_BITS_GUESTS */
     332
     333# undef PGM_SHW_TYPE
     334# undef PGM_SHW_NAME
     335
     336
     337/*
     338 * Shadow - PAE nested paging mode.
     339 */
     340# define PGM_SHW_TYPE                PGM_TYPE_NESTED_PAE
     341# define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_PAE(name)
     342# include "PGMAllShw.h"
     343
     344/* Guest - real mode */
     345# define PGM_GST_TYPE                PGM_TYPE_REAL
     346# define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     347# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_REAL(name)
     348# include "PGMGstDefs.h"
     349# include "PGMAllBth.h"
     350# undef PGM_BTH_NAME
     351# undef PGM_GST_TYPE
     352# undef PGM_GST_NAME
     353
     354/* Guest - protected mode */
     355# define PGM_GST_TYPE                PGM_TYPE_PROT
     356# define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     357# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_PROT(name)
     358# include "PGMGstDefs.h"
     359# include "PGMAllBth.h"
     360# undef PGM_BTH_NAME
     361# undef PGM_GST_TYPE
     362# undef PGM_GST_NAME
     363
     364/* Guest - 32-bit mode */
     365# define PGM_GST_TYPE                PGM_TYPE_32BIT
     366# define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     367# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_32BIT(name)
     368# include "PGMGstDefs.h"
     369# include "PGMAllBth.h"
     370# undef PGM_BTH_NAME
     371# undef PGM_GST_TYPE
     372# undef PGM_GST_NAME
     373
     374/* Guest - PAE mode */
     375# define PGM_GST_TYPE                PGM_TYPE_PAE
     376# define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
     377# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_PAE(name)
     378# include "PGMGstDefs.h"
     379# include "PGMAllBth.h"
     380# undef PGM_BTH_NAME
     381# undef PGM_GST_TYPE
     382# undef PGM_GST_NAME
     383
     384# ifdef VBOX_WITH_64_BITS_GUESTS
     385/* Guest - AMD64 mode */
     386#  define PGM_GST_TYPE               PGM_TYPE_AMD64
     387#  define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
     388#  define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE_AMD64(name)
     389#  include "PGMGstDefs.h"
     390#  include "PGMAllBth.h"
     391#  undef PGM_BTH_NAME
     392#  undef PGM_GST_TYPE
     393#  undef PGM_GST_NAME
     394# endif /* VBOX_WITH_64_BITS_GUESTS */
     395
     396# undef PGM_SHW_TYPE
     397# undef PGM_SHW_NAME
     398
     399
     400/*
     401 * Shadow - AMD64 nested paging mode.
     402 */
     403# define PGM_SHW_TYPE                PGM_TYPE_NESTED_AMD64
     404# define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_AMD64(name)
     405# include "PGMAllShw.h"
     406
     407/* Guest - real mode */
     408# define PGM_GST_TYPE                PGM_TYPE_REAL
     409# define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     410# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_REAL(name)
     411# include "PGMGstDefs.h"
     412# include "PGMAllBth.h"
     413# undef PGM_BTH_NAME
     414# undef PGM_GST_TYPE
     415# undef PGM_GST_NAME
     416
     417/* Guest - protected mode */
     418# define PGM_GST_TYPE                PGM_TYPE_PROT
     419# define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     420# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_PROT(name)
     421# include "PGMGstDefs.h"
     422# include "PGMAllBth.h"
     423# undef PGM_BTH_NAME
     424# undef PGM_GST_TYPE
     425# undef PGM_GST_NAME
     426
     427/* Guest - 32-bit mode */
     428# define PGM_GST_TYPE                PGM_TYPE_32BIT
     429# define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     430# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_32BIT(name)
     431# include "PGMGstDefs.h"
     432# include "PGMAllBth.h"
     433# undef PGM_BTH_NAME
     434# undef PGM_GST_TYPE
     435# undef PGM_GST_NAME
     436
     437/* Guest - PAE mode */
     438# define PGM_GST_TYPE                PGM_TYPE_PAE
     439# define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
     440# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_PAE(name)
     441# include "PGMGstDefs.h"
     442# include "PGMAllBth.h"
     443# undef PGM_BTH_NAME
     444# undef PGM_GST_TYPE
     445# undef PGM_GST_NAME
     446
     447# ifdef VBOX_WITH_64_BITS_GUESTS
     448/* Guest - AMD64 mode */
     449#  define PGM_GST_TYPE               PGM_TYPE_AMD64
     450#  define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
     451#  define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64_AMD64(name)
     452#  include "PGMGstDefs.h"
     453#  include "PGMAllBth.h"
     454#  undef PGM_BTH_NAME
     455#  undef PGM_GST_TYPE
     456#  undef PGM_GST_NAME
     457# endif /* VBOX_WITH_64_BITS_GUESTS */
     458
     459# undef PGM_SHW_TYPE
     460# undef PGM_SHW_NAME
    454461
    455462
    … …  
    457464 * Shadow - EPT.
    458465 */
    459 #define PGM_SHW_TYPE                PGM_TYPE_EPT
    460 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_EPT(name)
    461 #include "PGMAllShw.h"
     466# define PGM_SHW_TYPE                PGM_TYPE_EPT
     467# define PGM_SHW_NAME(name)          PGM_SHW_NAME_EPT(name)
     468# include "PGMAllShw.h"
    462469
    463470/* Guest - real mode */
    464 #define PGM_GST_TYPE                PGM_TYPE_REAL
    465 #define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
    466 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_REAL(name)
    467 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
    468 #include "PGMGstDefs.h"
    469 #include "PGMAllBth.h"
    470 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    471 #undef PGM_BTH_NAME
    472 #undef PGM_GST_TYPE
    473 #undef PGM_GST_NAME
    474 
    475 /* Guest - protected mode */
    476 #define PGM_GST_TYPE                PGM_TYPE_PROT
    477 #define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
    478 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PROT(name)
    479 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
    480 #include "PGMGstDefs.h"
    481 #include "PGMAllBth.h"
    482 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    483 #undef PGM_BTH_NAME
    484 #undef PGM_GST_TYPE
    485 #undef PGM_GST_NAME
    486 
    487 /* Guest - 32-bit mode */
    488 #define PGM_GST_TYPE                PGM_TYPE_32BIT
    489 #define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
    490 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_32BIT(name)
    491 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
    492 #include "PGMGstDefs.h"
    493 #include "PGMAllBth.h"
    494 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    495 #undef PGM_BTH_NAME
    496 #undef PGM_GST_TYPE
    497 #undef PGM_GST_NAME
    498 
    499 /* Guest - PAE mode */
    500 #define PGM_GST_TYPE                PGM_TYPE_PAE
    501 #define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
    502 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PAE(name)
    503 #define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
    504 #include "PGMGstDefs.h"
    505 #include "PGMAllBth.h"
    506 #undef BTH_PGMPOOLKIND_PT_FOR_PT
    507 #undef PGM_BTH_NAME
    508 #undef PGM_GST_TYPE
    509 #undef PGM_GST_NAME
    510 
    511 #ifdef VBOX_WITH_64_BITS_GUESTS
    512 /* Guest - AMD64 mode */
    513 # define PGM_GST_TYPE               PGM_TYPE_AMD64
    514 # define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
    515 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_EPT_AMD64(name)
    516 # define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_EPT_PT_FOR_PHYS
     471# define PGM_GST_TYPE                PGM_TYPE_REAL
     472# define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     473# define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_REAL(name)
     474# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
    517475# include "PGMGstDefs.h"
    518476# include "PGMAllBth.h"
    … …  
    521479# undef PGM_GST_TYPE
    522480# undef PGM_GST_NAME
    523 #endif /* VBOX_WITH_64_BITS_GUESTS */
    524 
    525 #undef PGM_SHW_TYPE
    526 #undef PGM_SHW_NAME
     481
     482/* Guest - protected mode */
     483# define PGM_GST_TYPE                PGM_TYPE_PROT
     484# define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     485# define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PROT(name)
     486# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
     487# include "PGMGstDefs.h"
     488# include "PGMAllBth.h"
     489# undef BTH_PGMPOOLKIND_PT_FOR_PT
     490# undef PGM_BTH_NAME
     491# undef PGM_GST_TYPE
     492# undef PGM_GST_NAME
     493
     494/* Guest - 32-bit mode */
     495# define PGM_GST_TYPE                PGM_TYPE_32BIT
     496# define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     497# define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_32BIT(name)
     498# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
     499# include "PGMGstDefs.h"
     500# include "PGMAllBth.h"
     501# undef BTH_PGMPOOLKIND_PT_FOR_PT
     502# undef PGM_BTH_NAME
     503# undef PGM_GST_TYPE
     504# undef PGM_GST_NAME
     505
     506/* Guest - PAE mode */
     507# define PGM_GST_TYPE                PGM_TYPE_PAE
     508# define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
     509# define PGM_BTH_NAME(name)          PGM_BTH_NAME_EPT_PAE(name)
     510# define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_EPT_PT_FOR_PHYS
     511# include "PGMGstDefs.h"
     512# include "PGMAllBth.h"
     513# undef BTH_PGMPOOLKIND_PT_FOR_PT
     514# undef PGM_BTH_NAME
     515# undef PGM_GST_TYPE
     516# undef PGM_GST_NAME
     517
     518# ifdef VBOX_WITH_64_BITS_GUESTS
     519/* Guest - AMD64 mode */
     520#  define PGM_GST_TYPE               PGM_TYPE_AMD64
     521#  define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
     522#  define PGM_BTH_NAME(name)         PGM_BTH_NAME_EPT_AMD64(name)
     523#  define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_EPT_PT_FOR_PHYS
     524#  include "PGMGstDefs.h"
     525#  include "PGMAllBth.h"
     526#  undef BTH_PGMPOOLKIND_PT_FOR_PT
     527#  undef PGM_BTH_NAME
     528#  undef PGM_GST_TYPE
     529#  undef PGM_GST_NAME
     530# endif /* VBOX_WITH_64_BITS_GUESTS */
     531
     532# undef PGM_SHW_TYPE
     533# undef PGM_SHW_NAME
    527534
    528535
    … …  
    530537 * Shadow - NEM / None.
    531538 */
    532 #define PGM_SHW_TYPE                PGM_TYPE_NONE
    533 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_NONE(name)
    534 #include "PGMAllShw.h"
     539# define PGM_SHW_TYPE                PGM_TYPE_NONE
     540# define PGM_SHW_NAME(name)          PGM_SHW_NAME_NONE(name)
     541# include "PGMAllShw.h"
    535542
    536543/* Guest - real mode */
    537 #define PGM_GST_TYPE                PGM_TYPE_REAL
    538 #define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
    539 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NONE_REAL(name)
    540 #include "PGMGstDefs.h"
    541 #include "PGMAllBth.h"
    542 #undef PGM_BTH_NAME
    543 #undef PGM_GST_TYPE
    544 #undef PGM_GST_NAME
    545 
    546 /* Guest - protected mode */
    547 #define PGM_GST_TYPE                PGM_TYPE_PROT
    548 #define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
    549 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NONE_PROT(name)
    550 #include "PGMGstDefs.h"
    551 #include "PGMAllBth.h"
    552 #undef PGM_BTH_NAME
    553 #undef PGM_GST_TYPE
    554 #undef PGM_GST_NAME
    555 
    556 /* Guest - 32-bit mode */
    557 #define PGM_GST_TYPE                PGM_TYPE_32BIT
    558 #define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
    559 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NONE_32BIT(name)
    560 #include "PGMGstDefs.h"
    561 #include "PGMAllBth.h"
    562 #undef PGM_BTH_NAME
    563 #undef PGM_GST_TYPE
    564 #undef PGM_GST_NAME
    565 
    566 /* Guest - PAE mode */
    567 #define PGM_GST_TYPE               PGM_TYPE_PAE
    568 #define PGM_GST_NAME(name)         PGM_GST_NAME_PAE(name)
    569 #define PGM_BTH_NAME(name)         PGM_BTH_NAME_NONE_PAE(name)
    570 #include "PGMGstDefs.h"
    571 #include "PGMAllBth.h"
    572 #undef PGM_BTH_NAME
    573 #undef PGM_GST_TYPE
    574 #undef PGM_GST_NAME
    575 
    576 #ifdef VBOX_WITH_64_BITS_GUESTS
    577 /* Guest - AMD64 mode */
    578 # define PGM_GST_TYPE               PGM_TYPE_AMD64
    579 # define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
    580 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NONE_AMD64(name)
     544# define PGM_GST_TYPE                PGM_TYPE_REAL
     545# define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     546# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NONE_REAL(name)
    581547# include "PGMGstDefs.h"
    582548# include "PGMAllBth.h"
    … …  
    584550# undef PGM_GST_TYPE
    585551# undef PGM_GST_NAME
    586 #endif /* VBOX_WITH_64_BITS_GUESTS */
    587 
    588 #undef PGM_SHW_TYPE
    589 #undef PGM_SHW_NAME
     552
     553/* Guest - protected mode */
     554# define PGM_GST_TYPE                PGM_TYPE_PROT
     555# define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     556# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NONE_PROT(name)
     557# include "PGMGstDefs.h"
     558# include "PGMAllBth.h"
     559# undef PGM_BTH_NAME
     560# undef PGM_GST_TYPE
     561# undef PGM_GST_NAME
     562
     563/* Guest - 32-bit mode */
     564# define PGM_GST_TYPE                PGM_TYPE_32BIT
     565# define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     566# define PGM_BTH_NAME(name)          PGM_BTH_NAME_NONE_32BIT(name)
     567# include "PGMGstDefs.h"
     568# include "PGMAllBth.h"
     569# undef PGM_BTH_NAME
     570# undef PGM_GST_TYPE
     571# undef PGM_GST_NAME
     572
     573/* Guest - PAE mode */
     574# define PGM_GST_TYPE               PGM_TYPE_PAE
     575# define PGM_GST_NAME(name)         PGM_GST_NAME_PAE(name)
     576# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NONE_PAE(name)
     577# include "PGMGstDefs.h"
     578# include "PGMAllBth.h"
     579# undef PGM_BTH_NAME
     580# undef PGM_GST_TYPE
     581# undef PGM_GST_NAME
     582
     583# ifdef VBOX_WITH_64_BITS_GUESTS
     584/* Guest - AMD64 mode */
     585#  define PGM_GST_TYPE               PGM_TYPE_AMD64
     586#  define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
     587#  define PGM_BTH_NAME(name)         PGM_BTH_NAME_NONE_AMD64(name)
     588#  include "PGMGstDefs.h"
     589#  include "PGMAllBth.h"
     590#  undef PGM_BTH_NAME
     591#  undef PGM_GST_TYPE
     592#  undef PGM_GST_NAME
     593# endif /* VBOX_WITH_64_BITS_GUESTS */
     594
     595# undef PGM_SHW_TYPE
     596# undef PGM_SHW_NAME
    590597
    591598
    … …  
    604611        PGM_GST_NAME_REAL(Enter),
    605612        PGM_GST_NAME_REAL(Exit),
    606 #ifdef IN_RING3
     613# ifdef IN_RING3
    607614        PGM_GST_NAME_REAL(Relocate),
    608 #endif
     615# endif
    609616    },
    610617    {
    … …  
    615622        PGM_GST_NAME_PROT(Enter),
    616623        PGM_GST_NAME_PROT(Exit),
    617 #ifdef IN_RING3
     624# ifdef IN_RING3
    618625        PGM_GST_NAME_PROT(Relocate),
    619 #endif
     626# endif
    620627    },
    621628    {
    … …  
    626633        PGM_GST_NAME_32BIT(Enter),
    627634        PGM_GST_NAME_32BIT(Exit),
    628 #ifdef IN_RING3
     635# ifdef IN_RING3
    629636        PGM_GST_NAME_32BIT(Relocate),
    630 #endif
     637# endif
    631638    },
    632639    {
    … …  
    637644        PGM_GST_NAME_PAE(Enter),
    638645        PGM_GST_NAME_PAE(Exit),
    639 #ifdef IN_RING3
     646# ifdef IN_RING3
    640647        PGM_GST_NAME_PAE(Relocate),
    641 #endif
     648# endif
    642649    },
    643 #ifdef VBOX_WITH_64_BITS_GUESTS
     650# ifdef VBOX_WITH_64_BITS_GUESTS
    644651    {
    645652        PGM_TYPE_AMD64,
    … …  
    649656        PGM_GST_NAME_AMD64(Enter),
    650657        PGM_GST_NAME_AMD64(Exit),
    651 # ifdef IN_RING3
     658#  ifdef IN_RING3
    652659        PGM_GST_NAME_AMD64(Relocate),
     660#  endif
     661    },
    653662# endif
    654     },
    655 #endif
    656663};
    657664
    … …  
    671678        PGM_SHW_NAME_32BIT(Enter),
    672679        PGM_SHW_NAME_32BIT(Exit),
    673 #ifdef IN_RING3
     680# ifdef IN_RING3
    674681        PGM_SHW_NAME_32BIT(Relocate),
    675 #endif
     682# endif
    676683    },
    677684    {
    … …  
    681688        PGM_SHW_NAME_PAE(Enter),
    682689        PGM_SHW_NAME_PAE(Exit),
    683 #ifdef IN_RING3
     690# ifdef IN_RING3
    684691        PGM_SHW_NAME_PAE(Relocate),
    685 #endif
     692# endif
    686693    },
    687694    {
    … …  
    691698        PGM_SHW_NAME_AMD64(Enter),
    692699        PGM_SHW_NAME_AMD64(Exit),
    693 #ifdef IN_RING3
     700# ifdef IN_RING3
    694701        PGM_SHW_NAME_AMD64(Relocate),
    695 #endif
     702# endif
    696703    },
    697704    {
    … …  
    701708        PGM_SHW_NAME_NESTED_32BIT(Enter),
    702709        PGM_SHW_NAME_NESTED_32BIT(Exit),
    703 #ifdef IN_RING3
     710# ifdef IN_RING3
    704711        PGM_SHW_NAME_NESTED_32BIT(Relocate),
    705 #endif
     712# endif
    706713    },
    707714    {
    … …  
    711718        PGM_SHW_NAME_NESTED_PAE(Enter),
    712719        PGM_SHW_NAME_NESTED_PAE(Exit),
    713 #ifdef IN_RING3
     720# ifdef IN_RING3
    714721        PGM_SHW_NAME_NESTED_PAE(Relocate),
    715 #endif
     722# endif
    716723    },
    717724    {
    … …  
    721728        PGM_SHW_NAME_NESTED_AMD64(Enter),
    722729        PGM_SHW_NAME_NESTED_AMD64(Exit),
    723 #ifdef IN_RING3
     730# ifdef IN_RING3
    724731        PGM_SHW_NAME_NESTED_AMD64(Relocate),
    725 #endif
     732# endif
    726733    },
    727734    {
    … …  
    731738        PGM_SHW_NAME_EPT(Enter),
    732739        PGM_SHW_NAME_EPT(Exit),
    733 #ifdef IN_RING3
     740# ifdef IN_RING3
    734741        PGM_SHW_NAME_EPT(Relocate),
    735 #endif
     742# endif
    736743    },
    737744    {
    … …  
    741748        PGM_SHW_NAME_NONE(Enter),
    742749        PGM_SHW_NAME_NONE(Exit),
    743 #ifdef IN_RING3
     750# ifdef IN_RING3
    744751        PGM_SHW_NAME_NONE(Relocate),
    745 #endif
     752# endif
    746753    },
    747754};
    … …  
    753760PGMMODEDATABTH const g_aPgmBothModeData[PGM_BOTH_MODE_DATA_ARRAY_SIZE] =
    754761{
    755 #if   !defined(IN_RING3) && !defined(VBOX_STRICT)
    756 # define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL, NULL }
    757 # define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
     762# if   !defined(IN_RING3) && !defined(VBOX_STRICT)
     763#  define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL, NULL }
     764#  define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
    758765    { uShwT, uGstT, Nm(InvalidatePage), Nm(SyncCR3), Nm(PrefetchPage), Nm(MapCR3), Nm(UnmapCR3), Nm(Enter), Nm(Trap0eHandler), Nm(NestedTrap0eHandler) }
    759766
    760 #elif !defined(IN_RING3) && defined(VBOX_STRICT)
    761 # define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }
    762 # define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
     767# elif !defined(IN_RING3) && defined(VBOX_STRICT)
     768#  define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }
     769#  define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
    763770    { uShwT, uGstT, Nm(InvalidatePage), Nm(SyncCR3), Nm(PrefetchPage), Nm(MapCR3), Nm(UnmapCR3), Nm(Enter), Nm(Trap0eHandler), Nm(NestedTrap0eHandler), Nm(AssertCR3) }
    764771
    765 #elif defined(IN_RING3) && !defined(VBOX_STRICT)
    766 # define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL }
    767 # define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
     772# elif defined(IN_RING3) && !defined(VBOX_STRICT)
     773#  define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL }
     774#  define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
    768775    { uShwT, uGstT, Nm(InvalidatePage), Nm(SyncCR3), Nm(PrefetchPage), Nm(MapCR3), Nm(UnmapCR3), Nm(Enter), }
    769776
    770 #elif defined(IN_RING3) && defined(VBOX_STRICT)
    771 # define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL, NULL }
    772 # define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
     777# elif defined(IN_RING3) && defined(VBOX_STRICT)
     778#  define PGMMODEDATABTH_NULL_ENTRY()    { UINT32_MAX, UINT32_MAX, NULL, NULL, NULL, NULL, NULL, NULL, NULL }
     779#  define PGMMODEDATABTH_ENTRY(uShwT, uGstT, Nm) \
    773780    { uShwT, uGstT, Nm(InvalidatePage), Nm(SyncCR3), Nm(PrefetchPage), Nm(MapCR3), Nm(UnmapCR3), Nm(Enter), Nm(AssertCR3) }
    774781
    775 #else
    776 # error "Misconfig."
    777 #endif
     782# else
     783#  error "Misconfig."
     784# endif
    778785
    779786    /* 32-bit shadow paging mode: */
    … …  
    809816    PGMMODEDATABTH_NULL_ENTRY(), //PGMMODEDATABTH_ENTRY(PGM_TYPE_AMD64, PGM_TYPE_32BIT, PGM_BTH_NAME_AMD64_32BIT),
    810817    PGMMODEDATABTH_NULL_ENTRY(), //PGMMODEDATABTH_ENTRY(PGM_TYPE_AMD64, PGM_TYPE_PAE,   PGM_BTH_NAME_AMD64_PAE),
    811 #ifdef VBOX_WITH_64_BITS_GUESTS
     818# ifdef VBOX_WITH_64_BITS_GUESTS
    812819    PGMMODEDATABTH_ENTRY(PGM_TYPE_AMD64, PGM_TYPE_AMD64, PGM_BTH_NAME_AMD64_AMD64),
    813 #else
     820# else
    814821    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_AMD64, PGM_TYPE_AMD64        - illegal */
    815 #endif
     822# endif
    816823    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_AMD64, PGM_TYPE_NESTED_32BIT - illegal */
    817824    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_AMD64, PGM_TYPE_NESTED_PAE   - illegal */
    … …  
    826833    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_32BIT, PGM_TYPE_32BIT, PGM_BTH_NAME_NESTED_32BIT_32BIT),
    827834    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_32BIT, PGM_TYPE_PAE,   PGM_BTH_NAME_NESTED_32BIT_PAE),
    828 #ifdef VBOX_WITH_64_BITS_GUESTS
     835# ifdef VBOX_WITH_64_BITS_GUESTS
    829836    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_32BIT, PGM_TYPE_AMD64, PGM_BTH_NAME_NESTED_32BIT_AMD64),
    830 #else
     837# else
    831838    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_32BIT, PGM_TYPE_AMD64        - illegal */
    832 #endif
     839# endif
    833840    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_32BIT, PGM_TYPE_NESTED_32BIT - illegal */
    834841    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_32BIT, PGM_TYPE_NESTED_PAE   - illegal */
    … …  
    843850    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_PAE, PGM_TYPE_32BIT, PGM_BTH_NAME_NESTED_PAE_32BIT),
    844851    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_PAE, PGM_TYPE_PAE,   PGM_BTH_NAME_NESTED_PAE_PAE),
    845 #ifdef VBOX_WITH_64_BITS_GUESTS
     852# ifdef VBOX_WITH_64_BITS_GUESTS
    846853    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_PAE, PGM_TYPE_AMD64, PGM_BTH_NAME_NESTED_PAE_AMD64),
    847 #else
     854# else
    848855    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_PAE, PGM_TYPE_AMD64        - illegal */
    849 #endif
     856# endif
    850857    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_PAE, PGM_TYPE_NESTED_32BIT - illegal */
    851858    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_PAE, PGM_TYPE_NESTED_PAE   - illegal */
    … …  
    860867    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_AMD64, PGM_TYPE_32BIT, PGM_BTH_NAME_NESTED_AMD64_32BIT),
    861868    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_AMD64, PGM_TYPE_PAE,   PGM_BTH_NAME_NESTED_AMD64_PAE),
    862 #ifdef VBOX_WITH_64_BITS_GUESTS
     869# ifdef VBOX_WITH_64_BITS_GUESTS
    863870    PGMMODEDATABTH_ENTRY(PGM_TYPE_NESTED_AMD64, PGM_TYPE_AMD64, PGM_BTH_NAME_NESTED_AMD64_AMD64),
    864 #else
     871# else
    865872    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_AMD64, PGM_TYPE_AMD64        - illegal */
    866 #endif
     873# endif
    867874    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_AMD64, PGM_TYPE_NESTED_32BIT - illegal */
    868875    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NESTED_AMD64, PGM_TYPE_NESTED_PAE   - illegal */
    … …  
    877884    PGMMODEDATABTH_ENTRY(PGM_TYPE_EPT, PGM_TYPE_32BIT, PGM_BTH_NAME_EPT_32BIT),
    878885    PGMMODEDATABTH_ENTRY(PGM_TYPE_EPT, PGM_TYPE_PAE,   PGM_BTH_NAME_EPT_PAE),
    879 #ifdef VBOX_WITH_64_BITS_GUESTS
     886# ifdef VBOX_WITH_64_BITS_GUESTS
    880887    PGMMODEDATABTH_ENTRY(PGM_TYPE_EPT, PGM_TYPE_AMD64, PGM_BTH_NAME_EPT_AMD64),
    881 #else
     888# else
    882889    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_EPT, PGM_TYPE_AMD64        - illegal */
    883 #endif
     890# endif
    884891    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_EPT, PGM_TYPE_NESTED_32BIT - illegal */
    885892    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_EPT, PGM_TYPE_NESTED_PAE   - illegal */
    … …  
    894901    PGMMODEDATABTH_ENTRY(PGM_TYPE_NONE, PGM_TYPE_32BIT, PGM_BTH_NAME_EPT_32BIT),
    895902    PGMMODEDATABTH_ENTRY(PGM_TYPE_NONE, PGM_TYPE_PAE,   PGM_BTH_NAME_EPT_PAE),
    896 #ifdef VBOX_WITH_64_BITS_GUESTS
     903# ifdef VBOX_WITH_64_BITS_GUESTS
    897904    PGMMODEDATABTH_ENTRY(PGM_TYPE_NONE, PGM_TYPE_AMD64, PGM_BTH_NAME_EPT_AMD64),
    898 #else
     905# else
    899906    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NONE, PGM_TYPE_AMD64        - illegal */
    900 #endif
     907# endif
    901908    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NONE, PGM_TYPE_NESTED_32BIT - illegal */
    902909    PGMMODEDATABTH_NULL_ENTRY(), /* PGM_TYPE_NONE, PGM_TYPE_NESTED_PAE   - illegal */
    … …  
    906913
    907914
    908 #undef PGMMODEDATABTH_ENTRY
    909 #undef PGMMODEDATABTH_NULL_ENTRY
     915# undef PGMMODEDATABTH_ENTRY
     916# undef PGMMODEDATABTH_NULL_ENTRY
    910917};
    911918
    … …  
    927934    /* [PGMMODE_NESTED_AMD64] = */      X86_CR3_AMD64_PAGE_MASK,
    928935    /* [PGMMODE_EPT] = */               X86_CR3_EPT_PAGE_MASK,
     936    /* [12] = */                        0,
     937    /* [13] = */                        0,
     938    /* [14] = */                        0,
     939    /* [15] = */                        0,
     940    /* [16] = */                        0,
     941    /* [17] = */                        0,
     942    /* [18] = */                        0,
     943    /* [19] = */                        0,
     944    /* [20] = */                        0,
     945    /* [21] = */                        0,
     946    /* [22] = */                        0,
     947    /* [23] = */                        0,
     948    /* [24] = */                        0,
     949    /* [25] = */                        0,
     950    /* [26] = */                        0,
     951    /* [27] = */                        0,
     952    /* [28] = */                        0,
     953    /* [29] = */                        0,
     954    /* [30] = */                        0,
     955    /* [31] = */                        0,
    929956    /* [PGMMODE_NONE] = */              X86_CR3_AMD64_PAGE_MASK,
    930957};
    931 
     958AssertCompile(PGMMODE_NONE == 32);
     959
     960
     961#elif defined(VBOX_VMM_TARGET_ARMV8)
     962
     963/** @todo  Proper ARMv8 guest support for PGM   */
     964# include "PGMAllGst-armv8.h"
     965
     966#else
     967# error "port me"
     968#endif
     969
     970
     971#ifdef VBOX_VMM_TARGET_X86
    932972
    933973/**
    … …  
    9741014
    9751015
    976 #ifdef IN_RING0
    977 /**
    978  * #PF Handler.
     1016# ifdef IN_RING0
     1017/**
     1018 * \#PF Handler.
    9791019 *
    9801020 * @returns VBox status code (appropriate for trap handling and GC return).
    … …  
    9931033
    9941034
    995 # ifdef VBOX_WITH_STATISTICS
     1035#  ifdef VBOX_WITH_STATISTICS
    9961036    /*
    9971037     * Error code stats.
    … …  
    10311071            STAM_COUNTER_INC(&pVCpu->pgm.s.Stats.StatRZTrap0eSVReserved);
    10321072    }
    1033 # endif /* VBOX_WITH_STATISTICS */
     1073#  endif /* VBOX_WITH_STATISTICS */
    10341074
    10351075    /*
    … …  
    10741114    return rc;
    10751115}
    1076 #endif /* IN_RING0 */
     1116# endif /* IN_RING0 */
    10771117
    10781118
    … …  
    12821322}
    12831323
    1284 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
     1324# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    12851325
    12861326/**
    … …  
    17421782
    17431783
    1744 # ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     1784#  ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    17451785/**
    17461786 * Syncs the SHADOW nested-guest page directory pointer for the specified address.
    … …  
    18491889    return VINF_SUCCESS;
    18501890}
    1851 # endif /* VBOX_WITH_NESTED_HWVIRT_VMX_EPT */
    1852 
    1853 
    1854 # ifdef IN_RING0
     1891#  endif /* VBOX_WITH_NESTED_HWVIRT_VMX_EPT */
     1892
     1893
     1894#  ifdef IN_RING0
    18551895/**
    18561896 * Synchronizes a range of nested page table entries.
    … …  
    19071947    return rc;
    19081948}
    1909 # endif /* IN_RING0 */
    1910 
    1911 #endif /* !VBOX_WITH_ONLY_PGM_NEM_MODE */
     1949#  endif /* IN_RING0 */
     1950
     1951# endif /* !VBOX_WITH_ONLY_PGM_NEM_MODE */
     1952
     1953#endif /* VBOX_VMM_TARGET_X86 */
     1954
    19121955
    19131956/**
    … …  
    19241967    VMCPU_ASSERT_EMT(pVCpu);
    19251968    Assert(pWalk);
     1969#ifdef VBOX_VMM_TARGET_X86
    19261970    uintptr_t idx = pVCpu->pgm.s.idxGuestModeData;
    19271971    AssertReturn(idx < RT_ELEMENTS(g_aPgmGuestModeData), VERR_PGM_MODE_IPE);
    19281972    AssertReturn(g_aPgmGuestModeData[idx].pfnGetPage, VERR_PGM_MODE_IPE);
    19291973    return g_aPgmGuestModeData[idx].pfnGetPage(pVCpu, GCPtr, pWalk);
    1930 }
    1931 
     1974
     1975#elif defined(VBOX_VMM_TARGET_ARMV8)
     1976    return pgmGstGetPageArmv8Hack(pVCpu, GCPtr, pWalk);
     1977#else
     1978# error "port me"
     1979#endif
     1980}
     1981
     1982#ifdef VBOX_VMM_TARGET_X86
    19321983
    19331984/**
    … …  
    19802031
    19812032
    1982 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     2033# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    19832034/**
    19842035 * Unmaps the guest CR3.
    … …  
    19942045    return g_aPgmBothModeData[idxBth].pfnUnmapCR3(pVCpu);
    19952046}
    1996 #endif
     2047# endif
     2048
     2049#endif /* VBOX_VMM_TARGET_X86 */
    19972050
    19982051
    … …  
    20182071{
    20192072    VMCPU_ASSERT_EMT(pVCpu);
     2073#ifdef VBOX_VMM_TARGET_X86
    20202074    switch (pVCpu->pgm.s.enmGuestMode)
    20212075    {
    … …  
    20482102            return VERR_PGM_NOT_USED_IN_MODE;
    20492103    }
     2104
     2105#elif defined(VBOX_VMM_TARGET_ARMV8)
     2106    /** @todo temporary hack.   */
     2107    RT_NOREF(pGstWalk);
     2108    return pgmGstGetPageArmv8Hack(pVCpu, GCPtr, pWalk);
     2109
     2110#else
     2111# error "port me"
     2112#endif
    20502113}
    20512114
    … …  
    21182181int pgmGstPtWalkNext(PVMCPUCC pVCpu, RTGCPTR GCPtr, PPGMPTWALK pWalk, PPGMPTWALKGST pGstWalk)
    21192182{
     2183#ifdef VBOX_VMM_TARGET_X86 /** @todo optimize for ARMv8 */
    21202184    /*
    21212185     * We can only handle successfully walks.
    … …  
    22122276        }
    22132277    }
     2278#endif /* VBOX_VMM_TARGET_X86 */
    22142279    /* Case we don't handle.  Do full walk. */
    22152280    return pgmGstPtWalk(pVCpu, GCPtr, pWalk, pGstWalk);
    … …  
    22172282
    22182283
     2284#ifdef VBOX_VMM_TARGET_X86
    22192285/**
    22202286 * Modify page flags for a range of pages in the guest's tables
    … …  
    22612327    return rc;
    22622328}
    2263 
     2329#endif /* VBOX_VMM_TARGET_X86 */
     2330
     2331#ifdef VBOX_VMM_TARGET_X86
    22642332
    22652333/**
    … …  
    24642532
    24652533
    2466 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     2534# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    24672535 /**
    24682536 * Performs the lazy mapping of the guest PML4 table when using EPT paging.
    … …  
    24872555        if (RT_SUCCESS(rc))
    24882556        {
    2489 # ifdef IN_RING3
     2557#  ifdef IN_RING3
    24902558            pVCpu->pgm.s.pGstEptPml4R0 = NIL_RTR0PTR;
    24912559            pVCpu->pgm.s.pGstEptPml4R3 = *ppEptPml4;
    2492 # else
     2560#  else
    24932561            pVCpu->pgm.s.pGstEptPml4R3 = NIL_RTR3PTR;
    24942562            pVCpu->pgm.s.pGstEptPml4R0 = *ppEptPml4;
    2495 # endif
     2563#  endif
    24962564            PGM_UNLOCK(pVM);
    24972565            return VINF_SUCCESS;
    … …  
    25032571    return rc;
    25042572}
    2505 #endif
     2573# endif
    25062574
    25072575
    … …  
    25132581VMMDECL(RTHCPHYS) PGMGetHyperCR3(PVMCPU pVCpu)
    25142582{
    2515 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
     2583# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    25162584    PPGMPOOLPAGE pPoolPage = pVCpu->pgm.s.CTX_SUFF(pShwPageCR3);
    25172585    AssertPtrReturn(pPoolPage, NIL_RTHCPHYS);
    25182586    return pPoolPage->Core.Key;
    2519 #else
     2587# else
    25202588    RT_NOREF(pVCpu);
    25212589    return NIL_RTHCPHYS;
    2522 #endif
     2590# endif
    25232591}
    25242592
    … …  
    25402608
    25412609
    2542 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     2610# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    25432611/**
    25442612 * Performs second-level address translation for the given CR3 and updates the
    … …  
    25832651    return VINF_SUCCESS;
    25842652}
    2585 #endif
     2653# endif
    25862654
    25872655
    … …  
    26012669{
    26022670    STAM_PROFILE_START(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,FlushTLB), a);
    2603     PVMCC pVM = pVCpu->CTX_SUFF(pVM);
    26042671
    26052672    VMCPU_ASSERT_EMT(pVCpu);
    … …  
    26692736    {
    26702737#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
    2671         PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
     2738        PVMCC const    pVM   = pVCpu->CTX_SUFF(pVM);
     2739        PPGMPOOL const pPool = pVM->pgm.s.CTX_SUFF(pPool);
    26722740        if (pPool->cDirtyPages)
    26732741        {
    … …  
    27902858VMMDECL(int) PGMSyncCR3(PVMCPUCC pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)
    27912859{
    2792     int rc;
    2793 
    27942860    VMCPU_ASSERT_EMT(pVCpu);
    27952861
     2862#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    27962863    /*
    27972864     * The pool may have pending stuff and even require a return to ring-3 to
    27982865     * clear the whole thing.
    27992866     */
    2800     rc = pgmPoolSyncCR3(pVCpu);
    2801     if (rc != VINF_SUCCESS)
    2802         return rc;
     2867    int rcPool = pgmPoolSyncCR3(pVCpu);
     2868    if (rcPool != VINF_SUCCESS)
     2869        return rcPool;
     2870#endif
    28032871
    28042872    /*
    … …  
    28452913                /* CR3 SLAT translation failed but we try to pretend it
    28462914                   succeeded for the reasons mentioned in PGMHCChangeMode(). */
    2847                 AssertMsgFailed(("Failed to translate CR3 %#RX64. rc=%Rrc\n", cr3, rc2));
     2915                AssertMsgFailed(("Failed to translate CR3 %#RX64. rc2=%Rrc\n", cr3, rc2));
    28482916                pVCpu->pgm.s.GCPhysCR3       = NIL_RTGCPHYS;
    28492917                pVCpu->pgm.s.GCPhysNstGstCR3 = NIL_RTGCPHYS;
    … …  
    28532921#endif
    28542922        Assert(!pVCpu->pgm.s.CTX_SUFF(fPaePdpesAndCr3Mapped));
     2923        int rc = VINF_SUCCESS;
    28552924        if (GCPhysOldCR3 != GCPhysCR3)
    28562925        {
    … …  
    28682937            Log(("PGMSyncCR3: pending pgm pool sync after MapCR3!\n"));
    28692938#ifdef IN_RING3
     2939# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    28702940            rc = pgmPoolSyncCR3(pVCpu);
     2941# else
     2942            rc = VINF_SUCCESS;
     2943# endif
    28712944#else
    28722945            if (rc == VINF_PGM_SYNC_CR3)
    … …  
    28872960    AssertReturn(idxBth < RT_ELEMENTS(g_aPgmBothModeData), VERR_PGM_MODE_IPE);
    28882961    AssertReturn(g_aPgmBothModeData[idxBth].pfnSyncCR3, VERR_PGM_MODE_IPE);
    2889     rc = g_aPgmBothModeData[idxBth].pfnSyncCR3(pVCpu, cr0, cr3, cr4, fGlobal);
     2962    int rcSync = g_aPgmBothModeData[idxBth].pfnSyncCR3(pVCpu, cr0, cr3, cr4, fGlobal);
    28902963
    28912964    STAM_PROFILE_STOP(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,SyncCR3), a);
    2892     AssertMsg(rc == VINF_SUCCESS || rc == VINF_PGM_SYNC_CR3 || RT_FAILURE(rc), ("rc=%Rrc\n", rc));
    2893     if (rc == VINF_SUCCESS)
     2965    AssertMsg(rcSync == VINF_SUCCESS || rcSync == VINF_PGM_SYNC_CR3 || RT_FAILURE(rcSync), ("rcSync=%Rrc\n", rcSync));
     2966    if (rcSync == VINF_SUCCESS)
    28942967    {
    28952968        if (pVCpu->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL)
    … …  
    29102983     * Now flush the CR3 (guest context).
    29112984     */
    2912     if (rc == VINF_SUCCESS)
     2985    if (rcSync == VINF_SUCCESS)
    29132986        PGM_INVL_VCPU_TLBS(pVCpu);
    2914     return rc;
     2987    return rcSync;
    29152988}
    29162989
    … …  
    33813454}
    33823455
     3456#endif /* VBOX_VMM_TARGET_X86 */
    33833457
    33843458/**
    … …  
    34003474    STAM_REL_COUNTER_INC(&pVCpu->pgm.s.cGuestModeChanges);
    34013475
     3476#ifdef VBOX_VMM_TARGET_X86
    34023477    /*
    34033478     * Calc the shadow mode and switcher.
    … …  
    34473522    AssertPtrReturn(g_aPgmGuestModeData[idxNewGst].pfnExit, VERR_PGM_MODE_IPE);
    34483523    AssertPtrReturn(g_aPgmGuestModeData[idxNewGst].pfnEnter, VERR_PGM_MODE_IPE);
    3449 #ifdef IN_RING3
     3524# ifdef IN_RING3
    34503525    AssertPtrReturn(g_aPgmGuestModeData[idxNewGst].pfnRelocate, VERR_PGM_MODE_IPE);
    3451 #endif
     3526# endif
    34523527
    34533528    uintptr_t const idxNewShw = pVCpu->pgm.s.idxShadowModeData = pgmModeToType(enmShadowMode);
    … …  
    34583533    AssertPtrReturn(g_aPgmShadowModeData[idxNewShw].pfnExit, VERR_PGM_MODE_IPE);
    34593534    AssertPtrReturn(g_aPgmShadowModeData[idxNewShw].pfnEnter, VERR_PGM_MODE_IPE);
    3460 #ifdef IN_RING3
     3535# ifdef IN_RING3
    34613536    AssertPtrReturn(g_aPgmShadowModeData[idxNewShw].pfnRelocate, VERR_PGM_MODE_IPE);
    3462 #endif
     3537# endif
    34633538
    34643539    uintptr_t const idxNewBth = pVCpu->pgm.s.idxBothModeData = (idxNewShw - PGM_TYPE_FIRST_SHADOW) * PGM_TYPE_END + idxNewGst;
    … …  
    34713546    AssertPtrReturn(g_aPgmBothModeData[idxNewBth].pfnUnmapCR3, VERR_PGM_MODE_IPE);
    34723547    AssertPtrReturn(g_aPgmBothModeData[idxNewBth].pfnEnter, VERR_PGM_MODE_IPE);
    3473 #ifdef VBOX_STRICT
     3548# ifdef VBOX_STRICT
    34743549    AssertPtrReturn(g_aPgmBothModeData[idxNewBth].pfnAssertCR3, VERR_PGM_MODE_IPE);
    3475 #endif
     3550# endif
    34763551
    34773552    /*
    … …  
    35153590        case PGMMODE_PAE:
    35163591            if (!pVM->cpum.ro.GuestFeatures.fPae)
    3517 #ifdef IN_RING3 /** @todo r=bird: wrong place, probably hasn't really worked for a while. */
     3592# ifdef IN_RING3 /** @todo r=bird: wrong place, probably hasn't really worked for a while. */
    35183593                return VMSetRuntimeError(pVM, VMSETRTERR_FLAGS_FATAL, "PAEmode",
    35193594                                         N_("The guest is trying to switch to the PAE mode which is currently disabled by default in VirtualBox. PAE support can be enabled using the VM settings (System/Processor)"));
    3520 #else
     3595# else
    35213596                AssertLogRelMsgFailedReturn(("enmGuestMode=%s - Try enable PAE for the guest!\n", PGMGetModeName(enmGuestMode)), VERR_PGM_MODE_IPE);
    35223597
    3523 #endif
     3598# endif
    35243599            GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & X86_CR3_PAE_PAGE_MASK;
    35253600            break;
    35263601
    3527 #ifdef VBOX_WITH_64_BITS_GUESTS
     3602# ifdef VBOX_WITH_64_BITS_GUESTS
    35283603        case PGMMODE_AMD64_NX:
    35293604        case PGMMODE_AMD64:
    35303605            GCPhysCR3 = CPUMGetGuestCR3(pVCpu) & X86_CR3_AMD64_PAGE_MASK;
    35313606            break;
    3532 #endif
     3607# endif
    35333608        default:
    35343609            AssertLogRelMsgFailedReturn(("enmGuestMode=%d\n", enmGuestMode), VERR_PGM_MODE_IPE);
    35353610    }
    35363611
    3537 #ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
     3612# ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    35383613    /*
    35393614     * If a nested-guest is using EPT paging:
    … …  
    35823657    else
    35833658        Assert(pVCpu->pgm.s.GCPhysNstGstCR3 == NIL_RTGCPHYS);
    3584 #endif
     3659# endif
    35853660
    35863661    /*
    … …  
    36093684    HMHCChangedPagingMode(pVM, pVCpu, pVCpu->pgm.s.enmShadowMode, pVCpu->pgm.s.enmGuestMode);
    36103685    return rc;
    3611 }
    3612 
    3613 
     3686
     3687#elif defined(VBOX_VMM_TARGET_ARMV8)
     3688    //AssertReleaseFailed(); /** @todo Called by the PGM saved state code. */
     3689    RT_NOREF(pVM, pVCpu, enmGuestMode, fForce);
     3690    return VINF_SUCCESS;
     3691
     3692#else
     3693# error "port me"
     3694#endif
     3695}
     3696
     3697
     3698#ifdef VBOX_VMM_TARGET_X86
    36143699/**
    36153700 * Called by CPUM or REM when CR0.WP changes to 1.
    … …  
    36383723    }
    36393724}
     3725#endif /* VBOX_VMM_TARGET_X86 */
    36403726
    36413727
    … …  
    36623748VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu)
    36633749{
     3750#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    36643751    return pVCpu->pgm.s.enmShadowMode;
    3665 }
    3666 
    3667 
     3752#else
     3753    RT_NOREF(pVCpu);
     3754    return PGMMODE_NONE;
     3755#endif
     3756}
     3757
     3758
     3759#ifdef VBOX_VMM_TARGET_X86
    36683760/**
    36693761 * Gets the current host paging mode.
    … …  
    37013793    return PGMMODE_INVALID;
    37023794}
     3795#endif /* VBOX_VMM_TARGET_X86 */
    37033796
    37043797
    … …  
    37253818        case PGMMODE_EPT:           return "EPT";
    37263819        case PGMMODE_NONE:          return "None";
     3820        case PGMMODE_VMSA_V8_32:    return "VMSAv8-32";
     3821        case PGMMODE_VMSA_V8_64:    return "VMSAv8-64";
    37273822        default:                    return "unknown mode value";
    37283823    }
    … …  
    37523847
    37533848
    3754 /**
    3755  * Gets the physical address represented in the guest CR3 as PGM sees it.
    3756  *
    3757  * This is mainly for logging and debugging.
    3758  *
    3759  * @returns PGM's guest CR3 value.
    3760  * @param   pVCpu       The cross context virtual CPU structure.
    3761  */
    3762 VMM_INT_DECL(RTGCPHYS) PGMGetGuestCR3Phys(PVMCPU pVCpu)
    3763 {
    3764     return pVCpu->pgm.s.GCPhysCR3;
    3765 }
    3766 
    3767 
    3768 
     3849#ifdef VBOX_VMM_TARGET_X86
    37693850/**
    37703851 * Notification from CPUM that the EFER.NXE bit has changed.
    … …  
    38233904    }
    38243905}
     3906#endif /* VBOX_VMM_TARGET_X86 */
    38253907
    38263908
    … …  
    38333915VMMDECL(bool) PGMHasDirtyPages(PVM pVM)
    38343916{
     3917#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    38353918    return pVM->pgm.s.CTX_SUFF(pPool)->cDirtyPages != 0;
    3836 }
    3837 
    3838 
    3839 /**
    3840  * Check if this VCPU currently owns the PGM lock.
    3841  *
    3842  * @returns bool owner/not owner
    3843  * @param   pVM         The cross context VM structure.
    3844  */
    3845 VMMDECL(bool) PGMIsLockOwner(PVMCC pVM)
    3846 {
    3847     return PDMCritSectIsOwner(pVM, &pVM->pgm.s.CritSectX);
     3919#else
     3920    RT_NOREF(pVM);
     3921    return false;
     3922#endif
    38483923}
    38493924
    … …  
    38623937    pVM->pgm.s.fUseLargePages = fUseLargePages;
    38633938    return VINF_SUCCESS;
     3939}
     3940
     3941
     3942/**
     3943 * Check if this VCPU currently owns the PGM lock.
     3944 *
     3945 * @returns bool owner/not owner
     3946 * @param   pVM         The cross context VM structure.
     3947 */
     3948VMMDECL(bool) PGMIsLockOwner(PVMCC pVM)
     3949{
     3950    return PDMCritSectIsOwner(pVM, &pVM->pgm.s.CritSectX);
    38643951}
    38653952
    … …  
    40714158}
    40724159
    4073 
    4074 #ifdef VBOX_STRICT
     4160#ifdef VBOX_VMM_TARGET_X86
     4161
     4162# ifdef VBOX_STRICT
    40754163/**
    40764164 * Asserts that everything related to the guest CR3 is correctly shadowed.
    … …  
    40884176VMMDECL(unsigned) PGMAssertCR3(PVMCC pVM, PVMCPUCC pVCpu, uint64_t cr3, uint64_t cr4)
    40894177{
     4178    AssertReturn(pVM->enmTarget == VMTARGET_X86, 0);
    40904179    STAM_PROFILE_START(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,SyncCR3), a);
    40914180
    … …  
    41014190    return cErrors;
    41024191}
    4103 #endif /* VBOX_STRICT */
     4192# endif /* VBOX_STRICT */
    41044193
    41054194
    … …  
    41234212}
    41244213
     4214#endif /* VBOX_VMM_TARGET_X86 */
    41254215#ifdef PGM_WITH_PAGE_ZEROING_DETECTION
     4216# ifndef VBOX_VMM_TARGET_X86
     4217#  error "misconfig: PGM_WITH_PAGE_ZEROING_DETECTION not implemented for ARM guests"
     4218# endif
    41264219
    41274220/**

  • trunk/src/VBox/VMM/VMMAll/PGMAllGst-armv8.h

    r108119 r108132  
    11/* $Id$ */
    22/** @file
    3  * PGM - Page Manager and Monitor, ARMv8 variant. (Mixing stuff here, not good?)
     3 * PGM - Page Manager, ARMv8 Guest Paging Template - All context code.
    44 */
    55
    … …  
    2626 */
    2727
    28 
    29 /** @page pg_pgm_armv8 PGM - The Page Manager and Monitor (ARMv8 variant)
    30  *
    31  * For now this is just a stub for bringing up the ARMv8 hypervisor. We'll see how
    32  * much we really need here later on and whether it makes sense to merge this with the original PGM.cpp
    33  * (avoiding \#ifdef hell for with this as I'm not confident enough to fiddle around with PGM too much at this point).
    34  */
    35 
    36 
    37 /*********************************************************************************************************************************
    38 *   Header Files                                                                                                                 *
    39 *********************************************************************************************************************************/
    40 #define LOG_GROUP LOG_GROUP_PGM
    41 #define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
    42 #include <VBox/vmm/dbgf.h>
    43 #include <VBox/vmm/pgm.h>
    44 #include <VBox/vmm/cpum.h>
    45 #include <VBox/vmm/cpum-armv8.h>
    46 #include <VBox/vmm/iom.h>
    47 #include <VBox/sup.h>
    48 #include <VBox/vmm/mm.h>
    49 #include <VBox/vmm/em.h>
    50 #include <VBox/vmm/stam.h>
    51 #include <VBox/vmm/selm.h>
    52 #include <VBox/vmm/ssm.h>
    53 #include <VBox/vmm/hm.h>
    54 #include "PGMInternal.h"
    55 #include <VBox/vmm/vmcc.h>
    56 #include <VBox/vmm/uvm.h>
    57 #include "PGMInline.h"
    58 
    59 #include <VBox/dbg.h>
    60 #include <VBox/param.h>
    61 #include <VBox/err.h>
    62 
    63 #include <iprt/asm.h>
    64 #include <iprt/assert.h>
    65 #include <iprt/env.h>
    66 #include <iprt/file.h>
    67 #include <iprt/mem.h>
    68 #include <iprt/rand.h>
    69 #include <iprt/string.h>
    70 #include <iprt/thread.h>
    71 
    72 
    73 #if 0 /* now in taken from PGM.cpp where it came from */
    74 
    75 
    76 /*********************************************************************************************************************************
    77 *   Internal Functions                                                                                                           *
    78 *********************************************************************************************************************************/
    79 #ifdef VBOX_STRICT
    80 static FNVMATSTATE        pgmR3ResetNoMorePhysWritesFlag;
    81 #endif
    82 
    83 
    84 /*********************************************************************************************************************************
    85 *   Global Variables                                                                                                             *
    86 *********************************************************************************************************************************/
    87 #ifndef VBOX_WITH_PGM_NEM_MODE
    88 # error "This requires VBOX_WITH_PGM_NEM_MODE to be set at all times!"
    89 #endif
    90 
    91 /**
    92  * Interface that NEM uses to switch PGM into simplified memory managment mode.
    93  *
    94  * This call occurs before PGMR3Init.
    95  *
    96  * @param   pVM     The cross context VM structure.
    97  */
    98 VMMR3_INT_DECL(void) PGMR3EnableNemMode(PVM pVM)
    99 {
    100     AssertFatal(!PDMCritSectIsInitialized(&pVM->pgm.s.CritSectX));
    101 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    102     pVM->pgm.s.fNemMode = true;
    103 #endif
    104 }
    105 
    106 
    107 /**
    108  * Checks whether the simplificed memory management mode for NEM is enabled.
    109  *
    110  * @returns true if enabled, false if not.
    111  * @param   pVM     The cross context VM structure.
    112  */
    113 VMMR3_INT_DECL(bool)    PGMR3IsNemModeEnabled(PVM pVM)
    114 {
    115     RT_NOREF(pVM);
    116     return PGM_IS_IN_NEM_MODE(pVM);
    117 }
    118 
    119 
    120 /**
    121  * Initiates the paging of VM.
    122  *
    123  * @returns VBox status code.
    124  * @param   pVM     The cross context VM structure.
    125  */
    126 VMMR3DECL(int) PGMR3Init(PVM pVM)
    127 {
    128     LogFlow(("PGMR3Init:\n"));
    129 
    130     /*
    131      * Assert alignment and sizes.
    132      */
    133     AssertCompile(sizeof(pVM->pgm.s) <= sizeof(pVM->pgm.padding));
    134     AssertCompile(sizeof(pVM->apCpusR3[0]->pgm.s) <= sizeof(pVM->apCpusR3[0]->pgm.padding));
    135     AssertCompileMemberAlignment(PGM, CritSectX, sizeof(uintptr_t));
    136 
    137     bool const fDriverless = SUPR3IsDriverless();
    138 
    139     /*
    140      * Init the structure.
    141      */
    142     /*pVM->pgm.s.fRestoreRomPagesAtReset = false;*/
    143 
    144     /* We always use the simplified memory mode on arm. */
    145 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    146     pVM->pgm.s.fNemMode = true;
    147 #endif
    148 
    149     for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.aHandyPages); i++)
    150     {
    151         pVM->pgm.s.aHandyPages[i].HCPhysGCPhys  = NIL_GMMPAGEDESC_PHYS;
    152         pVM->pgm.s.aHandyPages[i].fZeroed       = false;
    153         pVM->pgm.s.aHandyPages[i].idPage        = NIL_GMM_PAGEID;
    154         pVM->pgm.s.aHandyPages[i].idSharedPage  = NIL_GMM_PAGEID;
    155     }
    156 
    157     for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.aLargeHandyPage); i++)
    158     {
    159         pVM->pgm.s.aLargeHandyPage[i].HCPhysGCPhys  = NIL_GMMPAGEDESC_PHYS;
    160         pVM->pgm.s.aLargeHandyPage[i].fZeroed       = false;
    161         pVM->pgm.s.aLargeHandyPage[i].idPage        = NIL_GMM_PAGEID;
    162         pVM->pgm.s.aLargeHandyPage[i].idSharedPage  = NIL_GMM_PAGEID;
    163     }
    164 
    165     AssertReleaseReturn(pVM->pgm.s.cPhysHandlerTypes == 0, VERR_WRONG_ORDER);
    166     for (size_t i = 0; i < RT_ELEMENTS(pVM->pgm.s.aPhysHandlerTypes); i++)
    167     {
    168 #if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
    169         if (fDriverless)
    170 #endif
    171             pVM->pgm.s.aPhysHandlerTypes[i].hType  = i | (RTRandU64() & ~(uint64_t)PGMPHYSHANDLERTYPE_IDX_MASK);
    172         pVM->pgm.s.aPhysHandlerTypes[i].enmKind    = PGMPHYSHANDLERKIND_INVALID;
    173         pVM->pgm.s.aPhysHandlerTypes[i].pfnHandler = pgmR3HandlerPhysicalHandlerInvalid;
    174     }
    175 
    176 #if 0
    177     /* Init the per-CPU part. */
    178     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
    179     {
    180         PVMCPU pVCpu = pVM->apCpusR3[idCpu];
    181         PPGMCPU pPGM = &pVCpu->pgm.s;
    182     }
    183 #endif
    184 
    185     /*
    186      * Read the configuration.
    187      */
    188     PCFGMNODE const pCfgPGM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM");
    189 
    190     /** @todo RamPreAlloc doesn't work for NEM-mode.   */
    191     int rc = CFGMR3QueryBoolDef(CFGMR3GetRoot(pVM), "RamPreAlloc", &pVM->pgm.s.fRamPreAlloc,
    192 #ifdef VBOX_WITH_PREALLOC_RAM_BY_DEFAULT
    193                             true
    194 #else
    195                             false
    196 #endif
    197                            );
    198     AssertLogRelRCReturn(rc, rc);
    199 
    200 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    201     rc = CFGMR3QueryU32Def(pCfgPGM, "MaxRing3Chunks", &pVM->pgm.s.ChunkR3Map.cMax, UINT32_MAX);
    202     AssertLogRelRCReturn(rc, rc);
    203     for (uint32_t i = 0; i < RT_ELEMENTS(pVM->pgm.s.ChunkR3Map.Tlb.aEntries); i++)
    204         pVM->pgm.s.ChunkR3Map.Tlb.aEntries[i].idChunk = NIL_GMM_CHUNKID;
    205 #endif
    206 
    207     /*
    208      * Get the configured RAM size - to estimate saved state size.
    209      */
    210     uint64_t    cbRam;
    211     rc = CFGMR3QueryU64(CFGMR3GetRoot(pVM), "RamSize", &cbRam);
    212     if (rc == VERR_CFGM_VALUE_NOT_FOUND)
    213         cbRam = 0;
    214     else if (RT_SUCCESS(rc))
    215     {
    216         if (cbRam < GUEST_PAGE_SIZE)
    217             cbRam = 0;
    218         cbRam = RT_ALIGN_64(cbRam, GUEST_PAGE_SIZE);
    219     }
    220     else
    221     {
    222         AssertMsgFailed(("Configuration error: Failed to query integer \"RamSize\", rc=%Rrc.\n", rc));
    223         return rc;
    224     }
    225 
    226     /** @cfgm{/PGM/ZeroRamPagesOnReset, boolean, true}
    227      * Whether to clear RAM pages on (hard) reset. */
    228     rc = CFGMR3QueryBoolDef(pCfgPGM, "ZeroRamPagesOnReset", &pVM->pgm.s.fZeroRamPagesOnReset, true);
    229     AssertLogRelRCReturn(rc, rc);
    230 
    231     /*
    232      * Register callbacks, string formatters and the saved state data unit.
    233      */
    234 #ifdef VBOX_STRICT
    235     VMR3AtStateRegister(pVM->pUVM, pgmR3ResetNoMorePhysWritesFlag, NULL);
    236 #endif
    237     PGMRegisterStringFormatTypes();
    238 
    239     rc = pgmR3InitSavedState(pVM, cbRam);
    240     if (RT_FAILURE(rc))
    241         return rc;
    242 
    243     /*
    244      * Initialize the PGM critical section and flush the phys TLBs
    245      */
    246     rc = PDMR3CritSectInit(pVM, &pVM->pgm.s.CritSectX, RT_SRC_POS, "PGM");
    247     AssertRCReturn(rc, rc);
    248 
    249 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    250     pgmR3PhysChunkInvalidateTLB(pVM, false /*fInRendezvous*/); /* includes pgmPhysInvalidatePageMapTLB call */
    251 #endif
    252 
    253     /*
    254      * For the time being we sport a full set of handy pages in addition to the base
    255      * memory to simplify things.
    256      */
    257     rc = MMR3ReserveHandyPages(pVM, RT_ELEMENTS(pVM->pgm.s.aHandyPages)); /** @todo this should be changed to PGM_HANDY_PAGES_MIN but this needs proper testing... */
    258     AssertRCReturn(rc, rc);
    259 
    260     /*
    261      * Setup the zero page (HCPHysZeroPg is set by ring-0).
    262      */
    263     RT_ZERO(pVM->pgm.s.abZeroPg); /* paranoia */
    264 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    265     if (fDriverless)
    266         pVM->pgm.s.HCPhysZeroPg = _4G - GUEST_PAGE_SIZE * 2 /* fake to avoid PGM_PAGE_INIT_ZERO assertion */;
    267     AssertRelease(pVM->pgm.s.HCPhysZeroPg != NIL_RTHCPHYS);
    268     AssertRelease(pVM->pgm.s.HCPhysZeroPg != 0);
    269 #endif
    270 
    271     /*
    272      * Setup the invalid MMIO page (HCPhysMmioPg is set by ring-0).
    273      * (The invalid bits in HCPhysInvMmioPg are set later on init complete.)
    274      */
    275     ASMMemFill32(pVM->pgm.s.abMmioPg, sizeof(pVM->pgm.s.abMmioPg), 0xfeedface);
    276 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    277     if (fDriverless)
    278         pVM->pgm.s.HCPhysMmioPg = _4G - GUEST_PAGE_SIZE * 3 /* fake to avoid PGM_PAGE_INIT_ZERO assertion */;
    279     AssertRelease(pVM->pgm.s.HCPhysMmioPg != NIL_RTHCPHYS);
    280     AssertRelease(pVM->pgm.s.HCPhysMmioPg != 0);
    281     pVM->pgm.s.HCPhysInvMmioPg = pVM->pgm.s.HCPhysMmioPg;
    282 #endif
    283 
    284     /*
    285      * Initialize physical access handlers.
    286      */
    287     /** @cfgm{/PGM/MaxPhysicalAccessHandlers, uint32_t, 32, 65536, 6144}
    288      * Number of physical access handlers allowed (subject to rounding).  This is
    289      * managed as one time allocation during initializations.  The default is
    290      * lower for a driverless setup. */
    291     /** @todo can lower it for nested paging too, at least when there is no
    292      *        nested guest involved. */
    293     uint32_t cAccessHandlers = 0;
    294     rc = CFGMR3QueryU32Def(pCfgPGM, "MaxPhysicalAccessHandlers", &cAccessHandlers, !fDriverless ? 6144 : 640);
    295     AssertLogRelRCReturn(rc, rc);
    296     AssertLogRelMsgStmt(cAccessHandlers >= 32, ("cAccessHandlers=%#x, min 32\n", cAccessHandlers), cAccessHandlers = 32);
    297     AssertLogRelMsgStmt(cAccessHandlers <= _64K, ("cAccessHandlers=%#x, max 65536\n", cAccessHandlers), cAccessHandlers = _64K);
    298 #if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
    299     if (!fDriverless)
    300     {
    301         rc = VMMR3CallR0(pVM, VMMR0_DO_PGM_PHYS_HANDLER_INIT, cAccessHandlers, NULL);
    302         AssertRCReturn(rc, rc);
    303         AssertPtr(pVM->pgm.s.pPhysHandlerTree);
    304         AssertPtr(pVM->pgm.s.PhysHandlerAllocator.m_paNodes);
    305         AssertPtr(pVM->pgm.s.PhysHandlerAllocator.m_pbmAlloc);
    306     }
    307     else
    308 #endif
    309     {
    310         uint32_t       cbTreeAndBitmap = 0;
    311         uint32_t const cbTotalAligned  = pgmHandlerPhysicalCalcTableSizes(&cAccessHandlers, &cbTreeAndBitmap);
    312         uint8_t       *pb = NULL;
    313         rc = SUPR3PageAlloc(cbTotalAligned >> HOST_PAGE_SHIFT, 0, (void **)&pb);
    314         AssertLogRelRCReturn(rc, rc);
    315 
    316         pVM->pgm.s.PhysHandlerAllocator.initSlabAllocator(cAccessHandlers, (PPGMPHYSHANDLER)&pb[cbTreeAndBitmap],
    317                                                           (uint64_t *)&pb[sizeof(PGMPHYSHANDLERTREE)]);
    318         pVM->pgm.s.pPhysHandlerTree = (PPGMPHYSHANDLERTREE)pb;
    319         pVM->pgm.s.pPhysHandlerTree->initWithAllocator(&pVM->pgm.s.PhysHandlerAllocator);
    320     }
    321 
    322     /*
    323      * Register the physical access handler protecting ROMs.
    324      */
    325     if (RT_SUCCESS(rc))
    326         /** @todo why isn't pgmPhysRomWriteHandler registered for ring-0?   */
    327         rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, 0 /*fFlags*/, pgmPhysRomWriteHandler,
    328                                               "ROM write protection", &pVM->pgm.s.hRomPhysHandlerType);
    329 
    330     /*
    331      * Register the physical access handler doing dirty MMIO2 tracing.
    332      */
    333     if (RT_SUCCESS(rc))
    334         rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, PGMPHYSHANDLER_F_KEEP_PGM_LOCK,
    335                                               pgmPhysMmio2WriteHandler, "MMIO2 dirty page tracing",
    336                                               &pVM->pgm.s.hMmio2DirtyPhysHandlerType);
    337 
    338     if (RT_SUCCESS(rc))
    339         return VINF_SUCCESS;
    340 
    341     /* Almost no cleanup necessary, MM frees all memory. */
    342     PDMR3CritSectDelete(pVM, &pVM->pgm.s.CritSectX);
    343 
    344     return rc;
    345 }
    346 
    347 
    348 /**
    349  * Ring-3 init finalizing (not required here).
    350  *
    351  * @returns VBox status code.
    352  * @param   pVM         The cross context VM structure.
    353  */
    354 VMMR3DECL(int) PGMR3InitFinalize(PVM pVM)
    355 {
    356     RT_NOREF(pVM);
    357     int rc = VINF_SUCCESS;
    358 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    359     if (pVM->pgm.s.fRamPreAlloc)
    360         rc = pgmR3PhysRamPreAllocate(pVM);
    361 #endif
    362 
    363     //pgmLogState(pVM);
    364     LogRel(("PGM: PGMR3InitFinalize done: %Rrc\n", rc));
    365     return rc;
    366 }
    367 
    368 
    369 /**
    370  * Init phase completed callback.
    371  *
    372  * @returns VBox status code.
    373  * @param   pVM                 The cross context VM structure.
    374  * @param   enmWhat             What has been completed.
    375  * @thread  EMT(0)
    376  */
    377 VMMR3_INT_DECL(int) PGMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
    378 {
    379     switch (enmWhat)
    380     {
    381         case VMINITCOMPLETED_HM:
    382             AssertLogRelReturn(!pVM->pgm.s.fPciPassthrough, VERR_PGM_PCI_PASSTHRU_MISCONFIG);
    383             break;
    384 
    385         default:
    386             /* shut up gcc */
    387             break;
    388     }
    389 
    390     return VINF_SUCCESS;
    391 }
    392 
    393 
    394 /**
    395  * Applies relocations to data and code managed by this component.
    396  *
    397  * This function will be called at init and whenever the VMM need to relocate it
    398  * self inside the GC.
    399  *
    400  * @param   pVM     The cross context VM structure.
    401  * @param   offDelta    Relocation delta relative to old location.
    402  */
    403 VMMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
    404 {
    405     LogFlow(("PGMR3Relocate: offDelta=%RGv\n", offDelta));
    406     RT_NOREF(pVM, offDelta);
    407 }
    408 
    409 
    410 /**
    411  * Resets a virtual CPU when unplugged.
    412  *
    413  * @param   pVM                 The cross context VM structure.
    414  * @param   pVCpu               The cross context virtual CPU structure.
    415  */
    416 VMMR3DECL(void) PGMR3ResetCpu(PVM pVM, PVMCPU pVCpu)
    417 {
    418     RT_NOREF(pVM, pVCpu);
    419 }
    420 
    421 
    422 /**
    423  * The VM is being reset.
    424  *
    425  * For the PGM component this means that any PD write monitors
    426  * needs to be removed.
    427  *
    428  * @param   pVM     The cross context VM structure.
    429  */
    430 VMMR3_INT_DECL(void) PGMR3Reset(PVM pVM)
    431 {
    432     LogFlow(("PGMR3Reset:\n"));
    433     VM_ASSERT_EMT(pVM);
    434 
    435     PGM_LOCK_VOID(pVM);
    436 
    437 #ifdef DEBUG
    438     DBGFR3_INFO_LOG_SAFE(pVM, "mappings", NULL);
    439     DBGFR3_INFO_LOG_SAFE(pVM, "handlers", "all nostat");
    440 #endif
    441 
    442     //pgmLogState(pVM);
    443     PGM_UNLOCK(pVM);
    444 }
    445 
    446 
    447 /**
    448  * Memory setup after VM construction or reset.
    449  *
    450  * @param   pVM         The cross context VM structure.
    451  * @param   fAtReset    Indicates the context, after reset if @c true or after
    452  *                      construction if @c false.
    453  */
    454 VMMR3_INT_DECL(void) PGMR3MemSetup(PVM pVM, bool fAtReset)
    455 {
    456     if (fAtReset)
    457     {
    458         PGM_LOCK_VOID(pVM);
    459 
    460         int rc = pgmR3PhysRamZeroAll(pVM);
    461         AssertReleaseRC(rc);
    462 
    463         rc = pgmR3PhysRomReset(pVM);
    464         AssertReleaseRC(rc);
    465 
    466         PGM_UNLOCK(pVM);
    467     }
    468 }
    469 
    470 
    471 #ifdef VBOX_STRICT
    472 /**
    473  * VM state change callback for clearing fNoMorePhysWrites after
    474  * a snapshot has been created.
    475  */
    476 static DECLCALLBACK(void) pgmR3ResetNoMorePhysWritesFlag(PUVM pUVM, PCVMMR3VTABLE pVMM, VMSTATE enmState,
    477                                                          VMSTATE enmOldState, void *pvUser)
    478 {
    479     if (   enmState == VMSTATE_RUNNING
    480         || enmState == VMSTATE_RESUMING)
    481         pUVM->pVM->pgm.s.fNoMorePhysWrites = false;
    482     RT_NOREF(pVMM, enmOldState, pvUser);
    483 }
    484 #endif
    485 
    486 /**
    487  * Private API to reset fNoMorePhysWrites.
    488  */
    489 VMMR3_INT_DECL(void) PGMR3ResetNoMorePhysWritesFlag(PVM pVM)
    490 {
    491     pVM->pgm.s.fNoMorePhysWrites = false;
    492 }
    493 
    494 /**
    495  * Terminates the PGM.
    496  *
    497  * @returns VBox status code.
    498  * @param   pVM     The cross context VM structure.
    499  */
    500 VMMR3DECL(int) PGMR3Term(PVM pVM)
    501 {
    502     /* Must free shared pages here. */
    503     PGM_LOCK_VOID(pVM);
    504     pgmR3PhysRamTerm(pVM);
    505     pgmR3PhysRomTerm(pVM);
    506     PGM_UNLOCK(pVM);
    507 
    508     PGMDeregisterStringFormatTypes();
    509     return PDMR3CritSectDelete(pVM, &pVM->pgm.s.CritSectX);
    510 }
    511 
    512 
    513 /**
    514  * Perform an integrity check on the PGM component.
    515  *
    516  * @returns VINF_SUCCESS if everything is fine.
    517  * @returns VBox error status after asserting on integrity breach.
    518  * @param   pVM     The cross context VM structure.
    519  */
    520 VMMR3DECL(int) PGMR3CheckIntegrity(PVM pVM)
    521 {
    522     RT_NOREF(pVM);
    523     return VINF_SUCCESS;
    524 }
    525 
    526 #endif
    527 
    528 VMMDECL(bool) PGMHasDirtyPages(PVM pVM)
    529 {
    530 #ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    531     return pVM->pgm.s.CTX_SUFF(pPool)->cDirtyPages != 0;
    532 #else
    533     RT_NOREF(pVM);
    534     return false;
    535 #endif
    536 }
    537 
    538 
    539 VMMDECL(bool) PGMIsLockOwner(PVMCC pVM)
    540 {
    541     return PDMCritSectIsOwner(pVM, &pVM->pgm.s.CritSectX);
    542 }
    543 
    544 
    545 VMMDECL(int) PGMSetLargePageUsage(PVMCC pVM, bool fUseLargePages)
    546 {
    547     VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
    548 
    549     pVM->pgm.s.fUseLargePages = fUseLargePages;
    550     return VINF_SUCCESS;
    551 }
    552 
    553 
    554 #if defined(VBOX_STRICT) || defined(DOXYGEN_RUNNING)
    555 int pgmLockDebug(PVMCC pVM, bool fVoid, RT_SRC_POS_DECL)
    556 #else
    557 int pgmLock(PVMCC pVM, bool fVoid)
    558 #endif
    559 {
    560 #if defined(VBOX_STRICT)
    561     int rc = PDMCritSectEnterDebug(pVM, &pVM->pgm.s.CritSectX, VINF_SUCCESS, (uintptr_t)ASMReturnAddress(), RT_SRC_POS_ARGS);
    562 #else
    563     int rc = PDMCritSectEnter(pVM, &pVM->pgm.s.CritSectX, VINF_SUCCESS);
    564 #endif
    565     if (RT_SUCCESS(rc))
    566         return rc;
    567     if (fVoid)
    568         PDM_CRITSECT_RELEASE_ASSERT_RC(pVM, &pVM->pgm.s.CritSectX, rc);
    569     else
    570         AssertRC(rc);
    571     return rc;
    572 }
    573 
    574 
    575 void pgmUnlock(PVMCC pVM)
    576 {
    577     uint32_t cDeprecatedPageLocks = pVM->pgm.s.cDeprecatedPageLocks;
    578     pVM->pgm.s.cDeprecatedPageLocks = 0;
    579     int rc = PDMCritSectLeave(pVM, &pVM->pgm.s.CritSectX);
    580     if (rc == VINF_SEM_NESTED)
    581         pVM->pgm.s.cDeprecatedPageLocks = cDeprecatedPageLocks;
    582 }
    583 
    584 
    585 #if !defined(IN_R0) || defined(LOG_ENABLED)
    586 
    587 /** Format handler for PGMPAGE.
    588  * @copydoc FNRTSTRFORMATTYPE */
    589 static DECLCALLBACK(size_t) pgmFormatTypeHandlerPage(PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
    590                                                      const char *pszType, void const *pvValue,
    591                                                      int cchWidth, int cchPrecision, unsigned fFlags,
    592                                                      void *pvUser)
    593 {
    594     size_t    cch;
    595     PCPGMPAGE pPage = (PCPGMPAGE)pvValue;
    596     if (RT_VALID_PTR(pPage))
    597     {
    598         char szTmp[64+80];
    599 
    600         cch = 0;
    601 
    602         /* The single char state stuff. */
    603         static const char s_achPageStates[4]    = { 'Z', 'A', 'W', 'S' };
    604         szTmp[cch++] = s_achPageStates[PGM_PAGE_GET_STATE_NA(pPage)];
    605 
    606 # define IS_PART_INCLUDED(lvl) ( !(fFlags & RTSTR_F_PRECISION) || cchPrecision == (lvl) || cchPrecision >= (lvl)+10 )
    607         if (IS_PART_INCLUDED(5))
    608         {
    609             static const char s_achHandlerStates[4*2] = { '-', 't', 'w', 'a' , '_', 'T', 'W', 'A' };
    610             szTmp[cch++] = s_achHandlerStates[  PGM_PAGE_GET_HNDL_PHYS_STATE(pPage)
    611                                               | ((uint8_t)PGM_PAGE_IS_HNDL_PHYS_NOT_IN_HM(pPage) << 2)];
    612         }
    613 
    614         /* The type. */
    615         if (IS_PART_INCLUDED(4))
    616         {
    617             szTmp[cch++] = ':';
    618             static const char s_achPageTypes[8][4]  = { "INV", "RAM", "MI2", "M2A", "SHA", "ROM", "MIO", "BAD" };
    619             szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE_NA(pPage)][0];
    620             szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE_NA(pPage)][1];
    621             szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE_NA(pPage)][2];
    622         }
    623 
    624         /* The numbers. */
    625         if (IS_PART_INCLUDED(3))
    626         {
    627             szTmp[cch++] = ':';
    628             cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_HCPHYS_NA(pPage), 16, 12, 0, RTSTR_F_ZEROPAD | RTSTR_F_64BIT);
    629         }
    630 
    631         if (IS_PART_INCLUDED(2))
    632         {
    633             szTmp[cch++] = ':';
    634             cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_PAGEID(pPage), 16, 7, 0, RTSTR_F_ZEROPAD | RTSTR_F_32BIT);
    635         }
    636 
    637         if (IS_PART_INCLUDED(6))
    638         {
    639             szTmp[cch++] = ':';
    640             static const char s_achRefs[4] = { '-', 'U', '!', 'L' };
    641             szTmp[cch++] = s_achRefs[PGM_PAGE_GET_TD_CREFS_NA(pPage)];
    642             cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_TD_IDX_NA(pPage), 16, 4, 0, RTSTR_F_ZEROPAD | RTSTR_F_16BIT);
    643         }
    644 # undef IS_PART_INCLUDED
    645 
    646         cch = pfnOutput(pvArgOutput, szTmp, cch);
    647     }
    648     else
    649         cch = pfnOutput(pvArgOutput, RT_STR_TUPLE("<bad-pgmpage-ptr>"));
    650     NOREF(pszType); NOREF(cchWidth); NOREF(pvUser);
    651     return cch;
    652 }
    653 
    654 
    655 /** Format handler for PGMRAMRANGE.
    656  * @copydoc FNRTSTRFORMATTYPE */
    657 static DECLCALLBACK(size_t) pgmFormatTypeHandlerRamRange(PFNRTSTROUTPUT pfnOutput, void *pvArgOutput,
    658                                                          const char *pszType, void const *pvValue,
    659                                                          int cchWidth, int cchPrecision, unsigned fFlags,
    660                                                          void *pvUser)
    661 {
    662     size_t              cch;
    663     PGMRAMRANGE const  *pRam = (PGMRAMRANGE const *)pvValue;
    664     if (RT_VALID_PTR(pRam))
    665     {
    666         char szTmp[80];
    667         cch = RTStrPrintf(szTmp, sizeof(szTmp), "%RGp-%RGp", pRam->GCPhys, pRam->GCPhysLast);
    668         cch = pfnOutput(pvArgOutput, szTmp, cch);
    669     }
    670     else
    671         cch = pfnOutput(pvArgOutput, RT_STR_TUPLE("<bad-pgmramrange-ptr>"));
    672     NOREF(pszType); NOREF(cchWidth); NOREF(cchPrecision); NOREF(pvUser); NOREF(fFlags);
    673     return cch;
    674 }
    675 
    676 /** Format type andlers to be registered/deregistered. */
    677 static const struct
    678 {
    679     char                szType[24];
    680     PFNRTSTRFORMATTYPE  pfnHandler;
    681 } g_aPgmFormatTypes[] =
    682 {
    683     { "pgmpage",        pgmFormatTypeHandlerPage },
    684     { "pgmramrange",    pgmFormatTypeHandlerRamRange }
    685 };
    686 
    687 #endif /* !IN_R0 || LOG_ENABLED */
    688 
    689 
    690 VMMDECL(int) PGMRegisterStringFormatTypes(void)
    691 {
    692 #if !defined(IN_R0) || defined(LOG_ENABLED)
    693     int         rc = VINF_SUCCESS;
    694     unsigned    i;
    695     for (i = 0; RT_SUCCESS(rc) && i < RT_ELEMENTS(g_aPgmFormatTypes); i++)
    696     {
    697         rc = RTStrFormatTypeRegister(g_aPgmFormatTypes[i].szType, g_aPgmFormatTypes[i].pfnHandler, NULL);
    698 # ifdef IN_RING0
    699         if (rc == VERR_ALREADY_EXISTS)
    700         {
    701             /* in case of cleanup failure in ring-0 */
    702             RTStrFormatTypeDeregister(g_aPgmFormatTypes[i].szType);
    703             rc = RTStrFormatTypeRegister(g_aPgmFormatTypes[i].szType, g_aPgmFormatTypes[i].pfnHandler, NULL);
    704         }
    705 # endif
    706     }
    707     if (RT_FAILURE(rc))
    708         while (i-- > 0)
    709             RTStrFormatTypeDeregister(g_aPgmFormatTypes[i].szType);
    710 
    711     return rc;
    712 #else
    713     return VINF_SUCCESS;
    714 #endif
    715 }
    716 
    717 
    718 VMMDECL(void) PGMDeregisterStringFormatTypes(void)
    719 {
    720 #if !defined(IN_R0) || defined(LOG_ENABLED)
    721     for (unsigned i = 0; i < RT_ELEMENTS(g_aPgmFormatTypes); i++)
    722         RTStrFormatTypeDeregister(g_aPgmFormatTypes[i].szType);
    723 #endif
    724 }
    725 
    726 
    727 VMMDECL(int)  PGMGstModifyPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
    728 {
    729     STAM_PROFILE_START(&pVCpu->pgm.s.Stats.CTX_MID_Z(Stat,GstModifyPage), a);
    730     VMCPU_ASSERT_EMT(pVCpu);
    731 
    732     /*
    733      * Validate input.
    734      */
    735     Assert(cb);
    736 
    737     LogFlow(("PGMGstModifyPage %RGv %d bytes fFlags=%08llx fMask=%08llx\n", GCPtr, cb, fFlags, fMask));
    738     RT_NOREF(pVCpu, GCPtr, cb, fFlags, fMask);
    739 
    740     AssertReleaseFailed();
    741     return VERR_NOT_IMPLEMENTED;
    742 }
    743 
    744 
    745 VMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu)
    746 {
    747     VMCPU_ASSERT_EMT(pVCpu);
    748 
    749     bool fMmuEnabled = CPUMGetGuestMmuEnabled(pVCpu);
    750     if (!fMmuEnabled)
    751         return PGMMODE_NONE;
    752 
    753     CPUMMODE enmCpuMode = CPUMGetGuestMode(pVCpu);
    754     return enmCpuMode == CPUMMODE_ARMV8_AARCH64
    755          ? PGMMODE_VMSA_V8_64
    756          : PGMMODE_VMSA_V8_32;
    757 }
    758 
    759 
    760 VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu)
    761 {
    762     RT_NOREF(pVCpu);
    763     return PGMMODE_NONE; /* NEM doesn't need any shadow paging. */
    764 }
    76528
    76629
    … …  
    79760
    79861
    799 VMMDECL(int) PGMGstGetPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, PPGMPTWALK pWalk)
     62DECLINLINE(int) pgmGstGetPageArmv8Hack(PVMCPUCC pVCpu, RTGCPTR GCPtr, PPGMPTWALK pWalk)
    80063{
    80164    VMCPU_ASSERT_EMT(pVCpu);
    … …  
    948211}
    949212
    950 
    951 VMMDECL(int) PGMShwMakePageReadonly(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint32_t fOpFlags)
    952 {
    953     AssertReleaseFailed();
    954     RT_NOREF(pVCpu, GCPtr, fOpFlags);
    955     return VERR_NOT_IMPLEMENTED;
    956 }
    957 
    958 
    959 VMMDECL(int) PGMShwMakePageWritable(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint32_t fOpFlags)
    960 {
    961     AssertReleaseFailed();
    962     RT_NOREF(pVCpu, GCPtr, fOpFlags);
    963     return VERR_NOT_IMPLEMENTED;
    964 }
    965 
    966 
    967 VMMDECL(int) PGMShwMakePageNotPresent(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint32_t fOpFlags)
    968 {
    969     AssertReleaseFailed();
    970     RT_NOREF(pVCpu, GCPtr, fOpFlags);
    971     return VERR_NOT_IMPLEMENTED;
    972 }
    973 
    974 
    975 VMM_INT_DECL(int) PGMHCChangeMode(PVMCC pVM, PVMCPUCC pVCpu, PGMMODE enmGuestMode, bool fForce)
    976 {
    977     //AssertReleaseFailed(); /** @todo Called by the PGM saved state code. */
    978     RT_NOREF(pVM, pVCpu, enmGuestMode, fForce);
    979     return VINF_SUCCESS;
    980 }
    981 
    982 
    983 VMMDECL(int) PGMShwGetPage(PVMCPUCC pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
    984 {
    985     AssertReleaseFailed();
    986     RT_NOREF(pVCpu, GCPtr, pfFlags, pHCPhys);
    987     return VERR_NOT_SUPPORTED;
    988 }
    989 
    990 
    991 int pgmR3ExitShadowModeBeforePoolFlush(PVMCPU pVCpu)
    992 {
    993     RT_NOREF(pVCpu);
    994     return VINF_SUCCESS;
    995 }
    996 
    997 
    998 int pgmR3ReEnterShadowModeAfterPoolFlush(PVM pVM, PVMCPU pVCpu)
    999 {
    1000     RT_NOREF(pVM, pVCpu);
    1001     return VINF_SUCCESS;
    1002 }
    1003 
    1004 
    1005 void pgmR3RefreshShadowModeAfterA20Change(PVMCPU pVCpu)
    1006 {
    1007     RT_NOREF(pVCpu);
    1008 }
    1009 
    1010 
    1011 int pgmGstPtWalk(PVMCPUCC pVCpu, RTGCPTR GCPtr, PPGMPTWALK pWalk, PPGMPTWALKGST pGstWalk)
    1012 {
    1013     VMCPU_ASSERT_EMT(pVCpu);
    1014     RT_NOREF(pGstWalk);
    1015     return PGMGstGetPage(pVCpu, GCPtr, pWalk);
    1016 }
    1017 
    1018 
    1019 int pgmGstPtWalkNext(PVMCPUCC pVCpu, RTGCPTR GCPtr, PPGMPTWALK pWalk, PPGMPTWALKGST pGstWalk)
    1020 {
    1021     VMCPU_ASSERT_EMT(pVCpu);
    1022     return pgmGstPtWalk(pVCpu, GCPtr, pWalk, pGstWalk); /** @todo Always do full walk for now. */
    1023 }
    1024 

  • trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

    r107179 r108132  
    3232#define LOG_GROUP LOG_GROUP_PGM
    3333#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
     34#ifdef IN_RING0
     35# define VBOX_VMM_TARGET_X86
     36#endif
    3437#include <VBox/vmm/dbgf.h>
    3538#include <VBox/vmm/pgm.h>
    … …  
    561564            PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState, pCurType->fNotInHm);
    562565
     566#if defined(VBOX_WITH_NATIVE_NEM) || !defined(VBOX_WITH_ONLY_PGM_NEM_MODE)
    563567            const RTGCPHYS GCPhysPage = pRam->GCPhys + (i << GUEST_PAGE_SHIFT);
     568#endif
     569#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    564570            int rc2 = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage,
    565571                                               false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
    566572            if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
    567573                rc = rc2;
     574#endif
    568575
    569576#ifdef VBOX_WITH_NATIVE_NEM
    … …  
    871878            /* This should normally not be necessary. */
    872879            PGM_PAGE_SET_HNDL_PHYS_STATE_ONLY(pPage, uState);
     880#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    873881            bool fFlushTLBs;
    874882            rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
    … …  
    877885            else
    878886                AssertRC(rc);
     887#endif
    879888
    880889#ifdef VBOX_WITH_NATIVE_NEM
    … …  
    925934     * Flush any shadow page table references *first*.
    926935     */
     936#if defined(VBOX_VMM_TARGET_ARMV8)
     937    AssertReleaseFailed();
     938#endif
     939#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    927940    bool fFlushTLBs = false;
    928941    int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
    929942    AssertLogRelRCReturnVoid(rc);
    930 #if defined(VBOX_VMM_TARGET_ARMV8)
    931     AssertReleaseFailed();
    932 #else
    933943    HMFlushTlbOnAllVCpus(pVM);
    934944#endif
    … …  
    956966    {
    957967        PPGMPHYSHANDLER pHandler;
    958         rc = pgmHandlerPhysicalLookup(pVM, GCPhysPage, &pHandler);
    959         if (RT_SUCCESS(rc))
     968        int rc2 = pgmHandlerPhysicalLookup(pVM, GCPhysPage, &pHandler);
     969        if (RT_SUCCESS(rc2))
    960970        {
    961971            Assert(pHandler->cAliasedPages > 0);
    … …  
    963973        }
    964974        else
    965             AssertMsgFailed(("rc=%Rrc GCPhysPage=%RGp\n", rc, GCPhysPage));
     975            AssertMsgFailed(("rc2=%Rrc GCPhysPage=%RGp\n", rc2, GCPhysPage));
    966976    }
    967977

  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r107194 r108132  
    3232#define LOG_GROUP LOG_GROUP_PGM_PHYS
    3333#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
     34#ifdef IN_RING0
     35# define VBOX_VMM_TARGET_X86
     36#endif
    3437#include <VBox/vmm/pgm.h>
    3538#include <VBox/vmm/trpm.h>
    … …  
    48674870        memcpy(pvDst, pvSrc, cb);
    48684871        PGMPhysReleasePageMappingLock(pVM, &Lock);
     4872#ifdef VBOX_VMM_TARGET_X86
    48694873        rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     4874#elif !defined(VBOX_VMM_TARGET_ARMV8)
     4875# error "misconfig"
     4876#endif
    48704877        return VINF_SUCCESS;
    48714878    }
    … …  
    48744881    memcpy(pvDst, pvSrc, cbPage);
    48754882    PGMPhysReleasePageMappingLock(pVM, &Lock);
     4883#ifdef VBOX_VMM_TARGET_X86
    48764884    rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     4885#elif !defined(VBOX_VMM_TARGET_ARMV8)
     4886# error "misconfig"
     4887#endif
    48774888    GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
    48784889    pvSrc = (const uint8_t *)pvSrc + cbPage;
    … …  
    48944905            memcpy(pvDst, pvSrc, cb);
    48954906            PGMPhysReleasePageMappingLock(pVM, &Lock);
     4907#ifdef VBOX_VMM_TARGET_X86
    48964908            rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     4909#elif !defined(VBOX_VMM_TARGET_ARMV8)
     4910# error "misconfig"
     4911#endif
    48974912            return VINF_SUCCESS;
    48984913        }
    … …  
    49014916        memcpy(pvDst, pvSrc, GUEST_PAGE_SIZE);
    49024917        PGMPhysReleasePageMappingLock(pVM, &Lock);
     4918#ifdef VBOX_VMM_TARGET_X86
    49034919        rc = PGMGstModifyPage(pVCpu, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
     4920#elif !defined(VBOX_VMM_TARGET_ARMV8)
     4921# error "misconfig"
     4922#endif
    49044923        GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + GUEST_PAGE_SIZE);
    49054924        pvSrc    = (const uint8_t *)pvSrc          + GUEST_PAGE_SIZE;
    … …  
    49524971        RTGCPHYS const GCPhys = Walk.GCPhys | ((RTGCUINTPTR)GCPtrSrc & GUEST_PAGE_OFFSET_MASK);
    49534972
     4973#ifdef VBOX_VMM_TARGET_X86
    49544974        /* mark the guest page as accessed. */
    49554975        if (!(Walk.fEffective & X86_PTE_A))
    … …  
    49584978            AssertRC(rc);
    49594979        }
    4960 
     4980#elif !defined(VBOX_VMM_TARGET_ARMV8)
     4981# error "misconfig"
     4982#endif
    49614983        return PGMPhysRead(pVM, GCPhys, pvDst, cb, enmOrigin);
    49624984    }
    … …  
    49734995        RTGCPHYS const GCPhys = Walk.GCPhys | ((RTGCUINTPTR)GCPtrSrc & GUEST_PAGE_OFFSET_MASK);
    49744996
     4997#ifdef VBOX_VMM_TARGET_X86
    49754998        /* mark the guest page as accessed. */
    49764999        if (!(Walk.fEffective & X86_PTE_A))
    … …  
    49795002            AssertRC(rc);
    49805003        }
     5004#elif !defined(VBOX_VMM_TARGET_ARMV8)
     5005# error "misconfig"
     5006#endif
    49815007
    49825008        /* copy */
    … …  
    50475073            Log(("PGMPhysWriteGCPtr: Writing to RO page %RGv %#x\n", GCPtrDst, cb));
    50485074
     5075#ifdef VBOX_VMM_TARGET_X86
    50495076        /* Mark the guest page as accessed and dirty if necessary. */
    50505077        if ((Walk.fEffective & (X86_PTE_A | X86_PTE_D)) != (X86_PTE_A | X86_PTE_D))
    … …  
    50535080            AssertRC(rc);
    50545081        }
     5082#elif !defined(VBOX_VMM_TARGET_ARMV8)
     5083# error "misconfig"
     5084#endif
    50555085
    50565086        return PGMPhysWrite(pVM, GCPhys, pvSrc, cb, enmOrigin);
    … …  
    50725102            Log(("PGMPhysWriteGCPtr: Writing to RO page %RGv %#x\n", GCPtrDst, cb));
    50735103
     5104#ifdef VBOX_VMM_TARGET_X86
    50745105        /* Mark the guest page as accessed and dirty if necessary. */
    50755106        if ((Walk.fEffective & (X86_PTE_A | X86_PTE_D)) != (X86_PTE_A | X86_PTE_D))
    … …  
    50785109            AssertRC(rc);
    50795110        }
     5111#elif !defined(VBOX_VMM_TARGET_ARMV8)
     5112# error "misconfig"
     5113#endif
    50805114
    50815115        /* copy */
    … …  
    53735407{
    53745408    PGM_A20_APPLY_TO_VAR(pVCpu, GCPhys);
     5409    RT_NOREF(pVCpu);
    53755410
    53765411    PGM_LOCK_VOID(pVM);

  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r106061 r108132  
    3232#define LOG_GROUP LOG_GROUP_PGM_POOL
    3333#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
     34#ifndef VBOX_VMM_TARGET_X86
     35# define VBOX_VMM_TARGET_X86
     36#endif
    3437#include <VBox/vmm/pgm.h>
    3538#include <VBox/vmm/mm.h>

  • trunk/src/VBox/VMM/VMMR0/PGMR0.cpp

    r106061 r108132  
    3030*   Header Files                                                                                                                 *
    3131*********************************************************************************************************************************/
     32#define VBOX_VMM_TARGET_X86
    3233#define LOG_GROUP LOG_GROUP_PGM
    3334#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */

  • trunk/src/VBox/VMM/VMMR0/PGMR0Pool.cpp

    r106061 r108132  
    3232#define LOG_GROUP LOG_GROUP_PGM_POOL
    3333#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
     34#define VBOX_VMM_TARGET_X86
    3435#include <VBox/vmm/pgm.h>
    3536#include <VBox/vmm/hm.h>

  • trunk/src/VBox/VMM/VMMR0/PGMR0SharedPage.cpp

    r106061 r108132  
    3232#define LOG_GROUP LOG_GROUP_PGM_SHARED
    3333#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
     34#define VBOX_VMM_TARGET_X86
    3435#include <VBox/vmm/pgm.h>
    3536#include <VBox/vmm/iem.h>

  • trunk/src/VBox/VMM/VMMR3/PGM.cpp

    r107876 r108132  
    10691069        rc = pgmR3InitPaging(pVM);
    10701070
     1071# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    10711072    /*
    10721073     * Init the page pool.
    … …  
    10741075    if (RT_SUCCESS(rc))
    10751076        rc = pgmR3PoolInit(pVM);
     1077# endif
    10761078
    10771079    if (RT_SUCCESS(rc))
    … …  
    19341936    }
    19351937
     1938# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    19361939    /*
    19371940     * The page pool.
    19381941     */
    19391942    pgmR3PoolRelocate(pVM);
     1943# endif
    19401944
    19411945#else
    … …  
    19701974    STAM_REL_COUNTER_RESET(&pVCpu->pgm.s.cGuestModeChanges);
    19711975
     1976# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    19721977    pgmR3PoolResetUnpluggedCpu(pVM, pVCpu);
     1978# endif
    19731979
    19741980    /*
    … …  
    20732079# ifdef PGM_WITH_A20
    20742080            VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
     2081#  ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    20752082            pgmR3RefreshShadowModeAfterA20Change(pVCpu);
    20762083            HMFlushTlb(pVCpu);
     2084#  endif
    20772085# endif
    20782086        }
    … …  
    24012409}
    24022410
     2411# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    24032412
    24042413/**
    … …  
    24292438    }
    24302439
    2431 # ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
     2440#  ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    24322441    Assert(pVCpu->pgm.s.pShwPageCR3R3 == NULL);
    2433 # endif
     2442#  endif
    24342443    return rc;
    24352444}
    … …  
    24512460    AssertRCSuccessReturn(rc, VERR_IPE_UNEXPECTED_INFO_STATUS);
    24522461
    2453 # ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
     2462#  ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    24542463    Assert(pVCpu->pgm.s.pShwPageCR3R3 != NULL || pVCpu->pgm.s.enmShadowMode == PGMMODE_NONE);
    2455 # endif
     2464#  endif
    24562465    AssertMsg(   pVCpu->pgm.s.enmShadowMode >= PGMMODE_NESTED_32BIT
    24572466              || CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu),
    … …  
    24752484}
    24762485
     2486# endif /* !VBOX_WITH_ONLY_PGM_NEM_MODE */
    24772487#endif /* VBOX_VMM_TARGET_X86 */
    24782488#ifdef VBOX_WITH_DEBUGGER

  • trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp

    r107625 r108132  
    406406             * not be informed about writes and keep bogus gst->shw mappings around.
    407407             */
     408#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    408409            pgmPoolFlushPageByGCPhys(pVM, *pGCPhys);
     410#endif
    409411            Assert(!PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage));
    410412            /** @todo r=bird: return VERR_PGM_PHYS_PAGE_RESERVED here if it still has
    … …  
    53535355                    RTGCPHYS const GCPhysPage = pRom->GCPhys + (iPage << GUEST_PAGE_SHIFT);
    53545356                    PPGMPAGE pRamPage = pgmPhysGetPage(pVM, GCPhysPage);
     5357#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    53555358                    int rc2 = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pRamPage, true /*fFlushPTEs*/, &fFlushTLB);
    53565359                    if (rc2 != VINF_SUCCESS && (rc == VINF_SUCCESS || RT_FAILURE(rc2)))
    53575360                        rc = rc2;
     5361#endif
    53585362#ifdef VBOX_WITH_NATIVE_NEM
    53595363                    uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pRamPage);
    … …  
    54485452    RTGCPHYS           *paPhysPage      = (RTGCPHYS *)paUser[2];
    54495453    int                 rc              = VINF_SUCCESS;
     5454    RT_NOREF(pVCpu);
    54505455
    54515456    Log(("pgmR3PhysChangeMemBalloonRendezvous: %s %x pages\n", (fInflate) ? "inflate" : "deflate", cPages));
    … …  
    54545459    if (fInflate)
    54555460    {
     5461# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    54565462        /* Flush the PGM pool cache as we might have stale references to pages that we just freed. */
    54575463        pgmR3PoolClearAllRendezvous(pVM, pVCpu, NULL);
     5464# endif
    54585465
    54595466        /* Replace pages with ZERO pages. */
    … …  
    54815488            LogFlow(("balloon page: %RGp\n", paPhysPage[i]));
    54825489
     5490# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    54835491            /* Flush the shadow PT if this page was previously used as a guest page table. */
    54845492            pgmPoolFlushPageByGCPhys(pVM, paPhysPage[i]);
     5493# endif
    54855494
    54865495            rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, pPage, paPhysPage[i], (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage));
    … …  
    55265535    }
    55275536
    5528 #if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
     5537# if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
    55295538    /* Notify GMM about the balloon change. */
    55305539    rc = GMMR3BalloonedPages(pVM, (fInflate) ? GMMBALLOONACTION_INFLATE : GMMBALLOONACTION_DEFLATE, cPages);
    … …  
    55395548            pVM->pgm.s.cBalloonedPages += cPages;
    55405549    }
    5541 #endif
     5550# endif
    55425551
    55435552    PGM_UNLOCK(pVM);
    … …  
    56975706        }
    56985707    }
     5708#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    56995709    pgmR3PoolWriteProtectPages(pVM);
     5710#endif
    57005711    PGM_INVL_ALL_VCPU_TLBS(pVM);
    57015712    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
    … …  
    59685979    if (pVM->pgm.s.ChunkR3Map.c >= pVM->pgm.s.ChunkR3Map.cMax)
    59695980    {
     5981#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    59705982        /* Flush the pgm pool cache; call the internal rendezvous handler as we're already in a rendezvous handler here. */
    59715983        /** @todo also not really efficient to unmap a chunk that contains PD
    59725984         *  or PT pages. */
    59735985        pgmR3PoolClearAllRendezvous(pVM, pVM->apCpusR3[0], NULL /* no need to flush the REM TLB as we already did that above */);
     5986#endif
    59745987
    59755988        /*
    … …  
    63506363# ifdef PGM_WITH_A20
    63516364        VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
     6365#  ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    63526366        pgmR3RefreshShadowModeAfterA20Change(pVCpu);
    63536367        HMFlushTlb(pVCpu);
     6368#  endif /* !VBOX_WITH_ONLY_PGM_NEM_MODE */
    63546369# endif
    63556370# if 0 /* PGMGetPage will apply the A20 mask to the GCPhys it returns, so we must invalid both sides of the TLB. */

  • trunk/src/VBox/VMM/VMMR3/PGMSavedState.cpp

    r107227 r108132  
    19371937    pgmR3ScanMmio2Pages(pVM, uPass);
    19381938    pgmR3ScanRamPages(pVM, false /*fFinalPass*/);
     1939#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    19391940    pgmR3PoolClearAll(pVM, true /*fFlushRemTlb*/); /** @todo this could perhaps be optimized a bit. */
     1941#endif
    19401942
    19411943    /*
    … …  
    31673169        PVMCPU pVCpu = pVM->apCpusR3[i];
    31683170        pVCpu->pgm.s.GCPhysA20Mask = ~((RTGCPHYS)!pVCpu->pgm.s.fA20Enabled << 20);
     3171#ifdef VBOX_VMM_TARGET_X86
     3172# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    31693173        pgmR3RefreshShadowModeAfterA20Change(pVCpu);
     3174# endif
     3175#endif
    31703176    }
    31713177
    … …  
    33283334                PVMCPU pVCpu = pVM->apCpusR3[i];
    33293335
     3336                /** @todo ARM VMs may have an invalid value here, since PGMMODE_NONE was
     3337                 *        moved from 12 to 31.  Thus far, though, this is a complete NOOP on
     3338                 *        ARM and we still have very limited PGM functionality there (the
     3339                 *        saved state is mostly X86-isms). */
    33303340                rc = PGMHCChangeMode(pVM, pVCpu, pVCpu->pgm.s.enmGuestMode, false /* fForce */);
    33313341                AssertLogRelRCReturn(rc, rc);

  • trunk/src/VBox/VMM/VMMR3/VMMR3.def

    r107276 r108132  
    335335    PGMPhysSimpleWriteGCPtr
    336336    PGMPhysWriteGCPtr
    337     PGMShwMakePageWritable
    338337    PGMR3QueryGlobalMemoryStats
    339338    PGMR3QueryMemoryStats

  • trunk/src/VBox/VMM/include/PDMInternal.h

    r107308 r108132  
    4848#include <VBox/vmm/pdmcommon.h>
    4949#include <VBox/vmm/pdmtask.h>
    50 #ifdef VBOX_VMM_TARGET_ARMV8
     50#if defined(VBOX_VMM_TARGET_X86) || defined(VBOX_VMM_TARGET_AGNOSTIC)
     51# include <VBox/vmm/pdmapic.h>
     52#endif
     53#if defined(VBOX_VMM_TARGET_ARMV8) || defined(VBOX_VMM_TARGET_AGNOSTIC)
    5154# include <VBox/vmm/pdmgic.h>
    52 #else
    53 # include <VBox/vmm/pdmapic.h>
    5455#endif
    5556#include <VBox/sup.h>
    … …  
    18281829#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdm.s.Ic.u.x86.ApicBackend))
    18291830#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.u.x86.ApicBackend))
    1830 #else
     1831# else
    18311832#  define PDM_TO_APICBACKEND(a_pVM)          (&((a_pVM)->pdmr0.s.Ic.u.x86.ApicBackend))
    18321833#  define PDMCPU_TO_APICBACKEND(a_pVCpu)     (&((a_pVCpu)->CTX_SUFF(pVM)->pdmr0.s.Ic.u.x86.ApicBackend))
    1833 #endif
     1834# endif
    18341835#else
    18351836# ifdef IN_RING3
    18361837#  define PDM_TO_GICBACKEND(a_pVM)           (&((a_pVM)->pdm.s.Ic.u.armv8.GicBackend))
    18371838#  define PDMCPU_TO_GICBACKEND(a_pVCpu)      (&((a_pVCpu)->CTX_SUFF(pVM)->pdm.s.Ic.u.armv8.GicBackend))
    1838 #else
    1839 # error "Implement me"
    1840 #endif
     1839# else
     1840#  ifndef VBOX_WITH_MINIMAL_R0 /* hack for AllPdbTypeHack.cpp */
     1841#   error "Implement me"
     1842#  endif
     1843# endif
    18411844#endif
    18421845

  • trunk/src/VBox/VMM/include/PGMInline.h

    r107171 r108132  
    11621162}
    11631163
     1164#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    11641165
    11651166/**
    … …  
    11901191     * Just deal with the simple case here.
    11911192     */
    1192 #ifdef VBOX_STRICT
     1193# ifdef VBOX_STRICT
    11931194    PVMCC pVM = pPool->CTX_SUFF(pVM); NOREF(pVM);
    1194 #endif
    1195 #ifdef LOG_ENABLED
     1195# endif
     1196# ifdef LOG_ENABLED
    11961197    const unsigned uOrg = PGM_PAGE_GET_TRACKING(pPhysPage);
    1197 #endif
     1198# endif
    11981199    const unsigned cRefs = PGM_PAGE_GET_TD_CREFS(pPhysPage);
    11991200    if (cRefs == 1)
    12001201    {
    1201 #if 0 /* for more debug info */
     1202# if 0 /* for more debug info */
    12021203        AssertMsg(   pPoolPage->idx == PGM_PAGE_GET_TD_IDX(pPhysPage)
    12031204                  && iPte == PGM_PAGE_GET_PTE_INDEX(pPhysPage),
    … …  
    12071208                   pPool->aPages[PGM_PAGE_GET_TD_IDX(pPhysPage)].enmKind,
    12081209                   ((uint64_t *)pPoolPage->CTX_SUFF(pvPage))[iPte]));
    1209 #else
     1210# else
    12101211        Assert(pPoolPage->idx == PGM_PAGE_GET_TD_IDX(pPhysPage));
    12111212        Assert(iPte == PGM_PAGE_GET_PTE_INDEX(pPhysPage));
    1212 #endif
     1213# endif
    12131214        /* Invalidate the tracking data. */
    12141215        PGM_PAGE_SET_TRACKING(pVM, pPhysPage, 0);
    … …  
    13161317}
    13171318
     1319#endif /* !VBOX_WITH_ONLY_PGM_NEM_MODE */
    13181320
    13191321/** @} */

  • trunk/src/VBox/VMM/include/PGMInternal.h

    r107194 r108132  
    7676 * Optimization for PAE page tables that are modified often
    7777 */
    78 #ifndef VBOX_VMM_TARGET_ARMV8
     78#if !defined(VBOX_VMM_TARGET_ARMV8) && !defined(VBOX_WITH_ONLY_PGM_NEM_MODE)
    7979# define PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
    8080#endif
    … …  
    25132513/** @name A20 gate macros
    25142514 * @{ */
    2515 #define PGM_WITH_A20
     2515#if defined(VBOX_VMM_TARGET_X86) || defined(DOXYGEN_RUNNING)
     2516# define PGM_WITH_A20
     2517#elif !defined(VBOX_VMM_TARGET_ARMV8) && !defined(IN_TSTVMSTRUCT)
     2518# error "Misconfig"
     2519#endif
    25162520#ifdef PGM_WITH_A20
    25172521# define PGM_A20_IS_ENABLED(a_pVCpu)                        ((a_pVCpu)->pgm.s.fA20Enabled)
    … …  
    40004004void            pgmR3PhysAssertSharedPageChecksums(PVM pVM);
    40014005
     4006# ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
    40024007int             pgmR3PoolInit(PVM pVM);
    40034008void            pgmR3PoolRelocate(PVM pVM);
    … …  
    40074012DECLCALLBACK(VBOXSTRICTRC) pgmR3PoolClearAllRendezvous(PVM pVM, PVMCPU pVCpu, void *fpvFlushRemTbl);
    40084013void            pgmR3PoolWriteProtectPages(PVM pVM);
     4014# endif
    40094015
    40104016#endif /* IN_RING3 */
    4011 #ifdef IN_RING0
     4017#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
     4018# ifdef IN_RING0
    40124019int             pgmR0PoolInitVM(PGVM pGVM);
    4013 #endif
     4020# endif
    40144021int             pgmPoolAlloc(PVMCC pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, PGMPOOLACCESS enmAccess, bool fA20Enabled,
    40154022                             uint16_t iUser, uint32_t iUserTable, bool fLockPage, PPPGMPOOLPAGE ppPage);
    … …  
    40764083int             pgmR3ReEnterShadowModeAfterPoolFlush(PVM pVM, PVMCPU pVCpu);
    40774084void            pgmR3RefreshShadowModeAfterA20Change(PVMCPU pVCpu);
     4085#endif  /* !VBOX_WITH_ONLY_PGM_NEM_MODE */
    40784086
    40794087int             pgmShwMakePageSupervisorAndWritable(PVMCPUCC pVCpu, RTGCPTR GCPtr, bool fBigPage, uint32_t fOpFlags);
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