Changeset 10817 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Jul 22, 2008 3:03:14 PM (17 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/HWACCM.cpp
r10730 r10817 350 350 if (val & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT) 351 351 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT\n")); 352 if (val & VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL) 353 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL\n")); 352 354 353 355 val = pVM->hwaccm.s.vmx.msr.vmx_proc_ctls.n.disallowed0; … … 384 386 if (val & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT) 385 387 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT *must* be set\n")); 388 if (val & VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL) 389 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL *must* be set\n")); 390 391 if (val & VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL) 392 { 393 LogRel(("HWACCM: MSR_IA32_VMX_PROCBASED_CTLS2 = %VX64\n", pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.u)); 394 val = pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.allowed1; 395 if (val & VMX_VMCS_CTRL_PROC_EXEC2_EPT) 396 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_EPT\n")); 397 if (val & VMX_VMCS_CTRL_PROC_EXEC2_VPID) 398 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_VPID\n")); 399 400 val = pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.disallowed0; 401 if (val & VMX_VMCS_CTRL_PROC_EXEC2_EPT) 402 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_EPT *must* be set\n")); 403 if (val & VMX_VMCS_CTRL_PROC_EXEC2_VPID) 404 LogRel(("HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_VPID *must* be set\n")); 405 } 386 406 387 407 LogRel(("HWACCM: MSR_IA32_VMX_ENTRY_CTLS = %VX64\n", pVM->hwaccm.s.vmx.msr.vmx_entry.u)); … … 412 432 if (val & VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ) 413 433 LogRel(("HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ *must* be set\n")); 434 435 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps) 436 { 437 LogRel(("HWACCM: MSR_IA32_VMX_EPT_VPID_CAPS = %VX64\n", pVM->hwaccm.s.vmx.msr.vmx_eptcaps)); 438 439 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_RWX_X_ONLY) 440 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_RWX_X_ONLY\n")); 441 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_RWX_W_ONLY) 442 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_RWX_W_ONLY\n")); 443 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_RWX_WX_ONLY) 444 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_RWX_WX_ONLY\n")); 445 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_GAW_21_BITS) 446 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_GAW_21_BITS\n")); 447 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_GAW_30_BITS) 448 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_GAW_30_BITS\n")); 449 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_GAW_39_BITS) 450 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_GAW_39_BITS\n")); 451 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_GAW_48_BITS) 452 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_GAW_48_BITS\n")); 453 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_GAW_57_BITS) 454 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_GAW_57_BITS\n")); 455 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_EMT_UC) 456 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_EMT_UC\n")); 457 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_EMT_WC) 458 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_EMT_WC\n")); 459 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_EMT_WT) 460 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_EMT_WT\n")); 461 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_EMT_WP) 462 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_EMT_WP\n")); 463 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_EMT_WB) 464 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_EMT_WB\n")); 465 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_SP_21_BITS) 466 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_SP_21_BITS\n")); 467 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_SP_30_BITS) 468 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_SP_30_BITS\n")); 469 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_SP_39_BITS) 470 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_SP_39_BITS\n")); 471 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_SP_48_BITS) 472 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_SP_48_BITS\n")); 473 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVEPT) 474 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVEPT\n")); 475 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVEPT_CAPS_INDIV) 476 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVEPT_CAPS_INDIV\n")); 477 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVEPT_CAPS_CONTEXT) 478 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVEPT_CAPS_CONTEXT\n")); 479 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVEPT_CAPS_ALL) 480 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVEPT_CAPS_ALL\n")); 481 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVVPID) 482 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVVPID\n")); 483 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_INDIV) 484 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_INDIV\n")); 485 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_CONTEXT) 486 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_CONTEXT\n")); 487 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_ALL) 488 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_ALL\n")); 489 if (pVM->hwaccm.s.vmx.msr.vmx_eptcaps & MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_CONTEXT_GLOBAL) 490 LogRel(("HWACCM: MSRVAL_IA32_VMX_EPT_CAPS_INVVPID_CAPS_CONTEXT_GLOBAL\n")); 491 } 414 492 415 493 LogRel(("HWACCM: MSR_IA32_VMX_MISC = %VX64\n", pVM->hwaccm.s.vmx.msr.vmx_misc)); -
trunk/src/VBox/VMM/HWACCMInternal.h
r10691 r10817 240 240 VMX_CAPABILITY vmx_pin_ctls; 241 241 VMX_CAPABILITY vmx_proc_ctls; 242 VMX_CAPABILITY vmx_proc_ctls2; 242 243 VMX_CAPABILITY vmx_exit; 243 244 VMX_CAPABILITY vmx_entry; … … 248 249 uint64_t vmx_cr4_fixed1; 249 250 uint64_t vmx_vmcs_enum; 251 uint64_t vmx_eptcaps; 250 252 } msr; 251 253 -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r10687 r10817 89 89 VMX_CAPABILITY vmx_pin_ctls; 90 90 VMX_CAPABILITY vmx_proc_ctls; 91 VMX_CAPABILITY vmx_proc_ctls2; 91 92 VMX_CAPABILITY vmx_exit; 92 93 VMX_CAPABILITY vmx_entry; … … 97 98 uint64_t vmx_cr4_fixed1; 98 99 uint64_t vmx_vmcs_enum; 100 uint64_t vmx_eptcaps; 99 101 } msr; 100 102 /* Last instruction error */ … … 222 224 HWACCMR0Globals.vmx.msr.vmx_cr4_fixed1 = ASMRdMsr(MSR_IA32_VMX_CR4_FIXED1); 223 225 HWACCMR0Globals.vmx.msr.vmx_vmcs_enum = ASMRdMsr(MSR_IA32_VMX_VMCS_ENUM); 226 227 if (HWACCMR0Globals.vmx.msr.vmx_proc_ctls.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL) 228 { 229 HWACCMR0Globals.vmx.msr.vmx_proc_ctls2.u = ASMRdMsr(MSR_IA32_VMX_PROCBASED_CTLS2); 230 if (HWACCMR0Globals.vmx.msr.vmx_proc_ctls2.n.allowed1 & (VMX_VMCS_CTRL_PROC_EXEC2_EPT|VMX_VMCS_CTRL_PROC_EXEC2_VPID)) 231 HWACCMR0Globals.vmx.msr.vmx_eptcaps = ASMRdMsr(MSR_IA32_VMX_EPT_CAPS); 232 } 233 224 234 HWACCMR0Globals.vmx.hostCR4 = ASMGetCR4(); 225 235 … … 655 665 pVM->hwaccm.s.vmx.msr.vmx_pin_ctls = HWACCMR0Globals.vmx.msr.vmx_pin_ctls; 656 666 pVM->hwaccm.s.vmx.msr.vmx_proc_ctls = HWACCMR0Globals.vmx.msr.vmx_proc_ctls; 667 pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2 = HWACCMR0Globals.vmx.msr.vmx_proc_ctls2; 657 668 pVM->hwaccm.s.vmx.msr.vmx_exit = HWACCMR0Globals.vmx.msr.vmx_exit; 658 669 pVM->hwaccm.s.vmx.msr.vmx_entry = HWACCMR0Globals.vmx.msr.vmx_entry; … … 663 674 pVM->hwaccm.s.vmx.msr.vmx_cr4_fixed1 = HWACCMR0Globals.vmx.msr.vmx_cr4_fixed1; 664 675 pVM->hwaccm.s.vmx.msr.vmx_vmcs_enum = HWACCMR0Globals.vmx.msr.vmx_vmcs_enum; 676 pVM->hwaccm.s.vmx.msr.vmx_eptcaps = HWACCMR0Globals.vmx.msr.vmx_eptcaps; 665 677 pVM->hwaccm.s.svm.u32Rev = HWACCMR0Globals.svm.u32Rev; 666 678 pVM->hwaccm.s.svm.u32MaxASID = HWACCMR0Globals.svm.u32MaxASID;
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