Changeset 108794 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
- Timestamp:
- Mar 31, 2025 11:31:09 AM (2 weeks ago)
- svn:sync-xref-src-repo-rev:
- 168237
- Location:
- trunk/src/VBox/Devices/EFI/FirmwareNew
- Files:
-
- 2 edited
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trunk/src/VBox/Devices/EFI/FirmwareNew
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to (toggle deleted branches)/vendor/edk2/current 103735-103757,103769-103776,129194-164365 /vendor/edk2/current 103735-103757,103769-103776,129194-168232
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trunk/src/VBox/Devices/EFI/FirmwareNew/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
r105670 r108794 2 2 Config SMRAM Save State for SmmBases Relocation. 3 3 4 Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>4 Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.<BR> 5 5 Copyright (c) 2024, Intel Corporation. All rights reserved.<BR> 6 6 SPDX-License-Identifier: BSD-2-Clause-Patent … … 9 9 #include "InternalSmmRelocationLib.h" 10 10 #include <Register/Amd/SmramSaveStateMap.h> 11 12 #define EFER_ADDRESS 0XC0000080ul13 11 14 12 /** … … 24 22 ) 25 23 { 26 UINT8 SmmSaveStateRegisterLma; 27 UINT32 LMAValue; 24 UINT8 SmmSaveStateRegisterLma; 25 MSR_IA32_EFER_REGISTER Msr; 26 27 Msr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER); 28 28 29 29 SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT; 30 30 31 LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA; 32 if (LMAValue) { 31 if (Msr.Bits.LMA) { 33 32 SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT; 34 33 } … … 92 91 UINT64 OriginalInstructionPointer; 93 92 AMD_SMRAM_SAVE_STATE_MAP *AmdCpuState; 93 MSR_IA32_EFER_REGISTER Msr; 94 94 95 95 AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState; 96 96 97 if (GetMmSaveStateRegisterLma () == EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT) { 98 OriginalInstructionPointer = (UINT64)AmdCpuState->x86._EIP; 99 AmdCpuState->x86._EIP = (UINT32)NewInstructionPointer; 100 // 101 // Clear the auto HALT restart flag so the RSM instruction returns 102 // program control to the instruction following the HLT instruction. 103 // 104 if ((AmdCpuState->x86.AutoHALTRestart & BIT0) != 0) { 105 AmdCpuState->x86.AutoHALTRestart &= ~BIT0; 106 } 97 OriginalInstructionPointer = AmdCpuState->x64._RIP; 98 Msr.Uint64 = AmdCpuState->x64.EFER; 99 100 if (!Msr.Bits.LMA) { 101 AmdCpuState->x64._RIP = NewInstructionPointer32; 107 102 } else { 108 OriginalInstructionPointer = AmdCpuState->x64._RIP; 109 if ((AmdCpuState->x64.EFER & LMA) == 0) { 110 AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer32; 111 } else { 112 AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer; 113 } 103 AmdCpuState->x64._RIP = NewInstructionPointer; 104 } 114 105 115 // 116 // Clear the auto HALT restart flag so the RSM instruction returns 117 // program control to the instruction following the HLT instruction. 118 // 119 if ((AmdCpuState->x64.AutoHALTRestart & BIT0) != 0) { 120 AmdCpuState->x64.AutoHALTRestart &= ~BIT0; 121 } 106 // 107 // Clear the auto HALT restart flag so the RSM instruction returns 108 // program control to the instruction following the HLT instruction. 109 // 110 if ((AmdCpuState->x64.AutoHALTRestart & BIT0) != 0) { 111 AmdCpuState->x64.AutoHALTRestart &= ~BIT0; 122 112 } 123 113
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