Changeset 108842 in vbox for trunk/include

Timestamp:

Apr 4, 2025 8:27:09 AM (6 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168292

Message:

include/iprt/armv8.h: Some additional TCR_EL1 related definitions, bugref:10388

File:

• trunk/include/iprt/armv8.h (modified) (3 diffs)

trunk/include/iprt/armv8.h ¶

@@ -1214 +1214 @@
  */
 /** Bit 0 - 5 - Size offset of the memory region addressed by TTBR0_EL1 (2^(64-T0SZ)). */
-#define ARMV8_TCR_EL1_AARCH64_T0SZ                              (  RT_BIT_64(0) | RT_BIT_64(1) | RT_BIT_64(2) \
+#define ARMV8_TCR_EL1_AARCH64_T0SZ_MASK                         (  RT_BIT_64(0) | RT_BIT_64(1) | RT_BIT_64(2) \
                                                                  | RT_BIT_64(3) | RT_BIT_64(4) | RT_BIT_64(5))
+#define ARMV8_TCR_EL1_AARCH64_T0SZ_SHIFT                        0
+#define ARMV8_TCR_EL1_AARCH64_T0SZ                              ARMV8_TCR_EL1_AARCH64_T0SZ_MASK
 #define ARMV8_TCR_EL1_AARCH64_T0SZ_GET(a_Tcr)                   ((a_Tcr) & ARMV8_TCR_EL1_AARCH64_T1SZ)
 /** Bit 7 - Translation table walk disable for translations using TTBR0_EL1. */
@@ -1267 +1269 @@
 # define ARMV8_TCR_EL1_AARCH64_TG0_64KB                         3
 /** Bit 16 - 21 - Size offset of the memory region addressed by TTBR1_EL1 (2^(64-T1SZ)). */
-#define ARMV8_TCR_EL1_AARCH64_T1SZ                              (  RT_BIT_64(16) | RT_BIT_64(17) | RT_BIT_64(18) \
+#define ARMV8_TCR_EL1_AARCH64_T1SZ_MASK                         (  RT_BIT_64(16) | RT_BIT_64(17) | RT_BIT_64(18) \
                                                                  | RT_BIT_64(19) | RT_BIT_64(20) | RT_BIT_64(21))
-#define ARMV8_TCR_EL1_AARCH64_T1SZ_GET(a_Tcr)                   (((a_Tcr) & ARMV8_TCR_EL1_AARCH64_T1SZ) >> 16)
+#define ARMV8_TCR_EL1_AARCH64_T1SZ_SHIFT                        16
+#define ARMV8_TCR_EL1_AARCH64_T1SZ                              ARMV8_TCR_EL1_AARCH64_T1SZ_MASK
+#define ARMV8_TCR_EL1_AARCH64_T1SZ_GET(a_Tcr)                   (((a_Tcr) & ARMV8_TCR_EL1_AARCH64_T1SZ) >> ARMV8_TCR_EL1_AARCH64_T1SZ_SHIFT)
 /** Bit 22 - Selects whether TTBR0_EL1 (0) or TTBR1_EL1 (1) defines the ASID. */
 #define ARMV8_TCR_EL1_AARCH64_A1                                RT_BIT_64(22)
@@ -1310 +1314 @@
 # define ARMV8_TCR_EL1_AARCH64_SH1_INNER_SHAREABLE              3
 /** Bit 30 - 31 - Translation Granule Size for TTBR1_EL1. */
-#define ARMV8_TCR_EL1_AARCH64_TG1                               (RT_BIT_64(30) | RT_BIT_64(31))
+#define ARMV8_TCR_EL1_AARCH64_TG1_MASK                          (RT_BIT_64(30) | RT_BIT_64(31))
+#define ARMV8_TCR_EL1_AARCH64_TG1_SHIFT                         30
+#define ARMV8_TCR_EL1_AARCH64_TG1                               ARMV8_TCR_EL1_AARCH64_TG1_MASK
 #define ARMV8_TCR_EL1_AARCH64_TG1_GET(a_Tcr)                    (((a_Tcr) & ARMV8_TCR_EL1_AARCH64_TG1) >> 30)
 /** Invalid granule size. */