Changeset 108882 in vbox for trunk/src/VBox/VMM/VMMAll/GITSAll.cpp
- Timestamp:
- Apr 8, 2025 10:53:54 AM (5 weeks ago)
- svn:sync-xref-src-repo-rev:
- 168333
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/GITSAll.cpp
r108878 r108882 137 137 138 138 139 #if 0 139 140 static const char * gitsGetCommandName(uint8_t uCmdId) 140 141 { … … 166 167 } 167 168 } 169 #endif 168 170 169 171 … … 420 422 pGitsDev->uCmdReadReg = 0; 421 423 pGitsDev->uCmdWriteReg = 0; 422 RT_ZERO(pGitsDev->a uCt);424 RT_ZERO(pGitsDev->aCtes); 423 425 } 424 426 … … 498 500 RT_BF_GET(uReg, GITS_BF_CTRL_REG_CWRITER_RETRY), uReg & GITS_BF_CTRL_REG_CWRITER_OFFSET_MASK); 499 501 } 502 503 /* Interrupt Collection Table. */ 504 { 505 pHlp->pfnPrintf(pHlp, " Collection Table:\n"); 506 bool fHasValidCtes = false; 507 for (unsigned i = 0; i < RT_ELEMENTS(pGitsDev->aCtes); i++) 508 { 509 if (pGitsDev->aCtes[i].fValid) 510 { 511 AssertCompile(sizeof(pGitsDev->aCtes[i].idTargetCpu) == sizeof(uint16_t)); 512 pHlp->pfnPrintf(pHlp, " aCtes[%u].idTargetCpu = %#RX16\n", i, pGitsDev->aCtes[i].idTargetCpu); 513 fHasValidCtes = true; 514 } 515 } 516 if (!fHasValidCtes) 517 pHlp->pfnPrintf(pHlp, " Empty (no valid entries)\n"); 518 } 500 519 } 501 520 … … 513 532 if (!fIsEmpty) 514 533 { 515 uint32_t const cCmdQueuePages = (pGitsDev->uCmdBaseReg.u & GITS_BF_CTRL_REG_CBASER_SIZE_MASK) + 1;534 uint32_t const cCmdQueuePages = RT_BF_GET(pGitsDev->uCmdBaseReg.u, GITS_BF_CTRL_REG_CBASER_SIZE) + 1; 516 535 uint32_t const cbCmdQueue = cCmdQueuePages << GITS_CMD_QUEUE_PAGE_SHIFT; 517 536 AssertRelease(cbCmdQueue <= cbBuf); /** @todo Paranoia; make this a debug assert later. */ … … 538 557 /* The write offset has wrapped around, read till end of buffer followed by wrapped-around data. */ 539 558 uint32_t const cbForward = cbCmdQueue - offRead; 540 uint32_t const cbWrapped = off Read;559 uint32_t const cbWrapped = offWrite; 541 560 Assert(cbForward + cbWrapped <= cbBuf); 542 561 rc = PDMDevHlpPhysReadMeta(pDevIns, GCPhysCmds, pvBuf, cbForward); … … 575 594 uint32_t const uTargetCpuId = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_RDBASE); 576 595 uint16_t const uIntrCollectionId = RT_BF_GET(uDw2, GITS_BF_CMD_MAPC_DW2_IC_ID); 577 AssertRelease(uIntrCollectionId < RT_ELEMENTS(pGitsDev->a uCt)); /** @todo later figure ideal/correct CT size. */596 AssertRelease(uIntrCollectionId < RT_ELEMENTS(pGitsDev->aCtes)); /** @todo later figure ideal/correct CT size. */ 578 597 579 598 GITS_CRIT_SECT_ENTER(pDevIns); 580 599 Assert(!RT_BF_GET(pGitsDev->uTypeReg.u, GITS_BF_CTRL_REG_TYPER_PTA)); 581 pGitsDev->a uCt[uIntrCollectionId].fValid = fValid;582 pGitsDev->a uCt[uIntrCollectionId].idTargetCpu = uTargetCpuId;600 pGitsDev->aCtes[uIntrCollectionId].fValid = fValid; 601 pGitsDev->aCtes[uIntrCollectionId].idTargetCpu = uTargetCpuId; 583 602 GITS_CRIT_SECT_LEAVE(pDevIns); 603 STAM_COUNTER_INC(&pGitsDev->StatCmdMapc); 584 604 break; 585 605 } … … 588 608 { 589 609 /* Nothing to do since all previous commands have committed their changes to device state. */ 610 STAM_COUNTER_INC(&pGitsDev->StatCmdSync); 590 611 break; 591 612 } … … 594 615 { 595 616 /* Nothing to do as we currently do not cache interrupt mappings. */ 617 STAM_COUNTER_INC(&pGitsDev->StatCmdInvall); 596 618 break; 597 619 } 598 620 599 621 default: 600 AssertReleaseMsgFailed(("Cmd=%#x (%s)\n", uCmdId, gitsGetCommandName(uCmdId))); 622 //AssertReleaseMsgFailed(("Cmd=%#x (%s) idxCmd=%u cCmds=%u cbCmds=%u\n", uCmdId, 623 // gitsGetCommandName(uCmdId), idxCmd, cCmds, cbCmds)); 624 //break; 601 625 break; 602 626 }
Note:
See TracChangeset
for help on using the changeset viewer.