Changeset 108898 in vbox for trunk/src/VBox/VMM/VMMAll/target-armv8/bsd-spec-analyze.py

Timestamp:

Apr 8, 2025 6:09:19 PM (2 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168355

Message:

VMM/IEM: Working on the ARM bsd/opensource spec reader & decoder generator. Still work in progress. jiraref:VBP-1598

File:

• trunk/src/VBox/VMM/VMMAll/target-armv8/bsd-spec-analyze.py (modified) (17 diffs)

trunk/src/VBox/VMM/VMMAll/target-armv8/bsd-spec-analyze.py

@@ -1379 +1379 @@
 
     def __init__(self):
-        self.oDecoderRoot = None;
+        self.oDecoderRoot    = None;
+        self.asRootIndexExpr = None;
 
 
@@ -1387 +1388 @@
         """
         self.oDecoderRoot = DecoderNode(sorted(g_aoAllArmInstructions,
-                                               key = operator.attrgetter('fFixedMask', 'fFixedValue', 'sName')),
+                                               key = operator.attrgetter('fFixedMask', 'fFixedValue', 'sName'))[:384],
                                         0, 0);
         self.oDecoderRoot.constructNextLevel(0, sys.maxsize);
@@ -1469 +1470 @@
                     '    {',
                 ]);
-                asTail = [
-                    '    }',
-                    '',  # ASSUMES if condition
-                    '    LogFlow(("Invalid instruction %%#x at %%x\n", uOpcode, pVCpu->cpum.GstCtx.Pc.u64));',
-                    '    return IEMOP_RAISE_INVALID_OPCODE_RET();',
+                sIndent = '    ';
+                asTail  = [
+                    '    LogFlow(("Invalid instruction %%#x at %%x\\n", uOpcode, pVCpu->cpum.GstCtx.Pc.u64));',
+                    '    IEMOP_RAISE_INVALID_OPCODE_RET();',
+                    '}',
                 ];
 
@@ -1487 +1488 @@
                 '%s    return iemImpl_%s(%s);' % (sIndent, sCName, ', '.join(asArgs),),
                 '%s#else' % (sIndent,),
-                '%s    RT_NOREF(%s);' % (sIndent, ', '.join(asArgs) if asArgs else 'uOpcode') ,
+                '%s    RT_NOREF(%s);' % (sIndent, ', '.join(asArgs + ['pVCpu', 'uOpcode',]),),
                 '%s    return VERR_IEM_INSTR_NOT_IMPLEMENTED;' % (sIndent,),
                 '%s#endif' % (sIndent,),
@@ -1516 +1517 @@
             ];
         asLines += [
-            '    return iemDecodeA64_Invalid(uOpcode);',
+            '    return iemDecodeA64_Invalid(pVCpu, uOpcode);',
             '}',
         ];
@@ -1530 +1531 @@
 
         # First recurse.
-        for oChildNode in oNode.dChildren.values():
+        cLeafEntries    = 0;
+        cMultiIfEntries = 0;
+        for idx in sorted(oNode.dChildren):
+            oChildNode = oNode.dChildren[idx];
             if oChildNode.dChildren:
                 asLines += self.generateDecoderCode(oChildNode, uDepth + 1);
@@ -1536 +1540 @@
                 assert len(oChildNode.aoInstructions) > 1;
                 asLines += self.generateDecoderCodeMultiIfFunc(oChildNode, uDepth + 1);
+                cMultiIfEntries += 1;
             else:
                 assert len(oChildNode.aoInstructions) == 1;
                 assert oChildNode.fChildMask in [DecoderNode.kChildMaskOpcodeValueIf, 0];
-
-        # Generate the function.
-        ## @todo add some table stats here.
+                cLeafEntries += 1;
+
+        # Generate the function.  For the top level we just do the table, as
+        # the functions are static and we need the interpreter code to be able
+        # to address the symbol and this is the speedier way.
+        cTabEntries = 1 << oNode.fChildMask.bit_count();
         asLines += [
             '',
-            '/* %08x/%08x level %u */' % (oNode.fCheckedMask, oNode.fCheckedValue, uDepth,),
-            'FNIEMOP_DEF_1(%s, uint32_t, uOpcode)' % (oNode.getFuncName(uDepth),),
-            '{',
-            '    static PFIEMOPU32 const s_apfn[] = ',
-            '    {',
+            '/* %08x/%08x level %u - mask=%#x entries=%#x valid=%%%u (%#x) leaf=%%%u (%#x) multi-if=%%%u (%#x) */'
+            % (oNode.fCheckedMask, oNode.fCheckedValue, uDepth, oNode.fChildMask, cTabEntries,
+               int(round(len(oNode.dChildren) * 100.0 / cTabEntries)), len(oNode.dChildren),
+               int(round(cLeafEntries         * 100.0 / cTabEntries)), cLeafEntries,
+               int(round(cMultiIfEntries      * 100.0 / cTabEntries)), cMultiIfEntries, ),
         ];
+        if uDepth > 0:
+            asLines += [
+                'FNIEMOP_DEF_1(%s, uint32_t, uOpcode)' % (oNode.getFuncName(uDepth),),
+                '{',
+                '    static PFIEMOPU32 const s_apfn[] = ',
+                '    {',
+            ];
+            sTabNm  = 's_apfn';
+            sIndent = '    ';
+        else:
+            asLines += [
+                'PFIEMOPU32 const g_apfnIemInterpretOnlyA64[] = ',
+                '{',
+            ];
+            sTabNm  = 'g_apfnIemInterpretOnlyA64';
+            sIndent = '';
 
         idxPrev = -1;
-        for idx, oChildNode in oNode.dChildren.items():
+        for idx in sorted(oNode.dChildren):
+            oChildNode = oNode.dChildren[idx];
             idxPrev += 1;
             while idxPrev < idx:
-                asLines.append('        iemDecodeA64_Invalid,');
+                asLines.append(sIndent + '    iemDecodeA64_Invalid, // %s' % (idxPrev,));
                 idxPrev += 1;
-            asLines.append('        %s,' % (oChildNode.getFuncName(uDepth + 1),));
+            asLines.append('%s    %s,' % (sIndent, oChildNode.getFuncName(uDepth + 1),));
+
+        while idxPrev + 1 < cTabEntries:
+            idxPrev += 1;
+            asLines.append(sIndent + '    iemDecodeA64_Invalid, // %s' % (idxPrev,));
 
         asLines += [
-            '    };',
-            '    AssertCompile(RT_ELEMENTS(s_apfn) == %#x);' % (1 << oNode.fChildMask.bit_count()),
+            '%s};' % (sIndent,),
+            '%sAssertCompile(RT_ELEMENTS(%s) == %#x);' % (sIndent, sTabNm, cTabEntries,),
             '',
         ];
@@ -1569 +1598 @@
         assert aaiAlgo, 'fChildMask=%s #children=%s instrs=%s' % (oNode.fChildMask, len(oNode.dChildren), oNode.aoInstructions,);
         asIdx = [
+            '    /* fMask=%#010x -> %#010x */' % (oNode.fChildMask, cTabEntries - 1),
             '    uintptr_t const idx = ((uOpcode >> %2u) & %#010x) /* bit %2u L %u -> 0 */'
             % (aaiAlgo[0][0], aaiAlgo[0][2], aaiAlgo[0][0], aaiAlgo[0][2].bit_count(), ),
@@ -1576 +1606 @@
                          % (iSrcBit - iDstBit, fMask << iDstBit, iSrcBit, fMask.bit_count(), iDstBit));
         asIdx[-1] += ';';
-        asLines += asIdx;
-
-        # Make the call and complete the function.
-        asLines += [
-            '    return s_apfn[idx](pVCpu, uOpcode);',
-            '}'
-        ];
+
+        # Make the call and complete the function.  For the top level, we save
+        # the expression so we can later put it in a header file.
+        if uDepth > 0:
+            asLines += asIdx;
+            asLines += [
+                '    return s_apfn[idx](pVCpu, uOpcode);',
+                '}'
+            ];
+        else:
+            self.asRootIndexExpr = asIdx;
         return asLines;
 
-    def generateDecoderCpp(self, iPartNo):
+    def generateDecoderCpp(self, sFilename, iPartNo):
         """ Generates the decoder data & code. """
-        _ = iPartNo;
+        _ = iPartNo; _ = sFilename;
         asLines = self.generateLicenseHeader();
         asLines.extend([
@@ -1593 +1627 @@
             '#define VMCPU_INCL_CPUM_GST_CTX',
             '#include "IEMInternal.h"',
-            '#include "vm.h"',
+            '#include <VBox/vmm/vm.h>',
+            '#include "VBox/err.h"',
             '',
             '#include "iprt/armv8.h"',
             '',
+            '#include "IEMMc.h"',
             '',
+            '',
+            '/** Invalid instruction decoder function. */',
+            'FNIEMOP_DEF_1(iemDecodeA64_Invalid, uint32_t, uOpcode)',
+            '{',
+            '    LogFlow(("Invalid instruction %%#x at %%x\\n", uOpcode, pVCpu->cpum.GstCtx.Pc.u64));',
+            '    IEMOP_RAISE_INVALID_OPCODE_RET();',
+            '}',
         ]);
-
 
         asLines += self.generateDecoderFunctions();
@@ -1606 +1648 @@
         asLines += self.generateDecoderCode(self.oDecoderRoot, 0);
 
-
+        return (True, asLines);
+
+    def generateDecoderHdr(self, sFilename, iPartNo):
+        """ Generates the decoder header file. """
+        _ = iPartNo;
+
+        asLines = self.generateLicenseHeader();
+        sBlockerName = re.sub('[.-]', '_', os.path.basename(sFilename));
+        asLines += [
+            '#ifndef VMM_INCLUDED_SRC_VMMAll_target_armv8_%s' % (sBlockerName,),
+            '#define VMM_INCLUDED_SRC_VMMAll_target_armv8_%s' % (sBlockerName,),
+            '#ifndef RT_WITHOUT_PRAGMA_ONCE',
+            '# pragma once',
+            '#endif',
+            '',
+            '/** The top-level aarch64 decoder table for the IEM interpreter. */',
+            'extern PFIEMOPU32 const g_apfnIemInterpretOnlyA64[%#x];' % (1 << self.oDecoderRoot.fChildMask.bit_count()),
+            '',
+            '/**',
+            ' * Calculates the index for @a uOpcode in g_apfnIemInterpretOnlyA64.',
+            ' */',
+            'DECL_FORCE_INLINE(uintptr_t) iemInterpretOnlyA64CalcIndex(uint32_t uOpcode)',
+            '{',
+        ];
+        assert self.asRootIndexExpr; # Must be called after generateDecoderCpp()!
+        asLines += self.asRootIndexExpr;
+        asLines += [
+            '    return idx;',
+            '}',
+            '',
+            '#endif /* !VMM_INCLUDED_SRC_VMMAll_target_armv8_%s */' % (sBlockerName,),
+        ];
         return (True, asLines);
 
@@ -1612 +1685 @@
     def main(self, asArgs):
         """ Main function. """
-
-        #for _ in MaskIterator(0xffc0ff00, 4, 12, {}):
-        #    pass;
-        #return 2;
 
         #
@@ -1651 +1720 @@
                                 default = '',
                                 help    = 'Specification directory to prefix the specficiation files with.');
-        oArgParser.add_argument('--out-decoder',
+        oArgParser.add_argument('--out-decoder-cpp',
                                 metavar = 'file-decoder.cpp',
                                 dest    = 'sFileDecoderCpp',
@@ -1657 +1726 @@
                                 default = '-',
                                 help    = 'The output C++ file for the decoder.');
+        oArgParser.add_argument('--out-decoder-hdr',
+                                metavar = 'file-decoder.h',
+                                dest    = 'sFileDecoderH',
+                                action  = 'store',
+                                default = '-',
+                                help    = 'The output header file for the decoder.');
         # debug:
         oArgParser.add_argument('--print-instructions',
@@ -1689 +1764 @@
             #
             aaoOutputFiles = [
-                 ( oOptions.sFileDecoderCpp,      self. generateDecoderCpp, 0, ),
+                 ( oOptions.sFileDecoderCpp,      self.generateDecoderCpp, 0, ),
+                 ( oOptions.sFileDecoderH,        self.generateDecoderHdr, 0, ), # Must be after generateDecoderCpp!
             ];
             fRc = True;
@@ -1702 +1778 @@
                         return 1;
 
-                (fRc2, asLines) = fnGenMethod(iPartNo);
+                (fRc2, asLines) = fnGenMethod(sOutFile, iPartNo);
                 fRc = fRc2 and fRc;
 
@@ -1749 +1825 @@
     print('----', flush = True);
 
+
 if __name__ == '__main__':
-    #for fOrgMask in (0x11c00,):
-    #    print('Test %#x:' % (fOrgMask,));
-    #    for x in MaskIterator(fOrgMask, 16, ~0xfffee000):
-    #        print('MaskIterator: fMask=%#05x cBits=%2s aaiAlgo=%s' % (x[0],x[1],x[2]));
-    #sys.exit(1);
-
     fProfileIt = False;
     oProfiler = cProfile.Profile() if fProfileIt else None;