Changeset 109033 in vbox

Timestamp:

Apr 21, 2025 7:01:04 AM (13 days ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168562

Message:

VMM/GIC: bugref:10877 Some GIC, ITS cleanup.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/GICAll.cpp (modified) (1 diff)
• VMMAll/GITSAll.cpp (modified) (8 diffs)
• VMMR3/GICR3.cpp (modified) (1 diff)
• include/GICInternal.h (modified) (5 diffs)

trunk/src/VBox/VMM/VMMAll/GICAll.cpp

@@ -82 +82 @@
 #define GIC_IS_INTR_EXT_PPI(a_uIntId)       (a_uIntId - GIC_INTID_RANGE_EXT_PPI_START < GIC_INTID_EXT_PPI_RANGE_SIZE)
 #define GIC_IS_INTR_EXT_SPI(a_uIntId)       (a_uIntId - GIC_INTID_RANGE_EXT_SPI_START < GIC_INTID_EXT_SPI_RANGE_SIZE)
-#define GIC_IS_REG_IN_RANGE(a_offReg, a_offFirst, a_cbRegion)    ((uint32_t)(a_offReg) - (a_offFirst) < (a_cbRegion))
 
 

trunk/src/VBox/VMM/VMMAll/GITSAll.cpp

@@ -48 +48 @@
 #define GITS_SAVED_STATE_VERSION                        1
 
-/** Gets whether the given register offset is within the specified range. */
-#define GITS_IS_REG_IN_RANGE(a_offReg, a_offFirst, a_cbRegion)    ((uint32_t)(a_offReg) - (a_offFirst) < (a_cbRegion))
-
 /** GITS diagnostic enum description expansion.
  * The below construct ensures typos in the input to this macro are caught
  * during compile time. */
 #define GITSDIAG_DESC(a_Name)                       RT_CONCAT(kGitsDiag_, a_Name) < kGitsDiag_End ? RT_STR(a_Name) : "Ignored"
-
-/** @def GITS_SET_REG_U64_FULL
- * Sets a 64-bit GITS register.
- * @param   a_uReg      The 64-bit register to set.
- * @param   a_uValue    The 64-bit value being written.
- * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
- */
-#define GITS_SET_REG_U64_FULL(a_uReg, a_uValue, a_fRwMask) \
-    do \
-    { \
-        AssertCompile(sizeof(a_uReg) == sizeof(uint64_t)); \
-        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
-        (a_uReg) = ((a_uReg) & ~(a_fRwMask)) | ((a_uValue) & (a_fRwMask)); \
-    } while (0)
-
-/** @def GITS_SET_REG_U64_LO
- * Sets the lower half of a 64-bit GITS register.
- * @param   a_uReg      The lower half of a 64-bit register to set.
- * @param   a_uValue    The value being written (only lower 32-bits are used).
- * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
- */
-#define GITS_SET_REG_U64_LO(a_uReg, a_uValue, a_fRwMask) \
-    do \
-    { \
-        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
-        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
-        (a_uReg) = ((a_uReg) & ~(RT_LO_U32(a_fRwMask))) | ((uint32_t)(a_uValue) & (RT_LO_U32(a_fRwMask))); \
-    } while (0)
-
-/** @def GITS_SET_REG_U64_HI
- * Sets the upper half of a 64-bit GITS register.
- * @param   a_uReg      The upper half of the 64-bit register to set.
- * @param   a_uValue    The value being written (only lower 32-bits are used).
- * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
- */
-#define GITS_SET_REG_U64_HI(a_uReg, a_uValue, a_fRwMask) \
-    do \
-    { \
-        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
-        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
-        (a_uReg) = ((a_uReg) & ~(RT_HI_U32(a_fRwMask))) | ((uint32_t)(a_uValue) & (RT_HI_U32(a_fRwMask))); \
-    } while (0)
-
-/** @def GITS_SET_REG_U32
- * Sets a 32-bit GITS register.
- * @param   a_uReg      The 32-bit register to set.
- * @param   a_uValue    The 32-bit value being written (only lower 32-bits are
- *                      used).
- * @param   a_fRwMask   The mask of valid read-write bits (only lower 32-bits are
- *                      used).
- */
-#define GITS_SET_REG_U32(a_uReg, a_uValue, a_fRwMask) \
-    do \
-    { \
-        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
-        (a_uReg) = ((a_uReg) & ~(a_fRwMask)) | ((uint32_t)(a_uValue) & (uint32_t)(a_fRwMask)); \
-    } while (0)
 
 
@@ -135 +75 @@
 DECL_HIDDEN_CALLBACK(const char *) gitsGetCtrlRegDescription(uint16_t offReg)
 {
-    if (GITS_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST, GITS_CTRL_REG_BASER_RANGE_SIZE))
+    if (GIC_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST, GITS_CTRL_REG_BASER_RANGE_SIZE))
         return "GITS_BASER<n>";
     switch (offReg)
@@ -304 +244 @@
      */
     uint64_t uReg;
-    if (GITS_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST, GITS_CTRL_REG_BASER_RANGE_SIZE))
+    if (GIC_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST, GITS_CTRL_REG_BASER_RANGE_SIZE))
     {
         uint16_t const cbReg  = sizeof(uint64_t);
@@ -387 +327 @@
      * GITS_BASER<n>.
      */
-    if (GITS_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST, GITS_CTRL_REG_BASER_RANGE_SIZE))
+    if (GIC_IS_REG_IN_RANGE(offReg, GITS_CTRL_REG_BASER_OFF_FIRST, GITS_CTRL_REG_BASER_RANGE_SIZE))
     {
         uint16_t const cbReg   = sizeof(uint64_t);
@@ -395 +335 @@
         {
             if (cb == 8)
-                GITS_SET_REG_U64_FULL(pGitsDev->aItsTableRegs[idxReg].u, uValue, fRwMask);
+                GIC_SET_REG_U64_FULL(pGitsDev->aItsTableRegs[idxReg].u, uValue, fRwMask);
             else
-                GITS_SET_REG_U64_LO(pGitsDev->aItsTableRegs[idxReg].s.Lo, uValue, fRwMask);
+                GIC_SET_REG_U64_LO(pGitsDev->aItsTableRegs[idxReg].s.Lo, uValue, fRwMask);
         }
         else
         {
             Assert(cb == 4);
-            GITS_SET_REG_U64_HI(pGitsDev->aItsTableRegs[idxReg].s.Hi, uValue, fRwMask);
+            GIC_SET_REG_U64_HI(pGitsDev->aItsTableRegs[idxReg].s.Hi, uValue, fRwMask);
         }
         return;
@@ -412 +352 @@
             Assert(cb == 4);
             Assert(!(pGitsDev->uTypeReg.u & GITS_BF_CTRL_REG_TYPER_UMSI_IRQ_MASK));
-            GITS_SET_REG_U32(pGitsDev->uCtrlReg, uValue, GITS_BF_CTRL_REG_CTLR_RW_MASK);
+            GIC_SET_REG_U32(pGitsDev->uCtrlReg, uValue, GITS_BF_CTRL_REG_CTLR_RW_MASK);
             if (RT_BF_GET(uValue, GITS_BF_CTRL_REG_CTLR_ENABLED))
                 pGitsDev->uCtrlReg &= GITS_BF_CTRL_REG_CTLR_QUIESCENT_MASK;
@@ -420 +360 @@
         case GITS_CTRL_REG_CBASER_OFF:
             if (cb == 8)
-                GITS_SET_REG_U64_FULL(pGitsDev->uCmdBaseReg.u, uValue, GITS_CTRL_REG_CBASER_RW_MASK);
+                GIC_SET_REG_U64_FULL(pGitsDev->uCmdBaseReg.u, uValue, GITS_CTRL_REG_CBASER_RW_MASK);
             else
-                GITS_SET_REG_U64_LO(pGitsDev->uCmdBaseReg.s.Lo, uValue, GITS_CTRL_REG_CBASER_RW_MASK);
+                GIC_SET_REG_U64_LO(pGitsDev->uCmdBaseReg.s.Lo, uValue, GITS_CTRL_REG_CBASER_RW_MASK);
             gitsCmdQueueThreadWakeUpIfNeeded(pDevIns, pGitsDev);
             break;
@@ -428 +368 @@
         case GITS_CTRL_REG_CBASER_OFF + 4:
             Assert(cb == 4);
-            GITS_SET_REG_U64_HI(pGitsDev->uCmdBaseReg.s.Hi, uValue, GITS_CTRL_REG_CBASER_RW_MASK);
+            GIC_SET_REG_U64_HI(pGitsDev->uCmdBaseReg.s.Hi, uValue, GITS_CTRL_REG_CBASER_RW_MASK);
             gitsCmdQueueThreadWakeUpIfNeeded(pDevIns, pGitsDev);
             break;
 
         case GITS_CTRL_REG_CWRITER_OFF:
-            GITS_SET_REG_U32(pGitsDev->uCmdWriteReg, uValue, GITS_CTRL_REG_CWRITER_RW_MASK);
+            GIC_SET_REG_U32(pGitsDev->uCmdWriteReg, uValue, GITS_CTRL_REG_CWRITER_RW_MASK);
             gitsCmdQueueThreadWakeUpIfNeeded(pDevIns, pGitsDev);
             break;

trunk/src/VBox/VMM/VMMR3/GICR3.cpp

@@ -341 +341 @@
         uint8_t const cIdBits = RT_BF_GET(uReg, GIC_BF_REDIST_REG_PROPBASER_ID_BITS);
         pHlp->pfnPrintf(pHlp, "  uLpiConfigBaseReg  = %#RX64\n", uReg);
-        pHlp->pfnPrintf(pHlp, "    ID bits            = %#x (%u bits)\n", cIdBits, cIdBits + 1);
+        pHlp->pfnPrintf(pHlp, "    ID bits            = %#x (%u bits)\n", cIdBits, cIdBits > 0 ? cIdBits + 1 : 0);
         pHlp->pfnPrintf(pHlp, "    Inner cache        = %#x\n",    RT_BF_GET(uReg, GIC_BF_REDIST_REG_PROPBASER_INNER_CACHE));
         pHlp->pfnPrintf(pHlp, "    Shareability       = %#x\n",    RT_BF_GET(uReg, GIC_BF_REDIST_REG_PROPBASER_SHAREABILITY));

trunk/src/VBox/VMM/include/GICInternal.h

@@ -74 +74 @@
     do \
     { \
-        int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VINF_SUCCESS); \
-        PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); \
+        int const rcLock_ = PDMDevHlpCritSectEnter((a_pDevIns), (a_pDevIns)->pCritSectRoR3, VINF_SUCCESS); \
+        PDM_CRITSECT_RELEASE_ASSERT_RC_DEV((a_pDevIns), (a_pDevIns)->pCritSectRoR3, rcLock_); \
     } while(0)
 
@@ -83 +83 @@
 /** Returns whether the critical section is held. */
 #define GIC_CRIT_SECT_IS_OWNER(a_pDevIns)       PDMDevHlpCritSectIsOwner((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo))
+
+/** Returns whether the given register offset is within the specified range. */
+#define GIC_IS_REG_IN_RANGE(a_offReg, a_offFirst, a_cbRegion)    ((uint32_t)(a_offReg) - (a_offFirst) < (a_cbRegion))
+
+/** @def GIC_SET_REG_U64_FULL
+ * Sets a 64-bit GIC register.
+ * @param   a_uReg      The 64-bit register to set.
+ * @param   a_uValue    The 64-bit value being written.
+ * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
+ */
+#define GIC_SET_REG_U64_FULL(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint64_t)); \
+        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
+        (a_uReg) = ((a_uReg) & ~(a_fRwMask)) | ((a_uValue) & (a_fRwMask)); \
+    } while (0)
+
+/** @def GIC_SET_REG_U64_LO
+ * Sets the lower half of a 64-bit GIC register.
+ * @param   a_uReg      The lower half of a 64-bit register to set.
+ * @param   a_uValue    The value being written (only lower 32-bits are used).
+ * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
+ */
+#define GIC_SET_REG_U64_LO(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
+        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
+        (a_uReg) = ((a_uReg) & ~(RT_LO_U32(a_fRwMask))) | ((uint32_t)(a_uValue) & (RT_LO_U32(a_fRwMask))); \
+    } while (0)
+
+/** @def GIC_SET_REG_U64_HI
+ * Sets the upper half of a 64-bit GIC register.
+ * @param   a_uReg      The upper half of the 64-bit register to set.
+ * @param   a_uValue    The value being written (only lower 32-bits are used).
+ * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
+ */
+#define GIC_SET_REG_U64_HI(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
+        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
+        (a_uReg) = ((a_uReg) & ~(RT_HI_U32(a_fRwMask))) | ((uint32_t)(a_uValue) & (RT_HI_U32(a_fRwMask))); \
+    } while (0)
+
+/** @def GIC_SET_REG_U32
+ * Sets a 32-bit GIC register.
+ * @param   a_uReg      The 32-bit register to set.
+ * @param   a_uValue    The 32-bit value being written (only lower 32-bits are
+ *                      used).
+ * @param   a_fRwMask   The mask of valid read-write bits (only lower 32-bits are
+ *                      used).
+ */
+#define GIC_SET_REG_U32(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
+        (a_uReg) = ((a_uReg) & ~(a_fRwMask)) | ((uint32_t)(a_uValue) & (uint32_t)(a_fRwMask)); \
+    } while (0)
+
 
 /**
@@ -114 +175 @@
     /** Flag whether affinity routing is enabled. */
     bool                        fAffRoutingEnabled;
-    /** Alignment. */
-    bool                        fPadding0;
     /** @} */
 
@@ -147 +206 @@
     /** The maximum LPI supported (GICD_TYPER.num_LPI). */
     uint8_t                     uMaxLpi;
+    /** @} */
+
+    /** @name GITS device data and LPIs.
+     * @{ */
+    /** Whether LPIs are enabled (GICR_CTLR.EnableLpis of all redistributors). */
+    bool                        fEnableLpis;
     /** Padding. */
-    bool                        afPadding0[3];
-    /** @} */
-
-    /** @name GITS device data and LPIs.
-     * @{ */
+    bool                        afPadding1[3];
     /** ITS device state. */
     GITSDEV                     Gits;
@@ -161 +222 @@
     /** The LPI pending table base register (GICR_PENDBASER). */
     RTUINT64U                   uLpiPendingBaseReg;
-    /** Whether LPIs are enabled (GICR_CTLR.EnableLpis of all redistributors). */
-    bool                        fEnableLpis;
-    /** Padding. */
-    bool                        afPadding1[7];
     /** @} */