Changeset 109033 in vbox for trunk/src/VBox/VMM/include/GICInternal.h

Timestamp:

Apr 21, 2025 7:01:04 AM (2 weeks ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

168562

Message:

VMM/GIC: bugref:10877 Some GIC, ITS cleanup.

File:

• trunk/src/VBox/VMM/include/GICInternal.h (modified) (5 diffs)

trunk/src/VBox/VMM/include/GICInternal.h

@@ -74 +74 @@
     do \
     { \
-        int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VINF_SUCCESS); \
-        PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock); \
+        int const rcLock_ = PDMDevHlpCritSectEnter((a_pDevIns), (a_pDevIns)->pCritSectRoR3, VINF_SUCCESS); \
+        PDM_CRITSECT_RELEASE_ASSERT_RC_DEV((a_pDevIns), (a_pDevIns)->pCritSectRoR3, rcLock_); \
     } while(0)
 
@@ -83 +83 @@
 /** Returns whether the critical section is held. */
 #define GIC_CRIT_SECT_IS_OWNER(a_pDevIns)       PDMDevHlpCritSectIsOwner((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo))
+
+/** Returns whether the given register offset is within the specified range. */
+#define GIC_IS_REG_IN_RANGE(a_offReg, a_offFirst, a_cbRegion)    ((uint32_t)(a_offReg) - (a_offFirst) < (a_cbRegion))
+
+/** @def GIC_SET_REG_U64_FULL
+ * Sets a 64-bit GIC register.
+ * @param   a_uReg      The 64-bit register to set.
+ * @param   a_uValue    The 64-bit value being written.
+ * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
+ */
+#define GIC_SET_REG_U64_FULL(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint64_t)); \
+        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
+        (a_uReg) = ((a_uReg) & ~(a_fRwMask)) | ((a_uValue) & (a_fRwMask)); \
+    } while (0)
+
+/** @def GIC_SET_REG_U64_LO
+ * Sets the lower half of a 64-bit GIC register.
+ * @param   a_uReg      The lower half of a 64-bit register to set.
+ * @param   a_uValue    The value being written (only lower 32-bits are used).
+ * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
+ */
+#define GIC_SET_REG_U64_LO(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
+        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
+        (a_uReg) = ((a_uReg) & ~(RT_LO_U32(a_fRwMask))) | ((uint32_t)(a_uValue) & (RT_LO_U32(a_fRwMask))); \
+    } while (0)
+
+/** @def GIC_SET_REG_U64_HI
+ * Sets the upper half of a 64-bit GIC register.
+ * @param   a_uReg      The upper half of the 64-bit register to set.
+ * @param   a_uValue    The value being written (only lower 32-bits are used).
+ * @param   a_fRwMask   The 64-bit mask of valid read-write bits.
+ */
+#define GIC_SET_REG_U64_HI(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
+        AssertCompile(sizeof(a_fRwMask) == sizeof(uint64_t)); \
+        (a_uReg) = ((a_uReg) & ~(RT_HI_U32(a_fRwMask))) | ((uint32_t)(a_uValue) & (RT_HI_U32(a_fRwMask))); \
+    } while (0)
+
+/** @def GIC_SET_REG_U32
+ * Sets a 32-bit GIC register.
+ * @param   a_uReg      The 32-bit register to set.
+ * @param   a_uValue    The 32-bit value being written (only lower 32-bits are
+ *                      used).
+ * @param   a_fRwMask   The mask of valid read-write bits (only lower 32-bits are
+ *                      used).
+ */
+#define GIC_SET_REG_U32(a_uReg, a_uValue, a_fRwMask) \
+    do \
+    { \
+        AssertCompile(sizeof(a_uReg) == sizeof(uint32_t)); \
+        (a_uReg) = ((a_uReg) & ~(a_fRwMask)) | ((uint32_t)(a_uValue) & (uint32_t)(a_fRwMask)); \
+    } while (0)
+
 
 /**
@@ -114 +175 @@
     /** Flag whether affinity routing is enabled. */
     bool                        fAffRoutingEnabled;
-    /** Alignment. */
-    bool                        fPadding0;
     /** @} */
 
@@ -147 +206 @@
     /** The maximum LPI supported (GICD_TYPER.num_LPI). */
     uint8_t                     uMaxLpi;
+    /** @} */
+
+    /** @name GITS device data and LPIs.
+     * @{ */
+    /** Whether LPIs are enabled (GICR_CTLR.EnableLpis of all redistributors). */
+    bool                        fEnableLpis;
     /** Padding. */
-    bool                        afPadding0[3];
-    /** @} */
-
-    /** @name GITS device data and LPIs.
-     * @{ */
+    bool                        afPadding1[3];
     /** ITS device state. */
     GITSDEV                     Gits;
@@ -161 +222 @@
     /** The LPI pending table base register (GICR_PENDBASER). */
     RTUINT64U                   uLpiPendingBaseReg;
-    /** Whether LPIs are enabled (GICR_CTLR.EnableLpis of all redistributors). */
-    bool                        fEnableLpis;
-    /** Padding. */
-    bool                        afPadding1[7];
     /** @} */