Changeset 12681 in vbox

Timestamp:

Sep 24, 2008 11:51:10 AM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

36983

Message:

Updates for real and protected mode without paging shadow mode.

Location:

trunk/src/VBox/VMM

Files:

• PGM.cpp (modified) (5 diffs)
• PGMInternal.h (modified) (2 diffs)
• VMMR0/HWSVMR0.cpp (modified) (2 diffs)
• VMMR0/HWVMXR0.cpp (modified) (5 diffs)

trunk/src/VBox/VMM/PGM.cpp

@@ -1379 +1379 @@
      * As with the intermediate context, AMD64 uses the PAE PDPT and PDs.
      */
-    pVM->pgm.s.pHC32BitPD    = (PX86PD)MMR3PageAllocLow(pVM);
-    pVM->pgm.s.apHCPaePDs[0] = (PX86PDPAE)MMR3PageAlloc(pVM);
-    pVM->pgm.s.apHCPaePDs[1] = (PX86PDPAE)MMR3PageAlloc(pVM);
+    pVM->pgm.s.pHC32BitPD           = (PX86PD)MMR3PageAllocLow(pVM);
+    pVM->pgm.s.apHCPaePDs[0]        = (PX86PDPAE)MMR3PageAlloc(pVM);
+    pVM->pgm.s.apHCPaePDs[1]        = (PX86PDPAE)MMR3PageAlloc(pVM);
     AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[0] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[1]);
-    pVM->pgm.s.apHCPaePDs[2] = (PX86PDPAE)MMR3PageAlloc(pVM);
+    pVM->pgm.s.apHCPaePDs[2]        = (PX86PDPAE)MMR3PageAlloc(pVM);
     AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[1] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[2]);
-    pVM->pgm.s.apHCPaePDs[3] = (PX86PDPAE)MMR3PageAlloc(pVM);
+    pVM->pgm.s.apHCPaePDs[3]        = (PX86PDPAE)MMR3PageAlloc(pVM);
     AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[2] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[3]);
-    pVM->pgm.s.pHCPaePDPT    = (PX86PDPT)MMR3PageAllocLow(pVM);
-    pVM->pgm.s.pHCNestedRoot = MMR3PageAllocLow(pVM);
+    pVM->pgm.s.pHCPaePDPT           = (PX86PDPT)MMR3PageAllocLow(pVM);
+    pVM->pgm.s.pHCNestedRoot        = MMR3PageAllocLow(pVM);
+    pVM->pgm.s.pHCNoPaging32BitPD   = (PX86PD)MMR3PageAllocLow(pVM);
 
     if (    !pVM->pgm.s.pHC32BitPD
@@ -1396 +1397 @@
         ||  !pVM->pgm.s.apHCPaePDs[3]
         ||  !pVM->pgm.s.pHCPaePDPT
-        ||  !pVM->pgm.s.pHCNestedRoot)
+        ||  !pVM->pgm.s.pHCNestedRoot
+        ||  !pVM->pgm.s.pHCNoPaging32BitPD)
     {
         AssertMsgFailed(("Failed to allocate pages for the intermediate context!\n"));
@@ -1403 +1405 @@
 
     /* get physical addresses. */
-    pVM->pgm.s.HCPhys32BitPD    = MMPage2Phys(pVM, pVM->pgm.s.pHC32BitPD);
+    pVM->pgm.s.HCPhys32BitPD      = MMPage2Phys(pVM, pVM->pgm.s.pHC32BitPD);
     Assert(MMPagePhys2Page(pVM, pVM->pgm.s.HCPhys32BitPD) == pVM->pgm.s.pHC32BitPD);
-    pVM->pgm.s.aHCPhysPaePDs[0] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[0]);
-    pVM->pgm.s.aHCPhysPaePDs[1] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[1]);
-    pVM->pgm.s.aHCPhysPaePDs[2] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[2]);
-    pVM->pgm.s.aHCPhysPaePDs[3] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[3]);
-    pVM->pgm.s.HCPhysPaePDPT    = MMPage2Phys(pVM, pVM->pgm.s.pHCPaePDPT);
-    pVM->pgm.s.HCPhysNestedRoot = MMPage2Phys(pVM, pVM->pgm.s.pHCNestedRoot);
+    pVM->pgm.s.aHCPhysPaePDs[0]         = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[0]);
+    pVM->pgm.s.aHCPhysPaePDs[1]         = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[1]);
+    pVM->pgm.s.aHCPhysPaePDs[2]         = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[2]);
+    pVM->pgm.s.aHCPhysPaePDs[3]         = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[3]);
+    pVM->pgm.s.HCPhysPaePDPT            = MMPage2Phys(pVM, pVM->pgm.s.pHCPaePDPT);
+    pVM->pgm.s.HCPhysNestedRoot         = MMPage2Phys(pVM, pVM->pgm.s.pHCNestedRoot);
+    pVM->pgm.s.HCPhysNoPaging32BitPD    = MMPage2Phys(pVM, pVM->pgm.s.pHCNoPaging32BitPD);
 
     /*
@@ -1418 +1421 @@
     ASMMemZero32(pVM->pgm.s.pHCPaePDPT, PAGE_SIZE);
     ASMMemZero32(pVM->pgm.s.pHCNestedRoot, PAGE_SIZE);
+    ASMMemZero32(pVM->pgm.s.pHCNoPaging32BitPD, PAGE_SIZE);
     for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apHCPaePDs); i++)
     {
@@ -2986 +2990 @@
                 break; /* (no change) */
 
-            switch (enmHostMode)
-            {
-                case SUPPAGINGMODE_32_BIT:
-                case SUPPAGINGMODE_32_BIT_GLOBAL:
-                    enmShadowMode = PGMMODE_32_BIT;
-                    enmSwitcher = VMMSWITCHER_32_TO_32;
-                    break;
-
-                case SUPPAGINGMODE_PAE:
-                case SUPPAGINGMODE_PAE_NX:
-                case SUPPAGINGMODE_PAE_GLOBAL:
-                case SUPPAGINGMODE_PAE_GLOBAL_NX:
-                    enmShadowMode = PGMMODE_PAE;
-                    enmSwitcher = VMMSWITCHER_PAE_TO_PAE;
-#ifdef DEBUG_bird
-if (getenv("VBOX_32BIT"))
-{
-                    enmShadowMode = PGMMODE_32_BIT;
-                    enmSwitcher = VMMSWITCHER_PAE_TO_32;
-}
-#endif
-                    break;
-
-                case SUPPAGINGMODE_AMD64:
-                case SUPPAGINGMODE_AMD64_GLOBAL:
-                case SUPPAGINGMODE_AMD64_NX:
-                case SUPPAGINGMODE_AMD64_GLOBAL_NX:
-                    enmShadowMode = PGMMODE_PAE;
-                    enmSwitcher = VMMSWITCHER_AMD64_TO_PAE;
-                    break;
-
-                default: AssertMsgFailed(("enmHostMode=%d\n", enmHostMode)); break;
-            }
+            /* Always use the 32 bits shadow mode for this case. We never execute real or protected mode without paging code
+             * in raw mode.
+             */
+            enmShadowMode = PGMMODE_32_BIT;
+            enmSwitcher = VMMSWITCHER_INVALID;
             break;
 

trunk/src/VBox/VMM/PGMInternal.h

@@ -1273 +1273 @@
  * @{ */
 /** NIL page pool IDX. */
-#define NIL_PGMPOOL_IDX         0
+#define NIL_PGMPOOL_IDX             0
 /** The first normal index. */
-#define PGMPOOL_IDX_FIRST_SPECIAL 1
+#define PGMPOOL_IDX_FIRST_SPECIAL   1
 /** Page directory (32-bit root). */
-#define PGMPOOL_IDX_PD          1
+#define PGMPOOL_IDX_PD              1
 /** The extended PAE page directory (2048 entries, works as root currently). */
-#define PGMPOOL_IDX_PAE_PD      2
+#define PGMPOOL_IDX_PAE_PD          2
 /** PAE Page Directory Table 0. */
-#define PGMPOOL_IDX_PAE_PD_0    3
+#define PGMPOOL_IDX_PAE_PD_0        3
 /** PAE Page Directory Table 1. */
-#define PGMPOOL_IDX_PAE_PD_1    4
+#define PGMPOOL_IDX_PAE_PD_1        4
 /** PAE Page Directory Table 2. */
-#define PGMPOOL_IDX_PAE_PD_2    5
+#define PGMPOOL_IDX_PAE_PD_2        5
 /** PAE Page Directory Table 3. */
-#define PGMPOOL_IDX_PAE_PD_3    6
+#define PGMPOOL_IDX_PAE_PD_3        6
 /** Page Directory Pointer Table (PAE root, not currently used). */
-#define PGMPOOL_IDX_PDPT        7
+#define PGMPOOL_IDX_PDPT            7
 /** AMD64 CR3 level index.*/
-#define PGMPOOL_IDX_AMD64_CR3   8
+#define PGMPOOL_IDX_AMD64_CR3       8
 /** Nested paging root.*/
-#define PGMPOOL_IDX_NESTED_ROOT 9
+#define PGMPOOL_IDX_NESTED_ROOT     9
 /** The first normal index. */
-#define PGMPOOL_IDX_FIRST       10
+#define PGMPOOL_IDX_FIRST           10
 /** The last valid index. (inclusive, 14 bits) */
-#define PGMPOOL_IDX_LAST        0x3fff
+#define PGMPOOL_IDX_LAST            0x3fff
 /** @} */
 
@@ -1998 +1998 @@
     /** @} */
 
+    /** @name 32-bit Shadow Paging with guest real or protected mode without paging.
+     * @{ */
+    /** The 32-Bit PD - HC Ptr. */
+    R3R0PTRTYPE(PX86PD)         pHCNoPaging32BitPD;
+    /** The Physical Address (HC) of the 32-Bit PD. */
+    RTHCPHYS                    HCPhysNoPaging32BitPD;
+    /** @} */
+    
     /** @name PAE Shadow Paging
      * @{ */

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -655 +655 @@
             switch(pVM->hwaccm.s.enmShadowMode)
             {
-            case PGMMODE_REAL:
-            case PGMMODE_PROTECTED:     /* Protected mode, no paging. */
-                AssertFailed();
-                return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE;
-
             case PGMMODE_32_BIT:        /* 32-bit paging. */
                 break;
@@ -678 +673 @@
 #endif
 
+            case PGMMODE_REAL:          /* Real mode                 -> emulated using v86 mode */
+            case PGMMODE_PROTECTED:     /* Protected mode, no paging -> emulated using identity mapping. */
             default:                    /* shut up gcc */
                 AssertFailed();

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -803 +803 @@
         if (!(pCtx->cr0 & X86_CR0_PROTECTION_ENABLE))
         {
+            Assert(pCtx->tr == 0);
             rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_LIMIT,         sizeof(*pVM->hwaccm.s.vmx.pRealModeTSS));
             rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_BASE,          0);
+
+            val = X86_DESC_P | X86_SEL_TYPE_SYS_386_TSS_BUSY;
         }
         else
@@ -810 +813 @@
             rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_LIMIT,         pCtx->trHid.u32Limit);
             rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_BASE,          pCtx->trHid.u64Base);
-        }
-        val = pCtx->trHid.Attr.u;
-
-        /* The TSS selector must be busy. */
-        if ((val & 0xF) == X86_SEL_TYPE_SYS_286_TSS_AVAIL)
-            val = (val & ~0xF) | X86_SEL_TYPE_SYS_286_TSS_BUSY;
-        else
-            /* Default even if no TR selector has been set (otherwise vmlaunch will fail!) */
-            val = (val & ~0xF) | X86_SEL_TYPE_SYS_386_TSS_BUSY;
+
+            val = pCtx->trHid.Attr.u;
+
+            /* The TSS selector must be busy. */
+            if ((val & 0xF) == X86_SEL_TYPE_SYS_286_TSS_AVAIL)
+                val = (val & ~0xF) | X86_SEL_TYPE_SYS_286_TSS_BUSY;
+            else
+                /* Default even if no TR selector has been set (otherwise vmlaunch will fail!) */
+                val = (val & ~0xF) | X86_SEL_TYPE_SYS_386_TSS_BUSY;
+        }
 
         rc |= VMXWriteVMCS(VMX_VMCS_GUEST_TR_ACCESS_RIGHTS, val);
@@ -913 +917 @@
         switch(pVM->hwaccm.s.enmShadowMode)
         {
-        case PGMMODE_REAL:          /* Real mode                 -> emulated using v86 mode */
-        case PGMMODE_PROTECTED:     /* Protected mode, no paging -> emulated using identity mapping. */
         case PGMMODE_32_BIT:        /* 32-bit paging. */
             break;
@@ -932 +934 @@
             return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE;
 #endif
-        default:                   /* shut up gcc */
+        case PGMMODE_REAL:          /* Real mode                 -> emulated using v86 mode */
+        case PGMMODE_PROTECTED:     /* Protected mode, no paging -> emulated using identity mapping. */
+        default:                    /* shut up gcc */
             AssertFailed();
             return VERR_PGM_UNSUPPORTED_SHADOW_PAGING_MODE;
         }
-        /* Real mode emulation using v86 mode with CR4.VME (interrupt redirection using the int bitmap in the TSS) */
+        /* Real mode emulation using v86 mode with CR4.VME (interrupt redirection using the int bitmap in the TSS and VIF support) */
         if (!(pCtx->cr0 & X86_CR0_PROTECTION_ENABLE))
             val |= X86_CR4_VME;
@@ -942 +946 @@
         rc |= VMXWriteVMCS(VMX_VMCS_GUEST_CR4,              val);
         Log2(("Guest CR4 %08x\n", val));
-        /* CR4 flags owned by the host; if the guests attempts to change them, then
+        /* All CR4 flags owned by the host; if the guests attempts to change them, then
          * the VM will exit.
          */
-        val =   X86_CR4_PAE
-              | X86_CR4_PGE
-              | X86_CR4_PSE
-              | X86_CR4_VMXE;
-        pVM->hwaccm.s.vmx.cr4_mask = val;
-
-        rc |= VMXWriteVMCS(VMX_VMCS_CTRL_CR4_MASK, val);
+        pVM->hwaccm.s.vmx.cr4_mask = ~0;
+
+        rc |= VMXWriteVMCS(VMX_VMCS_CTRL_CR4_MASK, pVM->hwaccm.s.vmx.cr4_mask);
         Log2(("Guest CR4-mask %08x\n", val));
         AssertRC(rc);