VirtualBox

Ignore:
Timestamp:
Oct 9, 2008 10:44:11 PM (16 years ago)
Author:
vboxsync
Message:

#1865: Implmented the alternative R0 code for darwin (turned out to be all generic new-phys code). Started renaming the read/write functions: PGMPhysReadGCPtr -> PGMPhysSimpleReadGCPtr, PGMPhysWriteGCPtr -> PGMPhysSimpleWriteGCPtr, PGMPhysWriteGCPtrDirty -> PGMPhysSimpleDirtyWriteGCPtr.

File:
1 edited

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Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r13020 r13144  
    116116    PVM           pVM      = (PVM)pCpu->apvUserData[0];
    117117# ifdef IN_RING0
    118     int rc = PGMPhysReadGCPtr(pVM, pDest, pSrc, cb);
    119     AssertMsgRC(rc, ("PGMPhysReadGCPtr failed for pSrc=%VGv cb=%x\n", pSrc, cb));
     118    int rc = PGMPhysSimpleReadGCPtr(pVM, pDest, pSrc, cb);
     119    AssertMsgRC(rc, ("PGMPhysSimpleReadGCPtr failed for pSrc=%VGv cb=%x\n", pSrc, cb));
    120120# else /* IN_RING3 */
    121121    if (!PATMIsPatchGCAddr(pVM, pSrc))
    122122    {
    123         int rc = PGMPhysReadGCPtr(pVM, pDest, pSrc, cb);
     123        int rc = PGMPhysSimpleReadGCPtr(pVM, pDest, pSrc, cb);
    124124        AssertRC(rc);
    125125    }
     
    25772577#endif
    25782578    default:
    2579         /* In X2APIC specification this range is reserved for APIC control. */ 
     2579        /* In X2APIC specification this range is reserved for APIC control. */
    25802580        if ((pRegFrame->ecx >= MSR_IA32_APIC_START) && (pRegFrame->ecx < MSR_IA32_APIC_END))
    25812581            rc = PDMApicReadMSR(pVM, VMMGetCpuId(pVM), pRegFrame->ecx, &val);
    2582         else 
     2582        else
    25832583            /* We should actually trigger a #GP here, but don't as that might cause more trouble. */
    25842584            val = 0;
     
    25862586    }
    25872587    Log(("EMInterpretRdmsr %s (%x) -> val=%VX64\n", emMSRtoString(pRegFrame->ecx), pRegFrame->ecx, val));
    2588     if (rc == VINF_SUCCESS) 
     2588    if (rc == VINF_SUCCESS)
    25892589    {
    25902590        pRegFrame->eax = (uint32_t) val;
     
    27222722
    27232723    default:
    2724         /* In X2APIC specification this range is reserved for APIC control. */ 
     2724        /* In X2APIC specification this range is reserved for APIC control. */
    27252725        if ((pRegFrame->ecx >=  MSR_IA32_APIC_START) && (pRegFrame->ecx <  MSR_IA32_APIC_END))
    27262726            return PDMApicWriteMSR(pVM, VMMGetCpuId(pVM), pRegFrame->ecx, val);
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