Changeset 13832 in vbox for trunk/src/VBox/Devices/PC/DevAPIC.cpp

Timestamp:

Nov 5, 2008 2:01:12 AM (16 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

38823

Message:

IN_GC -> IN_RC.

File:

• trunk/src/VBox/Devices/PC/DevAPIC.cpp (modified) (10 diffs)

trunk/src/VBox/Devices/PC/DevAPIC.cpp

@@ -185 +185 @@
 
 typedef uint32_t PhysApicId;
-typedef uint32_t LogApicId; 
+typedef uint32_t LogApicId;
 #endif
 
@@ -194 +194 @@
     uint32_t apicbase;
 #ifdef VBOX
-    /* Task priority register (interrupt level) */ 
+    /* Task priority register (interrupt level) */
     uint32_t   tpr;
     /* Logical APIC id */
@@ -324 +324 @@
                          uint8_t delivery_mode, uint8_t vector_num,
                          uint8_t polarity, uint8_t trigger_mode);
-static void apic_timer_update(APICDeviceInfo* dev, APICState *s, 
+static void apic_timer_update(APICDeviceInfo* dev, APICState *s,
                               int64_t current_time);
 static int apic_get_arb_pri(APICState *s);
@@ -538 +538 @@
     /* We cannot change if this CPU is BSP or not by writing to MSR - it's hardwired */
     PDMAPICVERSION oldMode = getApicMode(s);
-    s->apicbase = 
+    s->apicbase =
             (val & 0xfffff000) | /* base */
-            (val & getApicEnableBits(dev)) | /* mode */ 
+            (val & getApicEnableBits(dev)) | /* mode */
             (s->apicbase & MSR_IA32_APICBASE_BSP) /* keep BSP bit */;
     PDMAPICVERSION newMode = getApicMode(s);
-    
+
     if (oldMode != newMode)
     {
@@ -660 +660 @@
 {
     APICDeviceInfo *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
-    
+
     if (dev->enmVersion < PDMAPICVERSION_X2APIC)
         return VERR_EM_INTERPRETER;
@@ -669 +669 @@
     APICState* apic = getLapicById(dev, idCpu);
 
-    switch (index) 
+    switch (index)
     {
         case 0x02:
@@ -740 +740 @@
             apic_bus_deliver(dev,
                              1 << getLapicById(dev, idCpu)->id /* Self */,
-                             0 /* Delivery mode - fixed */, 
+                             0 /* Delivery mode - fixed */,
                              vector,
                              0 /* Polarity - conform to the bus */,
@@ -766 +766 @@
     uint64_t val = 0;
 
-    switch (index) 
+    switch (index)
     {
         case 0x02: /* id */
@@ -1590 +1590 @@
     if ((version_id < 1) || (version_id > 2))
         return -EINVAL;
-    
+
      /* XXX: what if the base changes? (registered memory regions) */
     qemu_get_be32s(f, &s->apicbase);
@@ -2018 +2018 @@
                 &&  ++s->ulTPRPatchAttempts < APIC_MAX_PATCH_ATTEMPTS)
             {
-#ifdef IN_GC
+#ifdef IN_RC
                 pDevIns->pDevHlpGC->pfnPATMSetMMIOPatchInfo(pDevIns, GCPhysAddr, &s->tpr);
 #else