VirtualBox

Ignore:
Timestamp:
Nov 7, 2008 1:04:45 PM (16 years ago)
Author:
vboxsync
Message:

Moved guest and host CPU contexts into per-VCPU array.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp

    r12989 r13960  
    8282             * Read the MSR and see if it's in use or not.
    8383             */
    84             uint32_t    u32 = ASMRdMsr_Low(MSR_IA32_SYSENTER_CS);
     84            uint32_t u32 = ASMRdMsr_Low(MSR_IA32_SYSENTER_CS);
    8585            if (u32)
    8686            {
    87                 pVM->cpum.s.fUseFlags |= CPUM_USE_SYSENTER;
     87                for (unsigned i=0;i<pVM->cCPUs;i++)
     88                    pVM->aCpus[i].cpum.s.fUseFlags |= CPUM_USE_SYSENTER;
     89
    8890                Log(("CPUMR0Init: host uses sysenter cs=%08x%08x\n", ASMRdMsr_High(MSR_IA32_SYSENTER_CS), u32));
    8991            }
    … …  
    101103    if (u32DR7 & X86_DR7_ENABLED_MASK)
    102104    {
    103         pVM->cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HOST;
     105        for (unsigned i=0;i<pVM->cCPUs;i++)
     106            pVM->aCpus[i].cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS_HOST;
    104107        Log(("CPUMR0Init: host uses debug registers (dr7=%x)\n", u32DR7));
    105108    }
    … …  
    114117 * @returns VBox status code.
    115118 * @param   pVM         VM handle.
     119 * @param   pVCpu       VMCPU handle.
    116120 * @param   pCtx        CPU context
    117121 */
    118 VMMR0DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PCPUMCTX pCtx)
     122VMMR0DECL(int) CPUMR0LoadGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
    119123{
    120124    Assert(pVM->cpum.s.CPUFeatures.edx.u1FXSR);
    … …  
    122126
    123127    /* If the FPU state has already been loaded, then it's a guest trap. */
    124     if (pVM->cpum.s.fUseFlags & CPUM_USED_FPU)
     128    if (pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU)
    125129    {
    126130        Assert(    ((pCtx->cr0 & (X86_CR0_MP | X86_CR0_EM | X86_CR0_TS)) == (X86_CR0_MP | X86_CR0_EM | X86_CR0_TS))
    … …  
    177181        {
    178182            ASMWrMsr(MSR_K6_EFER, oldMsrEFERHost & ~MSR_K6_EFER_FFXSR);
    179             pVM->cpum.s.fUseFlags |= CPUM_MANUAL_XMM_RESTORE;
     183            pVCpu->cpum.s.fUseFlags |= CPUM_MANUAL_XMM_RESTORE;
    180184        }
    181185    }
    182186
    183187    /* If we sync the FPU/XMM state on-demand, then we can continue execution as if nothing has happened. */
    184     int rc = CPUMHandleLazyFPU(pVM);
     188    int rc = CPUMHandleLazyFPU(pVM, pVCpu);
    185189    AssertRC(rc);
    186     Assert(CPUMIsGuestFPUStateActive(pVM));
     190    Assert(CPUMIsGuestFPUStateActive(pVCpu));
    187191
    188192    /* Restore EFER MSR */
    189     if (pVM->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
     193    if (pVCpu->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
    190194        ASMWrMsr(MSR_K6_EFER, oldMsrEFERHost);
    191195
    … …  
    199203     * We don't want the guest to be able to trigger floating point/SSE exceptions on the host.
    200204     */
    201     pVM->cpum.s.Host.fpu.FCW = CPUMGetFCW();
     205    pVCpu->cpum.s.Host.fpu.FCW = CPUMGetFCW();
    202206    if (pVM->cpum.s.CPUFeatures.edx.u1SSE)
    203         pVM->cpum.s.Host.fpu.MXCSR = CPUMGetMXCSR();
     207        pVCpu->cpum.s.Host.fpu.MXCSR = CPUMGetMXCSR();
    204208
    205209    CPUMLoadFPUAsm(pCtx);
    … …  
    219223            /* fxrstor doesn't restore the XMM state! */
    220224            CPUMLoadXMMAsm(pCtx);
    221             pVM->cpum.s.fUseFlags |= CPUM_MANUAL_XMM_RESTORE;
     225            pVCpu->cpum.s.fUseFlags |= CPUM_MANUAL_XMM_RESTORE;
    222226        }
    223227    }
    224228#endif /* CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE */
    225229
    226     pVM->cpum.s.fUseFlags |= CPUM_USED_FPU;
     230    pVCpu->cpum.s.fUseFlags |= CPUM_USED_FPU;
    227231    return VINF_SUCCESS;
    228232}
    … …  
    234238 * @returns VBox status code.
    235239 * @param   pVM         VM handle.
     240 * @param   pVCpu       VMCPU handle.
    236241 * @param   pCtx        CPU context
    237242 */
    238 VMMR0DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PCPUMCTX pCtx)
     243VMMR0DECL(int) CPUMR0SaveGuestFPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
    239244{
    240245    Assert(pVM->cpum.s.CPUFeatures.edx.u1FXSR);
    241246    Assert(ASMGetCR4() & X86_CR4_OSFSXR);
    242     AssertReturn((pVM->cpum.s.fUseFlags & CPUM_USED_FPU), VINF_SUCCESS);
     247    AssertReturn((pVCpu->cpum.s.fUseFlags & CPUM_USED_FPU), VINF_SUCCESS);
    243248
    244249#ifndef CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE
    … …  
    246251
    247252    /* Clear MSR_K6_EFER_FFXSR or else we'll be unable to save/restore the XMM state with fxsave/fxrstor. */
    248     if (pVM->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
     253    if (pVCpu->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
    249254    {
    250255        oldMsrEFERHost = ASMRdMsr(MSR_K6_EFER);
    251256        ASMWrMsr(MSR_K6_EFER, oldMsrEFERHost & ~MSR_K6_EFER_FFXSR);
    252257    }
    253     CPUMRestoreHostFPUState(pVM);
     258    CPUMRestoreHostFPUState(pVM, pVCpu);
    254259
    255260    /* Restore EFER MSR */
    256     if (pVM->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
     261    if (pVCpu->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
    257262        ASMWrMsr(MSR_K6_EFER, oldMsrEFERHost | MSR_K6_EFER_FFXSR);
    258263
    259264#else  /* CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE */
    260265    CPUMSaveFPUAsm(pCtx);
    261     if (pVM->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
     266    if (pVCpu->cpum.s.fUseFlags & CPUM_MANUAL_XMM_RESTORE)
    262267    {
    263268        /* fxsave doesn't save the XMM state! */
    … …  
    269274     * We don't want the guest to be able to trigger floating point/SSE exceptions on the host.
    270275     */
    271     CPUMSetFCW(pVM->cpum.s.Host.fpu.FCW);
     276    CPUMSetFCW(pVCpu->cpum.s.Host.fpu.FCW);
    272277    if (pVM->cpum.s.CPUFeatures.edx.u1SSE)
    273         CPUMSetMXCSR(pVM->cpum.s.Host.fpu.MXCSR);
     278        CPUMSetMXCSR(pVCpu->cpum.s.Host.fpu.MXCSR);
    274279#endif /* CPUM_CAN_HANDLE_NM_TRAPS_IN_KERNEL_MODE */
    275280
    276     pVM->cpum.s.fUseFlags &= ~(CPUM_USED_FPU | CPUM_MANUAL_XMM_RESTORE);
     281    pVCpu->cpum.s.fUseFlags &= ~(CPUM_USED_FPU | CPUM_MANUAL_XMM_RESTORE);
    277282    return VINF_SUCCESS;
    278283}
    … …  
    284289 * @returns VBox status code.
    285290 * @param   pVM         VM handle.
     291 * @param   pVCpu       VMCPU handle.
    286292 * @param   pCtx        CPU context
    287293 * @param   fDR6        Include DR6 or not
    288294 */
    289 VMMR0DECL(int) CPUMR0SaveGuestDebugState(PVM pVM, PCPUMCTX pCtx, bool fDR6)
    290 {
    291     Assert(pVM->cpum.s.fUseFlags & CPUM_USE_DEBUG_REGS);
     295VMMR0DECL(int) CPUMR0SaveGuestDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, bool fDR6)
     296{
     297    Assert(pVCpu->cpum.s.fUseFlags & CPUM_USE_DEBUG_REGS);
    292298
    293299    /* Save the guest's debug state. The caller is responsible for DR7. */
    … …  
    303309     * DR7 contains 0x400 right now.
    304310     */
    305     ASMSetDR0(pVM->cpum.s.Host.dr0);
    306     ASMSetDR1(pVM->cpum.s.Host.dr1);
    307     ASMSetDR2(pVM->cpum.s.Host.dr2);
    308     ASMSetDR3(pVM->cpum.s.Host.dr3);
    309     ASMSetDR6(pVM->cpum.s.Host.dr6);
    310     ASMSetDR7(pVM->cpum.s.Host.dr7);
    311 
    312     pVM->cpum.s.fUseFlags &= ~CPUM_USE_DEBUG_REGS;
     311    ASMSetDR0(pVCpu->cpum.s.Host.dr0);
     312    ASMSetDR1(pVCpu->cpum.s.Host.dr1);
     313    ASMSetDR2(pVCpu->cpum.s.Host.dr2);
     314    ASMSetDR3(pVCpu->cpum.s.Host.dr3);
     315    ASMSetDR6(pVCpu->cpum.s.Host.dr6);
     316    ASMSetDR7(pVCpu->cpum.s.Host.dr7);
     317
     318    pVCpu->cpum.s.fUseFlags &= ~CPUM_USE_DEBUG_REGS;
    313319    return VINF_SUCCESS;
    314320}
    … …  
    320326 * @returns VBox status code.
    321327 * @param   pVM         VM handle.
     328 * @param   pVCpu       VMCPU handle.
    322329 * @param   pCtx        CPU context
    323330 * @param   fDR6        Include DR6 or not
    324331 */
    325 VMMR0DECL(int) CPUMR0LoadGuestDebugState(PVM pVM, PCPUMCTX pCtx, bool fDR6)
     332VMMR0DECL(int) CPUMR0LoadGuestDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, bool fDR6)
    326333{
    327334    /* Save the host state. */
    328     pVM->cpum.s.Host.dr0 = ASMGetDR0();
    329     pVM->cpum.s.Host.dr1 = ASMGetDR1();
    330     pVM->cpum.s.Host.dr2 = ASMGetDR2();
    331     pVM->cpum.s.Host.dr3 = ASMGetDR3();
    332     pVM->cpum.s.Host.dr6 = ASMGetDR6();
     335    pVCpu->cpum.s.Host.dr0 = ASMGetDR0();
     336    pVCpu->cpum.s.Host.dr1 = ASMGetDR1();
     337    pVCpu->cpum.s.Host.dr2 = ASMGetDR2();
     338    pVCpu->cpum.s.Host.dr3 = ASMGetDR3();
     339    pVCpu->cpum.s.Host.dr6 = ASMGetDR6();
    333340    /** @todo dr7 might already have been changed to 0x400; don't care right now as it's harmless. */
    334     pVM->cpum.s.Host.dr7 = ASMGetDR7();
     341    pVCpu->cpum.s.Host.dr7 = ASMGetDR7();
    335342    /* Make sure DR7 is harmless or else we could trigger breakpoints when restoring dr0-3 (!) */
    336343    ASMSetDR7(X86_DR7_INIT_VAL);
    … …  
    344351        ASMSetDR6(pCtx->dr[6]);
    345352
    346     pVM->cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS;
    347     return VINF_SUCCESS;
    348 }
    349 
     353    pVCpu->cpum.s.fUseFlags |= CPUM_USE_DEBUG_REGS;
     354    return VINF_SUCCESS;
     355}
     356
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