Changeset 14133 in vbox for trunk/src/VBox

Timestamp:

Nov 12, 2008 4:37:47 PM (16 years ago)

Author:

vboxsync

Message:

#1865: final pae change.

Location:

trunk/src/VBox/VMM

Files:

• PGM.cpp (modified) (7 diffs)
• PGMInternal.h (modified) (4 diffs)
• PGMMap.cpp (modified) (2 diffs)
• PGMPool.cpp (modified) (2 diffs)
• VMMAll/PGMAllBth.h (modified) (2 diffs)
• VMMAll/PGMAllPool.cpp (modified) (1 diff)
• testcase/tstVMStructGC.cpp (modified) (1 diff)

trunk/src/VBox/VMM/PGM.cpp

@@ -1413 +1413 @@
      */
     pVM->pgm.s.pHC32BitPD    = (PX86PD)MMR3PageAllocLow(pVM);
-    pVM->pgm.s.apHCPaePDs[0] = (PX86PDPAE)MMR3PageAlloc(pVM);
-    pVM->pgm.s.apHCPaePDs[1] = (PX86PDPAE)MMR3PageAlloc(pVM);
-    AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[0] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[1]);
-    pVM->pgm.s.apHCPaePDs[2] = (PX86PDPAE)MMR3PageAlloc(pVM);
-    AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[1] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[2]);
-    pVM->pgm.s.apHCPaePDs[3] = (PX86PDPAE)MMR3PageAlloc(pVM);
-    AssertRelease((uintptr_t)pVM->pgm.s.apHCPaePDs[2] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apHCPaePDs[3]);
+    pVM->pgm.s.apShwPaePDsR3[0] = (PX86PDPAE)MMR3PageAlloc(pVM);
+    pVM->pgm.s.apShwPaePDsR3[1] = (PX86PDPAE)MMR3PageAlloc(pVM);
+    AssertRelease((uintptr_t)pVM->pgm.s.apShwPaePDsR3[0] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apShwPaePDsR3[1]);
+    pVM->pgm.s.apShwPaePDsR3[2] = (PX86PDPAE)MMR3PageAlloc(pVM);
+    AssertRelease((uintptr_t)pVM->pgm.s.apShwPaePDsR3[1] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apShwPaePDsR3[2]);
+    pVM->pgm.s.apShwPaePDsR3[3] = (PX86PDPAE)MMR3PageAlloc(pVM);
+    AssertRelease((uintptr_t)pVM->pgm.s.apShwPaePDsR3[2] + PAGE_SIZE == (uintptr_t)pVM->pgm.s.apShwPaePDsR3[3]);
+#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
+    pVM->pgm.s.apShwPaePDsR0[0] = (uintptr_t)pVM->pgm.s.apShwPaePDsR3[0];
+    pVM->pgm.s.apShwPaePDsR0[1] = (uintptr_t)pVM->pgm.s.apShwPaePDsR3[1];
+    pVM->pgm.s.apShwPaePDsR0[2] = (uintptr_t)pVM->pgm.s.apShwPaePDsR3[2];
+    pVM->pgm.s.apShwPaePDsR0[3] = (uintptr_t)pVM->pgm.s.apShwPaePDsR3[3];
+#endif
     pVM->pgm.s.pShwPaePdptR3 = (PX86PDPT)MMR3PageAllocLow(pVM);
 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
@@ -1430 +1436 @@
 
     if (    !pVM->pgm.s.pHC32BitPD
-        ||  !pVM->pgm.s.apHCPaePDs[0]
-        ||  !pVM->pgm.s.apHCPaePDs[1]
-        ||  !pVM->pgm.s.apHCPaePDs[2]
-        ||  !pVM->pgm.s.apHCPaePDs[3]
+        ||  !pVM->pgm.s.apShwPaePDsR3[0]
+        ||  !pVM->pgm.s.apShwPaePDsR3[1]
+        ||  !pVM->pgm.s.apShwPaePDsR3[2]
+        ||  !pVM->pgm.s.apShwPaePDsR3[3]
         ||  !pVM->pgm.s.pShwPaePdptR3
         ||  !pVM->pgm.s.pShwNestedRootR3)
@@ -1444 +1450 @@
     pVM->pgm.s.HCPhys32BitPD    = MMPage2Phys(pVM, pVM->pgm.s.pHC32BitPD);
     Assert(MMPagePhys2Page(pVM, pVM->pgm.s.HCPhys32BitPD) == pVM->pgm.s.pHC32BitPD);
-    pVM->pgm.s.aHCPhysPaePDs[0] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[0]);
-    pVM->pgm.s.aHCPhysPaePDs[1] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[1]);
-    pVM->pgm.s.aHCPhysPaePDs[2] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[2]);
-    pVM->pgm.s.aHCPhysPaePDs[3] = MMPage2Phys(pVM, pVM->pgm.s.apHCPaePDs[3]);
+    pVM->pgm.s.aHCPhysPaePDs[0] = MMPage2Phys(pVM, pVM->pgm.s.apShwPaePDsR3[0]);
+    pVM->pgm.s.aHCPhysPaePDs[1] = MMPage2Phys(pVM, pVM->pgm.s.apShwPaePDsR3[1]);
+    pVM->pgm.s.aHCPhysPaePDs[2] = MMPage2Phys(pVM, pVM->pgm.s.apShwPaePDsR3[2]);
+    pVM->pgm.s.aHCPhysPaePDs[3] = MMPage2Phys(pVM, pVM->pgm.s.apShwPaePDsR3[3]);
     pVM->pgm.s.HCPhysPaePDPT    = MMPage2Phys(pVM, pVM->pgm.s.pShwPaePdptR3);
     pVM->pgm.s.HCPhysNestedRoot = MMPage2Phys(pVM, pVM->pgm.s.pShwNestedRootR3);
@@ -1457 +1463 @@
     ASMMemZero32(pVM->pgm.s.pShwPaePdptR3, PAGE_SIZE);
     ASMMemZero32(pVM->pgm.s.pShwNestedRootR3, PAGE_SIZE);
-    for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apHCPaePDs); i++)
-    {
-        ASMMemZero32(pVM->pgm.s.apHCPaePDs[i], PAGE_SIZE);
+    for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apShwPaePDsR3); i++)
+    {
+        ASMMemZero32(pVM->pgm.s.apShwPaePDsR3[i], PAGE_SIZE);
         pVM->pgm.s.pShwPaePdptR3->a[i].u = X86_PDPE_P | PGM_PLXFLAGS_PERMANENT | pVM->pgm.s.aHCPhysPaePDs[i];
         /* The flags will be corrected when entering and leaving long mode. */
@@ -1765 +1771 @@
      * Reserve space for mapping the paging pages into guest context.
      */
-    int rc = MMR3HyperReserve(pVM, PAGE_SIZE * (2 + RT_ELEMENTS(pVM->pgm.s.apHCPaePDs) + 1 + 2 + 2), "Paging", &GCPtr);
+    int rc = MMR3HyperReserve(pVM, PAGE_SIZE * (2 + RT_ELEMENTS(pVM->pgm.s.apShwPaePDsR3) + 1 + 2 + 2), "Paging", &GCPtr);
     AssertRCReturn(rc, rc);
     pVM->pgm.s.pGC32BitPD = GCPtr;
@@ -1813 +1819 @@
     GCPtr += PAGE_SIZE; /* reserved page */
 
-    for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apHCPaePDs); i++)
+    for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apShwPaePDsR3); i++)
     {
         rc = PGMMap(pVM, GCPtr, pVM->pgm.s.aHCPhysPaePDs[i], PAGE_SIZE, 0);
         AssertRCReturn(rc, rc);
-        pVM->pgm.s.apGCPaePDs[i] = GCPtr;
+        pVM->pgm.s.apShwPaePDsRC[i] = GCPtr;
         GCPtr += PAGE_SIZE;
     }
     /* A bit of paranoia is justified. */
-    AssertRelease(pVM->pgm.s.apGCPaePDs[0] + PAGE_SIZE == pVM->pgm.s.apGCPaePDs[1]);
-    AssertRelease(pVM->pgm.s.apGCPaePDs[1] + PAGE_SIZE == pVM->pgm.s.apGCPaePDs[2]);
-    AssertRelease(pVM->pgm.s.apGCPaePDs[2] + PAGE_SIZE == pVM->pgm.s.apGCPaePDs[3]);
+    AssertRelease(pVM->pgm.s.apShwPaePDsRC[0] + PAGE_SIZE == pVM->pgm.s.apShwPaePDsRC[1]);
+    AssertRelease(pVM->pgm.s.apShwPaePDsRC[1] + PAGE_SIZE == pVM->pgm.s.apShwPaePDsRC[2]);
+    AssertRelease(pVM->pgm.s.apShwPaePDsRC[2] + PAGE_SIZE == pVM->pgm.s.apShwPaePDsRC[3]);
     GCPtr += PAGE_SIZE; /* reserved page */
 
@@ -1897 +1903 @@
     pVM->pgm.s.pGC32BitPD    += offDelta;
     pVM->pgm.s.pGuestPDRC    += offDelta;
-    AssertCompile(RT_ELEMENTS(pVM->pgm.s.apGCPaePDs) == RT_ELEMENTS(pVM->pgm.s.apGstPaePDsRC));
-    for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apGCPaePDs); i++)
-    {
-        pVM->pgm.s.apGCPaePDs[i]    += offDelta;
+    AssertCompile(RT_ELEMENTS(pVM->pgm.s.apShwPaePDsRC) == RT_ELEMENTS(pVM->pgm.s.apGstPaePDsRC));
+    for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.apShwPaePDsRC); i++)
+    {
+        pVM->pgm.s.apShwPaePDsRC[i] += offDelta;
         pVM->pgm.s.apGstPaePDsRC[i] += offDelta;
     }

trunk/src/VBox/VMM/PGMInternal.h

@@ -2059 +2059 @@
     /** @name PAE Shadow Paging
      * @{ */
-    /** The four PDs for the low 4GB - HC Ptr.
+    /** The four PDs for the low 4GB - R3 Ptr.
      * Even though these are 4 pointers, what they point at is a single table.
      * Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
-#if 0///@todo def VBOX_WITH_2X_4GB_ADDR_SPACE
-    R3PTRTYPE(PX86PDPAE)            apHCPaePDs[4];
-#else
-    R3R0PTRTYPE(PX86PDPAE)          apHCPaePDs[4];
-#endif
-    /** The four PDs for the low 4GB - GC Ptr.
+    R3PTRTYPE(PX86PDPAE)            apShwPaePDsR3[4];
+#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
+    /** The four PDs for the low 4GB - R0 Ptr.
      * Same kind of mapping as apHCPaePDs. */
-    RCPTRTYPE(PX86PDPAE)            apGCPaePDs[4];
+    R0PTRTYPE(PX86PDPAE)            apShwPaePDsR0[4];
+#endif
+    /** The four PDs for the low 4GB - RC Ptr.
+     * Same kind of mapping as apHCPaePDs. */
+    RCPTRTYPE(PX86PDPAE)            apShwPaePDsRC[4];
     /** The Physical Address (HC) of the four PDs for the low 4GB.
      * These are *NOT* 4 contiguous pages. */
@@ -3824 +3825 @@
     return pPD;
 #else
-    //PX86PDPAE       pPD = pPGM->CTX_SUFF(apShwPaePDs)[iPdpt];
-    PX86PDPAE       pPD = pPGM->CTXMID(ap,PaePDs)[iPdpt];
+    PX86PDPAE       pPD = pPGM->CTX_SUFF(apShwPaePDs)[iPdpt];
     Assert(pPD);
     return pPD;
@@ -3849 +3849 @@
     return pPD->a[iPd].u;
 #else
-    //return pPGM->CTX_SUFF(apShwPaePDs)[iPdpt]->a[iPd].u;
-    return pPGM->CTXMID(ap,PaePDs)[iPdpt]->a[iPd].u;
+    return pPGM->CTX_SUFF(apShwPaePDs)[iPdpt]->a[iPd].u;
 #endif
 }
@@ -3872 +3871 @@
     return &pPD->a[iPd];
 #else
-    //Assert(pPGM->CTX_SUFF(apShwPaePDs)[iPdpt]);
-    //return &pPGM->CTX_SUFF(apShwPaePDs)[iPdpt]->a[iPd];
-    return &pPGM->CTXMID(ap,PaePDs)[iPdpt]->a[iPd];
+    Assert(pPGM->CTX_SUFF(apShwPaePDs)[iPdpt]);
+    return &pPGM->CTX_SUFF(apShwPaePDs)[iPdpt]->a[iPd];
 #endif
 }

trunk/src/VBox/VMM/PGMMap.cpp

@@ -731 +731 @@
         unsigned iPDE = iOldPDE * 2 % 512;
         pPGM->apInterPaePDs[iPD]->a[iPDE].u = 0;
-        pPGM->apHCPaePDs[iPD]->a[iPDE].u    = 0;
+        pPGM->apShwPaePDsR3[iPD]->a[iPDE].u = 0;
         iPDE++;
         pPGM->apInterPaePDs[iPD]->a[iPDE].u = 0;
-        pPGM->apHCPaePDs[iPD]->a[iPDE].u    = 0;
+        pPGM->apShwPaePDsR3[iPD]->a[iPDE].u = 0;
 
         /* Clear the PGM_PDFLAGS_MAPPING flag for the page directory pointer entry. (legacy PAE guest mode) */
@@ -784 +784 @@
         const unsigned iPD = iNewPDE / 256;
         unsigned iPDE = iNewPDE * 2 % 512;
-        if (pPGM->apHCPaePDs[iPD]->a[iPDE].n.u1Present)
-            pgmPoolFree(pVM, pPGM->apHCPaePDs[iPD]->a[iPDE].u & X86_PDE_PAE_PG_MASK, PGMPOOL_IDX_PAE_PD, iNewPDE * 2);
+        if (pPGM->apShwPaePDsR3[iPD]->a[iPDE].n.u1Present)
+            pgmPoolFree(pVM, pPGM->apShwPaePDsR3[iPD]->a[iPDE].u & X86_PDE_PAE_PG_MASK, PGMPOOL_IDX_PAE_PD, iNewPDE * 2);
         X86PDEPAE PdePae0;
         PdePae0.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT0;
         pPGM->apInterPaePDs[iPD]->a[iPDE] = PdePae0;
-        pPGM->apHCPaePDs[iPD]->a[iPDE]    = PdePae0;
+        pPGM->apShwPaePDsR3[iPD]->a[iPDE] = PdePae0;
 
         iPDE++;
-        if (pPGM->apHCPaePDs[iPD]->a[iPDE].n.u1Present)
-            pgmPoolFree(pVM, pPGM->apHCPaePDs[iPD]->a[iPDE].u & X86_PDE_PAE_PG_MASK, PGMPOOL_IDX_PAE_PD, iNewPDE * 2 + 1);
+        if (pPGM->apShwPaePDsR3[iPD]->a[iPDE].n.u1Present)
+            pgmPoolFree(pVM, pPGM->apShwPaePDsR3[iPD]->a[iPDE].u & X86_PDE_PAE_PG_MASK, PGMPOOL_IDX_PAE_PD, iNewPDE * 2 + 1);
         X86PDEPAE PdePae1;
         PdePae1.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT1;
         pPGM->apInterPaePDs[iPD]->a[iPDE] = PdePae1;
-        pPGM->apHCPaePDs[iPD]->a[iPDE]    = PdePae1;
+        pPGM->apShwPaePDsR3[iPD]->a[iPDE] = PdePae1;
 
         /* Set the PGM_PDFLAGS_MAPPING flag in the page directory pointer entry. (legacy PAE guest mode) */

trunk/src/VBox/VMM/PGMPool.cpp

@@ -262 +262 @@
     pPool->aPages[PGMPOOL_IDX_PAE_PD].Core.Key  = NIL_RTHCPHYS;
     pPool->aPages[PGMPOOL_IDX_PAE_PD].GCPhys    = NIL_RTGCPHYS;
-    pPool->aPages[PGMPOOL_IDX_PAE_PD].pvPageR3  = pVM->pgm.s.apHCPaePDs[0];
+    pPool->aPages[PGMPOOL_IDX_PAE_PD].pvPageR3  = pVM->pgm.s.apShwPaePDsR3[0];
     pPool->aPages[PGMPOOL_IDX_PAE_PD].enmKind   = PGMPOOLKIND_ROOT_PAE_PD;
     pPool->aPages[PGMPOOL_IDX_PAE_PD].idx       = PGMPOOL_IDX_PAE_PD;
@@ -271 +271 @@
         pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].Core.Key  = NIL_RTHCPHYS;
         pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].GCPhys    = NIL_RTGCPHYS;
-        pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].pvPageR3  = pVM->pgm.s.apHCPaePDs[i];
+        pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].pvPageR3  = pVM->pgm.s.apShwPaePDsR3[i];
         pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].enmKind   = PGMPOOLKIND_PAE_PD_FOR_PAE_PD;
         pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].idx       = PGMPOOL_IDX_PAE_PD_0 + i;

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -2324 +2324 @@
     const unsigned  iPdpt    = (GCPtrPage >> X86_PDPT_SHIFT); NOREF(iPdpt);
     PX86PDPT        pPdptDst = pgmShwGetPaePDPTPtr(&pVM->pgm.s); NOREF(pPdptDst);
-    PSHWPDE         pPdeDst = pgmShwGetPaePDEPtr(&pVM->pgm.s, GCPtrPage);
+    PSHWPDE         pPdeDst  = pgmShwGetPaePDEPtr(&pVM->pgm.s, GCPtrPage);
 
 # elif PGM_SHW_TYPE == PGM_TYPE_AMD64
@@ -3214 +3214 @@
         X86PDPE         PdpeSrc;
         PGSTPD          pPDSrc    = pgmGstGetPaePDPtr(&pVM->pgm.s, iPdpt << X86_PDPT_SHIFT, &iPDSrc, &PdpeSrc);
-        PX86PDPAE       pPDPAE    = pVM->pgm.s.CTXMID(ap,PaePDs)[0];
         PX86PDEPAE      pPDEDst   = pgmShwGetPaePDEPtr(&pVM->pgm.s, iPdpt << X86_PDPT_SHIFT);
         PX86PDPT        pPdptDst  = pgmShwGetPaePDPTPtr(&pVM->pgm.s);

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -115 +115 @@
         case PGMPOOL_IDX_PAE_PD:
         case PGMPOOL_IDX_PAE_PD_0:
-            return pVM->pgm.s.apGCPaePDs[0];
+            return pVM->pgm.s.apShwPaePDsRC[0];
         case PGMPOOL_IDX_PAE_PD_1:
-            return pVM->pgm.s.apGCPaePDs[1];
+            return pVM->pgm.s.apShwPaePDsRC[1];
         case PGMPOOL_IDX_PAE_PD_2:
-            return pVM->pgm.s.apGCPaePDs[2];
+            return pVM->pgm.s.apShwPaePDsRC[2];
         case PGMPOOL_IDX_PAE_PD_3:
-            return pVM->pgm.s.apGCPaePDs[3];
+            return pVM->pgm.s.apShwPaePDsRC[3];
         case PGMPOOL_IDX_PDPT:
             return pVM->pgm.s.pShwPaePdptRC;

trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp

@@ -416 +416 @@
     GEN_CHECK_OFF(PGM, pGC32BitPD);
     GEN_CHECK_OFF(PGM, HCPhys32BitPD);
-    GEN_CHECK_OFF(PGM, apHCPaePDs);
-    GEN_CHECK_OFF(PGM, apGCPaePDs);
+    GEN_CHECK_OFF(PGM, apShwPaePDsR3);
+#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
+    GEN_CHECK_OFF(PGM, apShwPaePDsR0);
+#endif
+    GEN_CHECK_OFF(PGM, apShwPaePDsRC);
     GEN_CHECK_OFF(PGM, aHCPhysPaePDs);
     GEN_CHECK_OFF(PGM, pShwPaePdptR3);