VirtualBox

Ignore:
Timestamp:
Dec 10, 2008 3:37:23 PM (16 years ago)
Author:
vboxsync
Message:

ATA/AHCI: Separated the device state structures for the ATA controller again to make it possible to update the LED state and I/O statistics while having the oppurtunity to spot alignment issues in tstDeviceStructSizeGC.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Storage/ATAController.h

    r13004 r15252  
    7878*   Structures and Typedefs                                                    *
    7979*******************************************************************************/
    80 typedef struct ATADevState {
     80typedef struct AHCIATADevState {
    8181    /** Flag indicating whether the current command uses LBA48 mode. */
    8282    bool fLBA48;
    … …  
    165165    volatile uint32_t MediaEventStatus;
    166166
    167     uint32_t Alignment0;
    168 
    169167    /** The status LED state for this drive. */
    170     PDMLED Led;
     168    R3PTRTYPE(PPDMLED)  pLed;
     169#if HC_ARCH_BITS == 64
     170    uint32_t            uAlignment3;
     171#endif
    171172
    172173    /** Size of I/O buffer. */
    … …  
    201202    STAMPROFILEADV  StatReads;
    202203    /** Statistics: number of bytes read. */
    203     STAMCOUNTER     StatBytesRead;
     204    R3PTRTYPE(PSTAMCOUNTER)     pStatBytesRead;
     205#if HC_ARCH_BITS == 64
     206    uint64_t            uAlignment4;
     207#endif
    204208    /** Statistics: number of write operations and the time spent writing. */
    205209    STAMPROFILEADV  StatWrites;
    206210    /** Statistics: number of bytes written. */
    207     STAMCOUNTER     StatBytesWritten;
     211    R3PTRTYPE(PSTAMCOUNTER)     pStatBytesWritten;
     212#if HC_ARCH_BITS == 64
     213    uint64_t            uAlignment5;
     214#endif
    208215    /** Statistics: number of flush operations and the time spend flushing. */
    209216    STAMPROFILE     StatFlushes;
    … …  
    242249    PPDMDEVINSR3                        pDevInsR3;
    243250    /** Pointer to controller instance. */
    244     R3PTRTYPE(struct ATACONTROLLER *)   pControllerR3;
     251    R3PTRTYPE(struct AHCIATACONTROLLER *)   pControllerR3;
    245252    /** Pointer to device instance. */
    246253    PPDMDEVINSR0                        pDevInsR0;
    247254    /** Pointer to controller instance. */
    248     R0PTRTYPE(struct ATACONTROLLER *)   pControllerR0;
     255    R0PTRTYPE(struct AHCIATACONTROLLER *)   pControllerR0;
    249256    /** Pointer to device instance. */
    250257    PPDMDEVINSRC                        pDevInsRC;
    251258    /** Pointer to controller instance. */
    252     RCPTRTYPE(struct ATACONTROLLER *)   pControllerRC;
    253 } ATADevState;
    254 
    255 
    256 typedef struct ATATransferRequest
     259    RCPTRTYPE(struct AHCIATACONTROLLER *)   pControllerRC;
     260} AHCIATADevState;
     261
     262
     263typedef struct AHCIATATransferRequest
    257264{
    258265    uint8_t iIf;
    … …  
    261268    uint32_t cbTotalTransfer;
    262269    uint8_t uTxDir;
    263 } ATATransferRequest;
    264 
    265 
    266 typedef struct ATAAbortRequest
     270} AHCIATATransferRequest;
     271
     272
     273typedef struct AHCIATAAbortRequest
    267274{
    268275    uint8_t iIf;
    269276    bool fResetDrive;
    270 } ATAAbortRequest;
     277} AHCIATAAbortRequest;
    271278
    272279
    … …  
    274281{
    275282    /** Begin a new transfer. */
    276     ATA_AIO_NEW = 0,
     283    AHCIATA_AIO_NEW = 0,
    277284    /** Continue a DMA transfer. */
    278     ATA_AIO_DMA,
     285    AHCIATA_AIO_DMA,
    279286    /** Continue a PIO transfer. */
    280     ATA_AIO_PIO,
     287    AHCIATA_AIO_PIO,
    281288    /** Reset the drives on current controller, stop all transfer activity. */
    282     ATA_AIO_RESET_ASSERTED,
     289    AHCIATA_AIO_RESET_ASSERTED,
    283290    /** Reset the drives on current controller, resume operation. */
    284     ATA_AIO_RESET_CLEARED,
     291    AHCIATA_AIO_RESET_CLEARED,
    285292    /** Abort the current transfer of a particular drive. */
    286     ATA_AIO_ABORT
    287 } ATAAIO;
    288 
    289 
    290 typedef struct ATARequest
     293    AHCIATA_AIO_ABORT
     294} AHCIATAAIO;
     295
     296
     297typedef struct AHCIATARequest
    291298{
    292     ATAAIO ReqType;
     299    AHCIATAAIO ReqType;
    293300    union
    294301    {
    295         ATATransferRequest t;
    296         ATAAbortRequest a;
     302        AHCIATATransferRequest t;
     303        AHCIATAAbortRequest a;
    297304    } u;
    298 } ATARequest;
    299 
    300 
    301 typedef struct ATACONTROLLER
     305} AHCIATARequest;
     306
     307
     308typedef struct AHCIATACONTROLLER
    302309{
    303310    /** The base of the first I/O Port range. */
    … …  
    338345
    339346    /** The ATA/ATAPI interfaces of this controller. */
    340     ATADevState aIfs[2];
     347    AHCIATADevState aIfs[2];
    341348
    342349    /** Pointer to device instance. */
    … …  
    354361    RTSEMEVENT          AsyncIOSem;
    355362    /** The request queue for the AIO thread. One element is always unused. */
    356     ATARequest          aAsyncIORequests[4];
     363    AHCIATARequest      aAsyncIORequests[4];
    357364    /** The position at which to insert a new request for the AIO thread. */
    358365    uint8_t             AsyncIOReqHead;
    … …  
    377384    STAMPROFILEADV  StatAsyncTime;
    378385    STAMPROFILE     StatLockWait;
    379 } ATACONTROLLER, *PATACONTROLLER;
     386} AHCIATACONTROLLER, *PAHCIATACONTROLLER;
    380387
    381388#ifndef VBOX_DEVICE_STRUCT_TESTCASE
    … …  
    384391#define ATADEVSTATE_2_DEVINS(pIf)              ( (pIf)->CTX_SUFF(pDevIns) )
    385392#define CONTROLLER_2_DEVINS(pController)       ( (pController)->CTX_SUFF(pDevIns) )
    386 #define PDMIBASE_2_ATASTATE(pInterface)        ( (ATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ATADevState, IBase)) )
     393#define PDMIBASE_2_ATASTATE(pInterface)        ( (AHCIATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(AHCIATADevState, IBase)) )
    387394
    388395
    … …  
    391398 ******************************************************************************/
    392399__BEGIN_DECLS
    393 int ataControllerIOPortWrite1(PATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
    394 int ataControllerIOPortRead1(PATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
    395 int ataControllerIOPortWriteStr1(PATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
    396 int ataControllerIOPortReadStr1(PATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
    397 int ataControllerIOPortWrite2(PATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
    398 int ataControllerIOPortRead2(PATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
    399 int ataControllerBMDMAIOPortRead(PATACONTROLLER pCtl, RTIOPORT Port, uint32_t *pu32, unsigned cb);
    400 int ataControllerBMDMAIOPortWrite(PATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
     400int ataControllerIOPortWrite1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
     401int ataControllerIOPortRead1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
     402int ataControllerIOPortWriteStr1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
     403int ataControllerIOPortReadStr1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
     404int ataControllerIOPortWrite2(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
     405int ataControllerIOPortRead2(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
     406int ataControllerBMDMAIOPortRead(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *pu32, unsigned cb);
     407int ataControllerBMDMAIOPortWrite(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
    401408__END_DECLS
    402409
    … …  
    413420 * @param   szName         Name of the controller (Used to initialize the critical section).
    414421 */
    415 int ataControllerInit(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PPDMIBASE pDrvBaseMaster, PPDMIBASE pDrvBaseSlave,
    416                       uint32_t *pcbSSMState, const char *szName);
     422int ataControllerInit(PPDMDEVINS pDevIns, PAHCIATACONTROLLER pCtl, PPDMIBASE pDrvBaseMaster, PPDMIBASE pDrvBaseSlave,
     423                      uint32_t *pcbSSMState, const char *szName, PPDMLED pLed, PSTAMCOUNTER pStatBytesRead, PSTAMCOUNTER pStatBytesWritten);
    417424
    418425/**
    … …  
    422429 * @param   pCtl The controller instance.
    423430 */
    424 int ataControllerDestroy(PATACONTROLLER pCtl);
     431int ataControllerDestroy(PAHCIATACONTROLLER pCtl);
    425432
    426433/**
    … …  
    430437 * @param   pCtl the controller instance.
    431438 */
    432 void ataControllerPowerOff(PATACONTROLLER pCtl);
     439void ataControllerPowerOff(PAHCIATACONTROLLER pCtl);
    433440
    434441/**
    … …  
    438445 * @param   pCtl Pointer to the controller.
    439446 */
    440 void ataControllerReset(PATACONTROLLER pCtl);
     447void ataControllerReset(PAHCIATACONTROLLER pCtl);
    441448
    442449/**
    … …  
    446453 * @param   pCtl The controller instance.
    447454 */
    448 void ataControllerSuspend(PATACONTROLLER pCtl);
     455void ataControllerSuspend(PAHCIATACONTROLLER pCtl);
    449456
    450457/**
    … …  
    455462 */
    456463
    457 void ataControllerResume(PATACONTROLLER pCtl);
     464void ataControllerResume(PAHCIATACONTROLLER pCtl);
    458465
    459466/**
    … …  
    464471 * @param   offDelta The relocation delta relative to the old location.
    465472 */
    466 void ataControllerRelocate(PATACONTROLLER pCtl, RTGCINTPTR offDelta);
     473void ataControllerRelocate(PAHCIATACONTROLLER pCtl, RTGCINTPTR offDelta);
    467474
    468475/**
    … …  
    473480 * @param   pSSM    SSM operation handle.
    474481 */
    475 int ataControllerSaveExec(PATACONTROLLER pCtl, PSSMHANDLE pSSM);
     482int ataControllerSaveExec(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
    476483
    477484/**
    … …  
    482489 * @param   pSSM    SSM operation handle.
    483490 */
    484 int ataControllerSavePrep(PATACONTROLLER pCtl, PSSMHANDLE pSSM);
     491int ataControllerSavePrep(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
    485492
    486493/**
    … …  
    491498 * @param   pSSM    SSM operation handle.
    492499 */
    493 int ataControllerLoadExec(PATACONTROLLER pCtl, PSSMHANDLE pSSM);
     500int ataControllerLoadExec(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
    494501
    495502/**
    … …  
    500507 * @param   pSSM    SSM operation handle.
    501508 */
    502 int ataControllerLoadPrep(PATACONTROLLER pCtl, PSSMHANDLE pSSM);
     509int ataControllerLoadPrep(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
    503510
    504511#endif /* IN_RING3 */
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