Changeset 17371 in vbox for trunk/src/VBox/VMM/PGMPhys.cpp
- Timestamp:
- Mar 5, 2009 1:37:58 AM (16 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/PGMPhys.cpp
r17251 r17371 49 49 * Internal Functions * 50 50 *******************************************************************************/ 51 /*static - shut up warning */ 52 DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser); 51 static DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser); 53 52 54 53 … … 290 289 for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesR3; pRam; pRam = pRam->pNextR3) 291 290 { 292 uint32_t iPage = pRam->cb >> PAGE_SHIFT; Assert((RTGCPHYS)iPage << PAGE_SHIFT == pRam->cb);291 uint32_t iPage = pRam->cb >> PAGE_SHIFT; Assert((RTGCPHYS)iPage << PAGE_SHIFT == pRam->cb); 293 292 #ifdef VBOX_WITH_NEW_PHYS_CODE 294 if (!pVM->pgm.f.fRamPreAlloc) 293 int rc; 294 if (!pVM->pgm.s.fRamPreAlloc) 295 295 { 296 296 /* Replace all RAM pages by ZERO pages. */ … … 1330 1330 1331 1331 /* 1332 * Before registering the handler, notify REM, it'll get 1333 * confused about shadowed ROM otherwise. 1334 */ 1335 REMR3NotifyPhysRomRegister(pVM, GCPhys, cb, NULL, 1336 !!(fFlags & PGMPHYS_ROM_FLAG_SHADOWED)); 1337 /** @todo fix shadowing and REM. */ 1338 1339 /* 1332 1340 * Register the write access handler for the range (PGMROMPROT_READ_ROM_WRITE_IGNORE). 1333 1341 */ 1334 rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhysLast, 1335 #if 0 /** @todo we actually need a ring-3 write handler here for shadowed ROMs, so hack REM! */ 1342 rc = PGMR3HandlerPhysicalRegister(pVM, 1343 fFlags & PGMPHYS_ROM_FLAG_SHADOWED 1344 ? PGMPHYSHANDLERTYPE_PHYSICAL_ALL 1345 : PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 1346 GCPhys, GCPhysLast, 1336 1347 pgmR3PhysRomWriteHandler, pRomNew, 1337 #else1338 NULL, NULL,1339 #endif1340 1348 NULL, "pgmPhysRomWriteHandler", MMHyperCCToR0(pVM, pRomNew), 1341 1349 NULL, "pgmPhysRomWriteHandler", MMHyperCCToRC(pVM, pRomNew), pszDesc); … … 1401 1409 } 1402 1410 1403 REMR3NotifyPhysRomRegister(pVM, GCPhys, cb, NULL, false); /** @todo fix shadowing and REM. */1404 1405 1411 GMMR3AllocatePagesCleanup(pReq); 1406 1412 pgmUnlock(pVM); … … 1416 1422 } 1417 1423 1418 pgmR3PhysUnlinkRamRange2(pVM, pRamNew, pRamPrev); 1419 if (pRamNew) 1424 if (!fRamExists) 1425 { 1426 pgmR3PhysUnlinkRamRange2(pVM, pRamNew, pRamPrev); 1420 1427 MMHyperFree(pVM, pRamNew); 1428 } 1421 1429 } 1422 1430 MMHyperFree(pVM, pRomNew); … … 1444 1452 * @param pvUser User argument. 1445 1453 */ 1446 /*static - shut up warning */ 1447 DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser) 1454 static DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser) 1448 1455 { 1449 1456 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser; … … 2019 2026 if (RT_SUCCESS(rc)) 2020 2027 { 2021 2022 2028 rc = MMR3PhysRegisterEx(pVM, pvRam, GCPhys, PGM_DYNAMIC_CHUNK_SIZE, 0, MM_PHYS_TYPE_DYNALLOC_CHUNK, "Main Memory"); 2023 2029 if (RT_SUCCESS(rc)) … … 2051 2057 } 2052 2058 2053 #endif /* !VBOX_WITH_NEW_PHYS_CODE */2054 2059 2055 2060 /** … … 2105 2110 } 2106 2111 2112 #endif /* !VBOX_WITH_NEW_PHYS_CODE */ 2107 2113 2108 2114 /** … … 2314 2320 Req.pvR3 = NULL; 2315 2321 Req.idChunkMap = idChunk; 2316 Req.idChunkUnmap = INT32_MAX;2322 Req.idChunkUnmap = NIL_GMM_CHUNKID; 2317 2323 if (pVM->pgm.s.ChunkR3Map.c >= pVM->pgm.s.ChunkR3Map.cMax) 2318 2324 Req.idChunkUnmap = pgmR3PhysChunkFindUnmapCandidate(pVM); 2319 rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_GMM_MAP_UNMAP_CHUNK, 0, &Req.Hdr);2325 rc = VMMR3CallR0(pVM, VMMR0_DO_GMM_MAP_UNMAP_CHUNK, 0, &Req.Hdr); 2320 2326 if (RT_SUCCESS(rc)) 2321 2327 { … … 2334 2340 2335 2341 /* remove the unmapped one. */ 2336 if (Req.idChunkUnmap != INT32_MAX)2342 if (Req.idChunkUnmap != NIL_GMM_CHUNKID) 2337 2343 { 2338 2344 PPGMCHUNKR3MAP pUnmappedChunk = (PPGMCHUNKR3MAP)RTAvlU32Remove(&pVM->pgm.s.ChunkR3Map.pTree, Req.idChunkUnmap); … … 2407 2413 { 2408 2414 pgmLock(pVM); 2409 int rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL);2415 int rc = VMMR3CallR0(pVM, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL); 2410 2416 if (rc == VERR_GMM_SEED_ME) 2411 2417 { … … 2413 2419 rc = SUPPageAlloc(GMM_CHUNK_SIZE >> PAGE_SHIFT, &pvChunk); 2414 2420 if (RT_SUCCESS(rc)) 2415 rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_GMM_SEED_CHUNK, (uintptr_t)pvChunk, NULL);2421 rc = VMMR3CallR0(pVM, VMMR0_DO_GMM_SEED_CHUNK, (uintptr_t)pvChunk, NULL); 2416 2422 if (RT_FAILURE(rc)) 2417 2423 { … … 2432 2438 * @returns VBox status code. 2433 2439 * @retval VINF_SUCCESS on success. 2434 * @retval VINF_PGM_PHYS_TLB_CATCH_WRITE and *p vPtrset if the page has a write2440 * @retval VINF_PGM_PHYS_TLB_CATCH_WRITE and *ppv set if the page has a write 2435 2441 * access handler of some kind. 2436 2442 * @retval VERR_PGM_PHYS_TLB_CATCH_ALL if the page has a handler catching all … … 2441 2447 * @param GCPhys The GC physical address to convert. 2442 2448 * @param fWritable Whether write access is required. 2443 * @param pR3Ptr Where to store the R3 pointer on success. 2444 */ 2445 VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **pvPtr) 2449 * @param ppv Where to store the pointer corresponding to GCPhys on 2450 * success. 2451 */ 2452 VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv) 2446 2453 { 2447 2454 pgmLock(pVM); … … 2452 2459 if (RT_SUCCESS(rc)) 2453 2460 { 2454 #if 0 /** @todo ifndef PGM_IGNORE_RAM_FLAGS_RESERVED */ 2455 if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage))) 2456 rc = VERR_PGM_PHYS_TLB_UNASSIGNED; 2457 #endif 2458 { 2459 #if 0 /** @todo looks like the system ROM is registered incorrectly, 0xfe000 claims to be a zero page. */ 2460 if (fWritable && PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED) 2461 rc = VERR_PGM_PHYS_TLB_UNASSIGNED; /** @todo VBOX_WITH_NEW_PHYS_CODE: remap it to a writeable page. */ 2461 #ifdef VBOX_WITH_NEW_PHYS_CODE 2462 if (!PGM_PAGE_HAS_ANY_HANDLERS(pPage)) 2463 rc = VINF_SUCCESS; 2464 else 2465 { 2466 if (PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)) /* catches MMIO */ 2467 rc = VERR_PGM_PHYS_TLB_CATCH_ALL; 2468 else if (fWritable && PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage)) 2469 rc = VINF_PGM_PHYS_TLB_CATCH_WRITE; 2470 else 2471 { 2472 /* Temporariliy disabled phycial handler(s), since the recompiler 2473 doesn't get notified when it's reset we'll have to pretend its 2474 operating normally. */ 2475 if (pgmHandlerPhysicalIsAll(pVM, GCPhys)) 2476 rc = VERR_PGM_PHYS_TLB_CATCH_ALL; 2477 else 2478 rc = VINF_PGM_PHYS_TLB_CATCH_WRITE; 2479 } 2480 } 2481 if (RT_SUCCESS(rc)) 2482 { 2483 /* Make sure what we return is writable. */ 2484 if (fWritable && rc != VINF_PGM_PHYS_TLB_CATCH_WRITE) 2485 switch (PGM_PAGE_GET_STATE(pPage)) 2486 { 2487 case PGM_PAGE_STATE_ALLOCATED: 2488 case PGM_PAGE_STATE_ZERO: 2489 break; 2490 case PGM_PAGE_STATE_SHARED: 2491 case PGM_PAGE_STATE_WRITE_MONITORED: 2492 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK); 2493 AssertLogRelRCReturn(rc, rc); 2494 break; 2495 } 2496 2497 /* Get a ring-3 mapping of the address. */ 2498 PPGMPAGER3MAPTLBE pTlbe; 2499 int rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe); 2500 AssertLogRelRCReturn(rc, rc); 2501 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK)); 2502 /** @todo mapping/locking hell; this isn't horribly efficient since 2503 * pgmPhysPageLoadIntoTlb will repeate the lookup we've done here. */ 2504 } 2505 /* else: handler catching all access, no pointer returned. */ 2506 2462 2507 #else 2463 if (0) 2464 /* nothing */; 2465 #endif 2466 else if (PGM_PAGE_HAS_ANY_HANDLERS(pPage)) 2508 if (0) 2509 /* nothing */; 2510 else if (PGM_PAGE_HAS_ANY_HANDLERS(pPage)) 2511 { 2512 if (PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)) /* catches MMIO */ 2513 rc = VERR_PGM_PHYS_TLB_CATCH_ALL; 2514 else if (fWritable && PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage)) 2515 rc = VINF_PGM_PHYS_TLB_CATCH_WRITE; 2516 else 2467 2517 { 2468 if (PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)) /* catches MMIO */ 2518 /* Temporariliy disabled phycial handler(s), since the recompiler 2519 doesn't get notified when it's reset we'll have to pretend its 2520 operating normally. */ 2521 if (pgmHandlerPhysicalIsAll(pVM, GCPhys)) 2469 2522 rc = VERR_PGM_PHYS_TLB_CATCH_ALL; 2470 else if (fWritable && PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))2523 else 2471 2524 rc = VINF_PGM_PHYS_TLB_CATCH_WRITE; 2472 else 2473 { 2474 /* Temporariliy disabled phycial handler(s), since the recompiler 2475 doesn't get notified when it's reset we'll have to pretend its 2476 operating normally. */ 2477 if (pgmHandlerPhysicalIsAll(pVM, GCPhys)) 2478 rc = VERR_PGM_PHYS_TLB_CATCH_ALL; 2479 else 2480 rc = VINF_PGM_PHYS_TLB_CATCH_WRITE; 2481 } 2525 } 2526 } 2527 else 2528 rc = VINF_SUCCESS; 2529 if (RT_SUCCESS(rc)) 2530 { 2531 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) 2532 { 2533 AssertMsg(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM, ("GCPhys=%RGp type=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pPage))); 2534 RTGCPHYS off = GCPhys - pRam->GCPhys; 2535 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT); 2536 *ppv = (void *)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)); 2537 } 2538 else if (RT_LIKELY(pRam->pvR3)) 2539 { 2540 AssertMsg(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2, ("GCPhys=%RGp type=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pPage))); 2541 RTGCPHYS off = GCPhys - pRam->GCPhys; 2542 *ppv = (uint8_t *)pRam->pvR3 + off; 2482 2543 } 2483 2544 else 2484 rc = VINF_SUCCESS; 2485 if (RT_SUCCESS(rc)) 2486 { 2487 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) 2488 { 2489 AssertMsg(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM, ("GCPhys=%RGp type=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pPage))); 2490 RTGCPHYS off = GCPhys - pRam->GCPhys; 2491 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT); 2492 *pvPtr = (void *)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)); 2493 } 2494 else if (RT_LIKELY(pRam->pvR3)) 2495 { 2496 AssertMsg(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2, ("GCPhys=%RGp type=%d\n", GCPhys, PGM_PAGE_GET_TYPE(pPage))); 2497 RTGCPHYS off = GCPhys - pRam->GCPhys; 2498 *pvPtr = (uint8_t *)pRam->pvR3 + off; 2499 } 2500 else 2501 rc = VERR_PGM_PHYS_TLB_UNASSIGNED; 2502 } 2503 } 2545 rc = VERR_PGM_PHYS_TLB_UNASSIGNED; 2546 } 2547 #endif /* !VBOX_WITH_NEW_PHYS_CODE */ 2504 2548 } 2505 2549 else
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