VirtualBox

Changeset 18291 in vbox for trunk/src/VBox/VMM/PGMPhys.cpp


Ignore:
Timestamp:
Mar 26, 2009 5:11:07 AM (16 years ago)
Author:
vboxsync
Message:

PGM: Map PGMRAMRANGES above 4GB outside HMA (see defect). Changed PGMR3MapPT to take a flag indicating whether PGMR3UnmapPT will be used; this way we can select a more optimal allocation function for the ram ranges. PGMMapResolveConflicts: Walk the list correctly after reloc. pgmMapClearShadowPDEs: Don't clear PGM_PLXFLAGS_MAPPING when we shouldn't (odd PAE cases).

File:
1 edited

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  • trunk/src/VBox/VMM/PGMPhys.cpp

    r18266 r18291  
    572572
    573573/**
     574 * Relinks the RAM ranges using the pSelfRC and pSelfR0 pointers.
     575 *
     576 * Called when anything was relocated.
     577 *
     578 * @param   pVM         Pointer to the shared VM structure.
     579 */
     580void pgmR3PhysRelinkRamRanges(PVM pVM)
     581{
     582    PPGMRAMRANGE pCur;
     583
     584#ifdef VBOX_STRICT
     585    for (pCur = pVM->pgm.s.pRamRangesR3; pCur; pCur = pCur->pNextR3)
     586    {
     587        Assert((pCur->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pCur->pSelfR0 == MMHyperCCToR0(pVM, pCur));
     588        Assert((pCur->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pCur->pSelfRC == MMHyperCCToRC(pVM, pCur));
     589        Assert((pCur->GCPhys     & PAGE_OFFSET_MASK) == 0);
     590        Assert((pCur->GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
     591        Assert((pCur->cb         & PAGE_OFFSET_MASK) == 0);
     592        Assert(pCur->cb == pCur->GCPhysLast - pCur->GCPhys + 1);
     593        for (PPGMRAMRANGE pCur2 = pVM->pgm.s.pRamRangesR3; pCur2; pCur2 = pCur2->pNextR3)
     594            Assert(   pCur2 == pCur
     595                   || strcmp(pCur2->pszDesc, pCur->pszDesc)); /** @todo fix MMIO ranges!! */
     596    }
     597#endif
     598
     599    pCur = pVM->pgm.s.pRamRangesR3;
     600    if (pCur)
     601    {
     602        pVM->pgm.s.pRamRangesR0 = pCur->pSelfR0;
     603        pVM->pgm.s.pRamRangesRC = pCur->pSelfRC;
     604
     605        for (; pCur->pNextR3; pCur = pCur->pNextR3)
     606        {
     607            pCur->pNextR0 = pCur->pNextR3->pSelfR0;
     608            pCur->pNextRC = pCur->pNextR3->pSelfRC;
     609        }
     610
     611        Assert(pCur->pNextR0 == NIL_RTR0PTR);
     612        Assert(pCur->pNextRC == NIL_RTRCPTR);
     613    }
     614    else
     615    {
     616        Assert(pVM->pgm.s.pRamRangesR0 == NIL_RTR0PTR);
     617        Assert(pVM->pgm.s.pRamRangesRC == NIL_RTRCPTR);
     618    }
     619}
     620
     621
     622/**
    574623 * Links a new RAM range into the list.
    575624 *
     
    581630{
    582631    AssertMsg(pNew->pszDesc, ("%RGp-%RGp\n", pNew->GCPhys, pNew->GCPhysLast));
     632    Assert((pNew->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pNew->pSelfR0 == MMHyperCCToR0(pVM, pNew));
     633    Assert((pNew->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pNew->pSelfRC == MMHyperCCToRC(pVM, pNew));
    583634
    584635    pgmLock(pVM);
     
    586637    PPGMRAMRANGE pRam = pPrev ? pPrev->pNextR3 : pVM->pgm.s.pRamRangesR3;
    587638    pNew->pNextR3 = pRam;
    588     pNew->pNextR0 = pRam ? MMHyperCCToR0(pVM, pRam) : NIL_RTR0PTR;
    589     pNew->pNextRC = pRam ? MMHyperCCToRC(pVM, pRam) : NIL_RTRCPTR;
     639    pNew->pNextR0 = pRam ? pRam->pSelfR0 : NIL_RTR0PTR;
     640    pNew->pNextRC = pRam ? pRam->pSelfRC : NIL_RTRCPTR;
    590641
    591642    if (pPrev)
    592643    {
    593644        pPrev->pNextR3 = pNew;
    594         pPrev->pNextR0 = MMHyperCCToR0(pVM, pNew);
    595         pPrev->pNextRC = MMHyperCCToRC(pVM, pNew);
     645        pPrev->pNextR0 = pNew->pSelfR0;
     646        pPrev->pNextRC = pNew->pSelfRC;
    596647    }
    597648    else
    598649    {
    599650        pVM->pgm.s.pRamRangesR3 = pNew;
    600         pVM->pgm.s.pRamRangesR0 = MMHyperCCToR0(pVM, pNew);
    601         pVM->pgm.s.pRamRangesRC = MMHyperCCToRC(pVM, pNew);
     651        pVM->pgm.s.pRamRangesR0 = pNew->pSelfR0;
     652        pVM->pgm.s.pRamRangesRC = pNew->pSelfRC;
    602653    }
    603654
     
    616667{
    617668    Assert(pPrev ? pPrev->pNextR3 == pRam : pVM->pgm.s.pRamRangesR3 == pRam);
     669    Assert((pRam->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pRam->pSelfR0 == MMHyperCCToR0(pVM, pRam));
     670    Assert((pRam->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) || pRam->pSelfRC == MMHyperCCToRC(pVM, pRam));
    618671
    619672    pgmLock(pVM);
     
    623676    {
    624677        pPrev->pNextR3 = pNext;
    625         pPrev->pNextR0 = pNext ? MMHyperCCToR0(pVM, pNext) : NIL_RTR0PTR;
    626         pPrev->pNextRC = pNext ? MMHyperCCToRC(pVM, pNext) : NIL_RTRCPTR;
     678        pPrev->pNextR0 = pNext ? pNext->pSelfR0 : NIL_RTR0PTR;
     679        pPrev->pNextRC = pNext ? pNext->pSelfRC : NIL_RTRCPTR;
    627680    }
    628681    else
     
    630683        Assert(pVM->pgm.s.pRamRangesR3 == pRam);
    631684        pVM->pgm.s.pRamRangesR3 = pNext;
    632         pVM->pgm.s.pRamRangesR0 = pNext ? MMHyperCCToR0(pVM, pNext) : NIL_RTR0PTR;
    633         pVM->pgm.s.pRamRangesRC = pNext ? MMHyperCCToRC(pVM, pNext) : NIL_RTRCPTR;
     685        pVM->pgm.s.pRamRangesR0 = pNext ? pNext->pSelfR0 : NIL_RTR0PTR;
     686        pVM->pgm.s.pRamRangesRC = pNext ? pNext->pSelfRC : NIL_RTRCPTR;
    634687    }
    635688
     
    646699static void pgmR3PhysUnlinkRamRange(PVM pVM, PPGMRAMRANGE pRam)
    647700{
     701    pgmLock(pVM);
     702
    648703    /* find prev. */
    649704    PPGMRAMRANGE pPrev = NULL;
     
    657712
    658713    pgmR3PhysUnlinkRamRange2(pVM, pRam, pPrev);
     714
     715    pgmUnlock(pVM);
    659716}
    660717
     
    702759}
    703760#endif /* VBOX_WITH_NEW_PHYS_CODE */
     761
     762
     763/**
     764 * PGMR3PhysRegisterRam worker that initializes and links a RAM range.
     765 *
     766 * @param   pVM             The VM handle.
     767 * @param   pNew            The new RAM range.
     768 * @param   GCPhys          The address of the RAM range.
     769 * @param   GCPhysLast      The last address of the RAM range.
     770 * @param   RCPtrNew        The RC address if the range is floating. NIL_RTRCPTR
     771 *                          if in HMA.
     772 * @param   R0PtrNew        Ditto for R0.
     773 * @param   pszDesc         The description.
     774 * @param   pPrev           The previous RAM range (for linking).
     775 */
     776static void pgmR3PhysInitAndLinkRamRange(PVM pVM, PPGMRAMRANGE pNew, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
     777                                         RTRCPTR RCPtrNew, RTR0PTR R0PtrNew, const char *pszDesc, PPGMRAMRANGE pPrev)
     778{
     779    /*
     780     * Initialize the range.
     781     */
     782    pNew->pSelfR0       = R0PtrNew != NIL_RTR0PTR ? R0PtrNew : MMHyperCCToR0(pVM, pNew);
     783    pNew->pSelfRC       = RCPtrNew != NIL_RTRCPTR ? RCPtrNew : MMHyperCCToRC(pVM, pNew);
     784    pNew->GCPhys        = GCPhys;
     785    pNew->GCPhysLast    = GCPhysLast;
     786    pNew->cb            = GCPhysLast - GCPhys + 1;
     787    pNew->pszDesc       = pszDesc;
     788    pNew->fFlags        = RCPtrNew != NIL_RTR0PTR ? PGM_RAM_RANGE_FLAGS_FLOATING : 0;
     789    pNew->pvR3          = NULL;
     790
     791    uint32_t const cPages = pNew->cb >> PAGE_SHIFT;
     792    RTGCPHYS iPage = cPages;
     793    while (iPage-- > 0)
     794        PGM_PAGE_INIT_ZERO(&pNew->aPages[iPage], pVM, PGMPAGETYPE_RAM);
     795
     796    /* Update the page count stats. */
     797    pVM->pgm.s.cZeroPages += cPages;
     798    pVM->pgm.s.cAllPages  += cPages;
     799
     800    /*
     801     * Link it.
     802     */
     803    pgmR3PhysLinkRamRange(pVM, pNew, pPrev);
     804}
     805
     806
     807/**
     808 * Relocate a floating RAM range.
     809 *
     810 * @copydoc FNPGMRELOCATE.
     811 */
     812static DECLCALLBACK(bool) pgmR3PhysRamRangeRelocate(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser)
     813{
     814    PPGMRAMRANGE pRam = (PPGMRAMRANGE)pvUser;
     815    Assert(pRam->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING);
     816    Assert(pRam->pSelfRC == GCPtrOld + PAGE_SIZE);
     817
     818    switch (enmMode)
     819    {
     820        case PGMRELOCATECALL_SUGGEST:
     821            return true;
     822        case PGMRELOCATECALL_RELOCATE:
     823        {
     824            /* Update myself and then relink all the ranges. */
     825            pgmLock(pVM);
     826            pRam->pSelfRC = (RTRCPTR)(GCPtrNew + PAGE_SIZE);
     827            pgmR3PhysRelinkRamRanges(pVM);
     828            pgmUnlock(pVM);
     829            return true;
     830        }
     831
     832        default:
     833            AssertFailedReturn(false);
     834    }
     835}
     836
     837
     838/**
     839 * PGMR3PhysRegisterRam worker that registers a high chunk.
     840 *
     841 * @returns VBox status code.
     842 * @param   pVM             The VM handle.
     843 * @param   GCPhys          The address of the RAM.
     844 * @param   cRamPages       The number of RAM pages to register.
     845 * @param   cbChunk         The size of the PGMRAMRANGE guest mapping.
     846 * @param   iChunk          The chunk number.
     847 * @param   pszDesc         The RAM range description.
     848 * @param   ppPrev          Previous RAM range pointer. In/Out.
     849 */
     850static int pgmR3PhysRegisterHighRamChunk(PVM pVM, RTGCPHYS GCPhys, uint32_t cRamPages,
     851                                         uint32_t cbChunk, uint32_t iChunk, const char *pszDesc,
     852                                         PPGMRAMRANGE *ppPrev)
     853{
     854    const char *pszDescChunk = iChunk == 0
     855                             ? pszDesc
     856                             : MMR3HeapAPrintf(pVM, MM_TAG_PGM_PHYS, "%s (#%u)", pszDesc, iChunk + 1);
     857    AssertReturn(pszDescChunk, VERR_NO_MEMORY);
     858
     859    /*
     860     * Allocate memory for the new chunk.
     861     */
     862    size_t const cChunkPages  = RT_ALIGN_Z(RT_UOFFSETOF(PGMRAMRANGE, aPages[cRamPages]), PAGE_SIZE) >> PAGE_SHIFT;
     863    PSUPPAGE     paChunkPages = (PSUPPAGE)RTMemTmpAllocZ(sizeof(SUPPAGE) * cChunkPages);
     864    AssertReturn(paChunkPages, VERR_NO_TMP_MEMORY);
     865    RTR0PTR      R0PtrChunk   = NIL_RTR0PTR;
     866    void        *pvChunk      = NULL;
     867    int rc = SUPR3PageAllocEx(cChunkPages, 0 /*fFlags*/, &pvChunk,
     868#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     869                              VMMIsHwVirtExtForced(pVM) ? &pvR0 : NULL,
     870#else
     871                              NULL,
     872#endif
     873                              paChunkPages);
     874    if (RT_SUCCESS(rc))
     875    {
     876#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
     877        if (!VMMIsHwVirtExtForced(pVM))
     878            R0PtrChunk = NIL_RTR0PTR;
     879#else
     880        R0PtrChunk = (uintptr_t)pvChunk;
     881#endif
     882        memset(pvChunk, 0, cChunkPages << PAGE_SHIFT);
     883
     884        PPGMRAMRANGE pNew = (PPGMRAMRANGE)pvChunk;
     885
     886        /*
     887         * Create a mapping and map the pages into it.
     888         * We push these in below the HMA.
     889         */
     890        RTGCPTR GCPtrChunkMap = pVM->pgm.s.GCPtrPrevRamRangeMapping - cbChunk;
     891        rc = PGMR3MapPT(pVM, GCPtrChunkMap, cbChunk, 0 /*fFlags*/, pgmR3PhysRamRangeRelocate, pNew, pszDescChunk);
     892        if (RT_SUCCESS(rc))
     893        {
     894            pVM->pgm.s.GCPtrPrevRamRangeMapping = GCPtrChunkMap;
     895
     896            RTGCPTR const   GCPtrChunk = GCPtrChunkMap + PAGE_SIZE;
     897            RTGCPTR         GCPtrPage  = GCPtrChunk;
     898            for (uint32_t iPage = 0; iPage < cChunkPages && RT_SUCCESS(rc); iPage++, GCPtrPage += PAGE_SIZE)
     899                rc = PGMMap(pVM, GCPtrPage, paChunkPages[iPage].Phys, PAGE_SIZE, 0);
     900            if (RT_SUCCESS(rc))
     901            {
     902                /*
     903                 * Ok, init and link the range.
     904                 */
     905                pgmR3PhysInitAndLinkRamRange(pVM, pNew, GCPhys, GCPhys + ((RTGCPHYS)cRamPages << PAGE_SHIFT) - 1,
     906                                             (RTRCPTR)GCPtrChunk, R0PtrChunk, pszDescChunk, *ppPrev);
     907                *ppPrev = pNew;
     908            }
     909        }
     910
     911        if (RT_FAILURE(rc))
     912            SUPR3PageFreeEx(pvChunk, cChunkPages);
     913    }
     914
     915    RTMemTmpFree(paChunkPages);
     916    return rc;
     917}
    704918
    705919
     
    759973        return rc;
    760974
    761     /*
    762      * Allocate RAM range.
    763      */
    764     const size_t cbRamRange = RT_OFFSETOF(PGMRAMRANGE, aPages[cPages]);
    765     PPGMRAMRANGE pNew;
    766     rc = MMR3HyperAllocOnceNoRel(pVM, cbRamRange, 0, MM_TAG_PGM_PHYS, (void **)&pNew);
    767     AssertLogRelMsgRCReturn(rc, ("cbRamRange=%zu\n", cbRamRange), rc);
    768 
    769     /*
    770      * Initialize the range.
    771      */
    772     pNew->GCPhys        = GCPhys;
    773     pNew->GCPhysLast    = GCPhysLast;
    774     pNew->pszDesc       = pszDesc;
    775     pNew->cb            = cb;
    776     pNew->fFlags        = 0;
    777 
    778     pNew->pvR3          = NULL;
     975#ifdef VBOX_WITH_NEW_PHYS_CODE
     976    if (    GCPhys >= _4G
     977        &&  cPages > 256)
     978    {
     979        /*
     980         * The PGMRAMRANGE structures for the high memory can get very big.
     981         * In order to avoid SUPR3PageAllocEx allocation failures due to the
     982         * allocation size limit there and also to avoid being unable to find
     983         * guest mapping space for them, we split this memory up into 4MB in
     984         * (potential) raw-mode configs and 16MB chunks in forced AMD-V/VT-x
     985         * mode.
     986         *
     987         * The first and last page of each mapping are guard pages and marked
     988         * not-present. So, we've got 4186112 and 16769024 bytes available for
     989         * the PGMRAMRANGE structure.
     990         *
     991         * Note! The sizes used here will influence the saved state.
     992         */
     993        uint32_t cbChunk;
     994        uint32_t cPagesPerChunk;
     995        if (VMMIsHwVirtExtForced(pVM))
     996        {
     997            cbChunk = 16U*_1M;
     998            cPagesPerChunk = 1048048; /* max ~1048059 */
     999            AssertCompile(sizeof(PGMRAMRANGE) + sizeof(PGMPAGE) * 1048048 < 16U*_1M - PAGE_SIZE * 2);
     1000        }
     1001        else
     1002        {
     1003            cbChunk = 4U*_1M;
     1004            cPagesPerChunk = 261616; /* max ~261627 */
     1005            AssertCompile(sizeof(PGMRAMRANGE) + sizeof(PGMPAGE) * 261616  <  4U*_1M - PAGE_SIZE * 2);
     1006        }
     1007        AssertRelease(RT_UOFFSETOF(PGMRAMRANGE, aPages[cPagesPerChunk]) + PAGE_SIZE * 2 <= cbChunk);
     1008
     1009        RTGCPHYS cPagesLeft  = cPages;
     1010        RTGCPHYS GCPhysChunk = GCPhys;
     1011        uint32_t iChunk      = 0;
     1012        while (cPagesLeft > 0)
     1013        {
     1014            uint32_t cPagesInChunk = cPagesLeft;
     1015            if (cPagesInChunk > cPagesPerChunk)
     1016                cPagesInChunk = cPagesPerChunk;
     1017
     1018            rc = pgmR3PhysRegisterHighRamChunk(pVM, GCPhysChunk, cPagesInChunk, cbChunk, iChunk, pszDesc, &pPrev);
     1019            AssertRCReturn(rc, rc);
     1020
     1021            /* advance */
     1022            GCPhysChunk += (RTGCPHYS)cPagesInChunk << PAGE_SHIFT;
     1023            cPagesLeft  -= cPagesInChunk;
     1024            iChunk++;
     1025        }
     1026    }
     1027    else
     1028#endif
     1029    {
     1030        /*
     1031         * Allocate, initialize and link the new RAM range.
     1032         */
     1033        const size_t cbRamRange = RT_OFFSETOF(PGMRAMRANGE, aPages[cPages]);
     1034        PPGMRAMRANGE pNew;
     1035        rc = MMR3HyperAllocOnceNoRel(pVM, cbRamRange, 0, MM_TAG_PGM_PHYS, (void **)&pNew);
     1036        AssertLogRelMsgRCReturn(rc, ("cbRamRange=%zu\n", cbRamRange), rc);
     1037
    7791038#ifndef VBOX_WITH_NEW_PHYS_CODE
    780     pNew->paChunkR3Ptrs = NULL;
    781 
    782     /* Allocate memory for chunk to HC ptr lookup array. */
    783     rc = MMHyperAlloc(pVM, (cb >> PGM_DYNAMIC_CHUNK_SHIFT) * sizeof(void *), 16, MM_TAG_PGM, (void **)&pNew->paChunkR3Ptrs);
    784     AssertRCReturn(rc, rc);
    785     pNew->fFlags |= MM_RAM_FLAGS_DYNAMIC_ALLOC;
    786 
     1039        /* Allocate memory for chunk to HC ptr lookup array. */
     1040        pNew->paChunkR3Ptrs = NULL;
     1041        rc = MMHyperAlloc(pVM, (cb >> PGM_DYNAMIC_CHUNK_SHIFT) * sizeof(void *), 16, MM_TAG_PGM, (void **)&pNew->paChunkR3Ptrs);
     1042        AssertRCReturn(rc, rc);
     1043        pNew->fFlags |= MM_RAM_FLAGS_DYNAMIC_ALLOC;
    7871044#endif
    788     RTGCPHYS iPage = cPages;
    789     while (iPage-- > 0)
    790         PGM_PAGE_INIT_ZERO(&pNew->aPages[iPage], pVM, PGMPAGETYPE_RAM);
    791 
    792     /* Update the page count stats. */
    793     pVM->pgm.s.cZeroPages += cPages;
    794     pVM->pgm.s.cAllPages  += cPages;
    795 
    796     /*
    797      * Insert the new RAM range.
    798      */
    799     pgmR3PhysLinkRamRange(pVM, pNew, pPrev);
     1045
     1046        pgmR3PhysInitAndLinkRamRange(pVM, pNew, GCPhys, GCPhysLast, NIL_RTRCPTR, NIL_RTR0PTR, pszDesc, pPrev);
     1047    }
    8001048
    8011049    /*
     
    8371085    for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesR3; pRam; pRam = pRam->pNextR3)
    8381086    {
    839         uint32_t    iPage = pRam->cb >> PAGE_SHIFT; Assert((RTGCPHYS)iPage << PAGE_SHIFT == pRam->cb);
     1087        uint32_t iPage = pRam->cb >> PAGE_SHIFT;
     1088        AssertMsg(((RTGCPHYS)iPage << PAGE_SHIFT) == pRam->cb, ("%RGp %RGp\n", (RTGCPHYS)iPage << PAGE_SHIFT, pRam->cb));
     1089
    8401090#ifdef VBOX_WITH_NEW_PHYS_CODE
    8411091        if (!pVM->pgm.s.fRamPreAlloc)
     
    10671317
    10681318        /* Initialize the range. */
     1319        pNew->pSelfR0       = MMHyperCCToR0(pVM, pNew);
     1320        pNew->pSelfRC       = MMHyperCCToRC(pVM, pNew);
    10691321        pNew->GCPhys        = GCPhys;
    10701322        pNew->GCPhysLast    = GCPhysLast;
     1323        pNew->cb            = cb;
    10711324        pNew->pszDesc       = pszDesc;
    1072         pNew->cb            = cb;
    1073         pNew->fFlags        = 0; /* Some MMIO flag here? */
     1325        pNew->fFlags        = 0; /** @todo add some kind of ad-hoc flag? */
    10741326
    10751327        pNew->pvR3          = NULL;
     
    12901542
    12911543    const uint32_t cPages = cb >> PAGE_SHIFT;
    1292     AssertLogRelReturn((RTGCPHYS)cPages << PAGE_SHIFT == cb, VERR_INVALID_PARAMETER);
     1544    AssertLogRelReturn(((RTGCPHYS)cPages << PAGE_SHIFT) == cb, VERR_INVALID_PARAMETER);
    12931545    AssertLogRelReturn(cPages <= INT32_MAX / 2, VERR_NO_MEMORY);
    12941546
     
    13181570        if (RT_SUCCESS(rc))
    13191571        {
    1320             pNew->pDevInsR3 = pDevIns;
    1321             pNew->pvR3 = pvPages;
    1322             //pNew->pNext = NULL;
    1323             //pNew->fMapped = false;
    1324             //pNew->fOverlapping = false;
    1325             pNew->iRegion = iRegion;
    1326             pNew->RamRange.GCPhys = NIL_RTGCPHYS;
    1327             pNew->RamRange.GCPhysLast = NIL_RTGCPHYS;
    1328             pNew->RamRange.pszDesc = pszDesc;
    1329             pNew->RamRange.cb = cb;
    1330             //pNew->RamRange.fFlags = 0;
    1331 
    1332             pNew->RamRange.pvR3 = pvPages;       ///@todo remove this [new phys code]
     1572            pNew->pDevInsR3             = pDevIns;
     1573            pNew->pvR3                  = pvPages;
     1574            //pNew->pNext               = NULL;
     1575            //pNew->fMapped             = false;
     1576            //pNew->fOverlapping        = false;
     1577            pNew->iRegion               = iRegion;
     1578            pNew->RamRange.pSelfR0      = MMHyperCCToR0(pVM, &pNew->RamRange);
     1579            pNew->RamRange.pSelfRC      = MMHyperCCToRC(pVM, &pNew->RamRange);
     1580            pNew->RamRange.GCPhys       = NIL_RTGCPHYS;
     1581            pNew->RamRange.GCPhysLast   = NIL_RTGCPHYS;
     1582            pNew->RamRange.pszDesc      = pszDesc;
     1583            pNew->RamRange.cb           = cb;
     1584            //pNew->RamRange.fFlags     = 0; /// @todo MMIO2 flag?
     1585
     1586            pNew->RamRange.pvR3         = pvPages;
    13331587#ifndef VBOX_WITH_NEW_PHYS_CODE
    1334             pNew->RamRange.paChunkR3Ptrs = NULL; ///@todo remove this [new phys code]
     1588            pNew->RamRange.paChunkR3Ptrs = NULL;
    13351589#endif
    13361590
     
    18802134        {
    18812135            AssertLogRelMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM,
    1882                                   ("%RGp isn't a RAM page (%d) - registering %RGp-%RGp (%s).\n",
    1883                                    GCPhys, PGM_PAGE_GET_TYPE(pPage), GCPhys, GCPhysLast, pszDesc),
    1884                                   VERR_PGM_RAM_CONFLICT);
     2136                                  ("%RGp (%R[pgmpage]) isn't a RAM page - registering %RGp-%RGp (%s).\n",
     2137                                   pRam->GCPhys + (RTGCPTR)(uintptr_t)(pPage - &pRam->aPages[0]) << PAGE_SHIFT,
     2138                                   pPage, GCPhys, GCPhysLast, pszDesc), VERR_PGM_RAM_CONFLICT);
    18852139            Assert(PGM_PAGE_IS_ZERO(pPage));
    18862140            pPage++;
     
    19442198            if (!fRamExists)
    19452199            {
     2200                pRamNew->pSelfR0       = MMHyperCCToR0(pVM, pRamNew);
     2201                pRamNew->pSelfRC       = MMHyperCCToRC(pVM, pRamNew);
    19462202                pRamNew->GCPhys        = GCPhys;
    19472203                pRamNew->GCPhysLast    = GCPhysLast;
     2204                pRamNew->cb            = cb;
    19482205                pRamNew->pszDesc       = pszDesc;
    1949                 pRamNew->cb            = cb;
    19502206                pRamNew->fFlags        = 0;
    19512207                pRamNew->pvR3          = NULL;
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