Changeset 19076 in vbox for trunk/src/VBox/VMM

Timestamp:

Apr 21, 2009 1:20:48 PM (16 years ago)

Author:

vboxsync

Message:

CPUMGetGuestCpuId needs a pVCpu parameter.

Location:

trunk/src/VBox/VMM

Files:

• EM.cpp (modified) (2 diffs)
• PDMDevHlp.cpp (modified) (1 diff)
• PGM.cpp (modified) (2 diffs)
• VMMAll/CPUMAllRegs.cpp (modified) (3 diffs)
• VMMAll/EMAll.cpp (modified) (6 diffs)

trunk/src/VBox/VMM/EM.cpp

@@ -1644 +1644 @@
         {
             uint32_t u32Dummy, u32Features, u32ExtFeatures;
-            CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32ExtFeatures, &u32Features);
+            CPUMGetGuestCpuId(pVCpu, 1, &u32Dummy, &u32Dummy, &u32ExtFeatures, &u32Features);
             if (u32ExtFeatures & X86_CPUID_FEATURE_ECX_MONITOR)
             {
@@ -3100 +3100 @@
         uint32_t u32Dummy, u32Features;
 
-        CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
+        CPUMGetGuestCpuId(pVCpu, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
         if (!(u32Features & X86_CPUID_FEATURE_EDX_PAE))
             return EMSTATE_REM;

trunk/src/VBox/VMM/PDMDevHlp.cpp

@@ -2535 +2535 @@
     AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
 
-    CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
+    CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
 
     LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",

trunk/src/VBox/VMM/PGM.cpp

@@ -1941 +1941 @@
     /** @todo How to test for the 40 bits support? Long mode seems to be the test criterium. */
     uint32_t u32Dummy, u32Features;
-    CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
+    CPUMGetGuestCpuId(VMMGetCpu(pVM), 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
 
     if (u32Features & X86_CPUID_FEATURE_EDX_PSE36)
@@ -3976 +3976 @@
             uint32_t u32Dummy, u32Features;
 
-            CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
+            CPUMGetGuestCpuId(VMMGetCpu(pVM), 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
             if (!(u32Features & X86_CPUID_FEATURE_EDX_PAE))
                 return VMSetRuntimeError(pVM, VMSETRTERR_FLAGS_FATAL, "PAEmode",

trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

@@ -1044 +1044 @@
  * Gets a CpuId leaf.
  *
- * @param   pVM     The VM handle.
+ * @param   pVCpu   The VMCPU handle.
  * @param   iLeaf   The CPUID leaf to get.
  * @param   pEax    Where to store the EAX value.
@@ -1051 +1051 @@
  * @param   pEdx    Where to store the EDX value.
  */
-VMMDECL(void) CPUMGetGuestCpuId(PVM pVM, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
-{
+VMMDECL(void) CPUMGetGuestCpuId(PVMCPU pVCpu, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
+{
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
+
     PCCPUMCPUID pCpuId;
     if (iLeaf < RT_ELEMENTS(pVM->cpum.s.aGuestCpuIdStd))
@@ -1067 +1069 @@
     *pEcx = pCpuId->ecx;
     *pEdx = pCpuId->edx;
+
+    if (    iLeaf == 1
+        &&  pVM->cCPUs > 1)
+    {
+        /* Bits 31-24: Initial APIC ID */
+        Assert(pVCpu->idCpu <= 255);
+        *pEbx |= (pVCpu->idCpu << 24);
+    }
+
     Log2(("CPUMGetGuestCpuId: iLeaf=%#010x %RX32 %RX32 %RX32 %RX32\n", iLeaf, *pEax, *pEbx, *pEcx, *pEdx));
 }

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -1945 +1945 @@
 
     /* Note: operates the same in 64 and non-64 bits mode. */
-    CPUMGetGuestCpuId(pVM, iLeaf, &pRegFrame->eax, &pRegFrame->ebx, &pRegFrame->ecx, &pRegFrame->edx);
+    CPUMGetGuestCpuId(pVCpu, iLeaf, &pRegFrame->eax, &pRegFrame->ebx, &pRegFrame->ecx, &pRegFrame->edx);
     Log(("Emulate: CPUID %x -> %08x %08x %08x %08x\n", iLeaf, pRegFrame->eax, pRegFrame->ebx, pRegFrame->ecx, pRegFrame->edx));
     return VINF_SUCCESS;
@@ -2657 +2657 @@
         return VERR_EM_INTERPRETER; /* supervisor only */
 
-    CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32ExtFeatures, &u32Dummy);
+    CPUMGetGuestCpuId(pVCpu, 1, &u32Dummy, &u32Dummy, &u32ExtFeatures, &u32Dummy);
     if (!(u32ExtFeatures & X86_CPUID_FEATURE_ECX_MONITOR))
         return VERR_EM_INTERPRETER; /* not supported */
@@ -2681 +2681 @@
         return VERR_EM_INTERPRETER; /* supervisor only */
 
-    CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32ExtFeatures, &u32Dummy);
+    CPUMGetGuestCpuId(pVCpu, 1, &u32Dummy, &u32Dummy, &u32ExtFeatures, &u32Dummy);
     if (!(u32ExtFeatures & X86_CPUID_FEATURE_ECX_MONITOR))
         return VERR_EM_INTERPRETER; /* not supported */
@@ -2792 +2792 @@
         return VERR_EM_INTERPRETER; /* supervisor only */
 
-    CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
+    CPUMGetGuestCpuId(pVCpu, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
     if (!(u32Features & X86_CPUID_FEATURE_EDX_MSR))
         return VERR_EM_INTERPRETER; /* not supported */
@@ -2926 +2926 @@
         return VERR_EM_INTERPRETER; /* supervisor only */
 
-    CPUMGetGuestCpuId(pVM, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
+    CPUMGetGuestCpuId(pVCpu, 1, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
     if (!(u32Features & X86_CPUID_FEATURE_EDX_MSR))
         return VERR_EM_INTERPRETER; /* not supported */
@@ -2963 +2963 @@
 
         /* Filter out those bits the guest is allowed to change. (e.g. LMA is read-only) */
-        CPUMGetGuestCpuId(pVM, 0x80000001, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
+        CPUMGetGuestCpuId(pVCpu, 0x80000001, &u32Dummy, &u32Dummy, &u32Dummy, &u32Features);
         if (u32Features & X86_CPUID_AMD_FEATURE_EDX_NX)
             uMask |= MSR_K6_EFER_NXE;