Changeset 21649 in vbox for trunk/src/VBox/VMM

Timestamp:

Jul 16, 2009 1:44:57 PM (16 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

50182

Message:

Patching updates (not enabled)

Location:

trunk/src/VBox/VMM

Files:

• HWACCM.cpp (modified) (6 diffs)
• HWACCMInternal.h (modified) (5 diffs)
• VMM.cpp (modified) (2 diffs)
• VMMAll/VMMAll.cpp (modified) (1 diff)
• VMMR0/HWSVMR0.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/HWACCM.cpp

@@ -1387 +1387 @@
  * @returns VBox status code.
  * @param   pVM         The VM to operate on.
- */
-VMMR3DECL(int)  HWACMMR3EnablePatching(PVM pVM)
-{
+ * @param   pPatchMem   Patch memory range
+ * @param   cbPatchMem  Size of the memory range
+ */
+VMMR3DECL(int)  HWACMMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
+{
+    /* Current TPR patching only applies to AMD cpus.
+     * May need to be extended to Intel CPUs without the APIC TPR hardware optimization.
+     */
+    if (CPUMGetCPUVendor(pVM) != CPUMCPUVENDOR_AMD)
+        return VERR_NOT_SUPPORTED;
+
+    pVM->hwaccm.s.pGuestPatchMem  = pPatchMem;
+    pVM->hwaccm.s.cbGuestPatchMem = cbPatchMem;
     return VINF_SUCCESS;
 }
@@ -1398 +1408 @@
  * @returns VBox status code.
  * @param   pVM         The VM to operate on.
- */
-VMMR3DECL(int)  HWACMMR3DisablePatching(PVM pVM)
-{
+ * @param   pPatchMem   Patch memory range
+ * @param   cbPatchMem  Size of the memory range
+ */
+VMMR3DECL(int)  HWACMMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
+{
+    pVM->hwaccm.s.pGuestPatchMem  = 0;
+    pVM->hwaccm.s.cbGuestPatchMem = 0;
     return VINF_SUCCESS;
 }
@@ -1800 +1814 @@
         AssertRCReturn(rc, rc);
     }
-
+#ifdef VBOX_HWACCM_WITH_GUEST_PATCHING
+    rc = SSMR3PutGCPtr(pSSM, pVM->hwaccm.s.pGuestPatchMem);
+    AssertRCReturn(rc, rc);
+    rc = SSMR3PutGCPtr(pSSM, pVM->hwaccm.s.pFreeGuestPatchMem);
+    AssertRCReturn(rc, rc);
+    rc = SSMR3PutU32(pSSM, pVM->hwaccm.s.cbGuestPatchMem);
+    AssertRCReturn(rc, rc);
+
+    /* Store all the guest patch records too. */
+    rc = SSMR3GetU32(pSSM, &pVM->hwaccm.s.svm.cPatches);
+    AssertRCReturn(rc, rc);
+
+    for (unsigned i = 0; i < pVM->hwaccm.s.svm.cPatches; i++)
+    {
+        PHWACCMTPRPATCH pPatch = &pVM->hwaccm.s.svm.aPatches[i];
+
+        rc = SSMR3PutU32(pSSM, pPatch->Core.Key);
+        AssertRCReturn(rc, rc);
+
+        rc = SSMR3PutU32(pSSM, pPatch->cbOp);
+        AssertRCReturn(rc, rc);
+
+        AssertCompile(sizeof(HWACCMTPRINSTR) == sizeof(uint32_t));
+        rc = SSMR3PutU32(pSSM, (uint32_t)&pPatch->enmType);
+        AssertRCReturn(rc, rc);
+
+        rc = SSMR3PutU32(pSSM, pPatch->uSrcOperand);
+        AssertRCReturn(rc, rc);
+
+        rc = SSMR3PutU32(pSSM, pPatch->uDstOperand);
+        AssertRCReturn(rc, rc);
+
+        rc = SSMR3PutU32(pSSM, pPatch->pJumpTarget);
+        AssertRCReturn(rc, rc);
+
+        rc = SSMR3PutU32(pSSM, pPatch->cFaults);
+        AssertRCReturn(rc, rc);
+    }
+#endif
     return VINF_SUCCESS;
 }
@@ -1822 +1874 @@
      */
     if (   u32Version != HWACCM_SSM_VERSION
+        && u32Version != HWACCM_SSM_VERSION_NO_PATCHING
         && u32Version != HWACCM_SSM_VERSION_2_0_X)
     {
@@ -1836 +1889 @@
         AssertRCReturn(rc, rc);
 
-        if (u32Version >= HWACCM_SSM_VERSION)
+        if (u32Version >= HWACCM_SSM_VERSION_NO_PATCHING)
         {
             uint32_t val;
@@ -1853 +1906 @@
         }
     }
+#ifdef VBOX_HWACCM_WITH_GUEST_PATCHING
+    if (u32Version > HWACCM_SSM_VERSION_NO_PATCHING)
+    {
+        rc = SSMR3GetGCPtr(pSSM, &pVM->hwaccm.s.pGuestPatchMem);
+        AssertRCReturn(rc, rc);
+        rc = SSMR3GetGCPtr(pSSM, &pVM->hwaccm.s.pFreeGuestPatchMem);
+        AssertRCReturn(rc, rc);
+        rc = SSMR3GetU32(pSSM, &pVM->hwaccm.s.cbGuestPatchMem);
+        AssertRCReturn(rc, rc);
+
+        /* Fetch all TPR patch records. */
+        rc = SSMR3GetU32(pSSM, &pVM->hwaccm.s.svm.cPatches);
+        AssertRCReturn(rc, rc);
+
+        for (unsigned i = 0; i < pVM->hwaccm.s.svm.cPatches; i++)
+        {
+            PHWACCMTPRPATCH pPatch = &pVM->hwaccm.s.svm.aPatches[i];
+
+            rc = SSMR3GetU32(pSSM, &pPatch->Core.Key);
+            AssertRCReturn(rc, rc);
+
+            rc = SSMR3GetU32(pSSM, &pPatch->cbOp);
+            AssertRCReturn(rc, rc);
+
+            AssertCompile(sizeof(HWACCMTPRINSTR) == sizeof(uint32_t));
+            rc = SSMR3GetU32(pSSM, (uint32_t *)&pPatch->enmType);
+            AssertRCReturn(rc, rc);
+
+            rc = SSMR3GetU32(pSSM, &pPatch->uSrcOperand);
+            AssertRCReturn(rc, rc);
+
+            rc = SSMR3GetU32(pSSM, &pPatch->uDstOperand);
+            AssertRCReturn(rc, rc);
+
+            rc = SSMR3GetU32(pSSM, &pPatch->cFaults);
+            AssertRCReturn(rc, rc);
+
+            rc = SSMR3GetU32(pSSM, &pPatch->pJumpTarget);
+            AssertRCReturn(rc, rc);
+            
+            rc = RTAvloU32Insert(&pVM->hwaccm.s.svm.PatchTree, &pPatch->Core);
+            AssertRC(rc);
+        }
+    }
+#endif
     return VINF_SUCCESS;
 }

trunk/src/VBox/VMM/HWACCMInternal.h

@@ -132 +132 @@
 #define HWACCM_VTX_TOTAL_DEVHEAP_MEM        (HWACCM_EPT_IDENTITY_PG_TABLE_SIZE + HWACCM_VTX_TSS_SIZE)
 
+/* Enable for TPR guest patching. */
+//#define VBOX_HWACCM_WITH_GUEST_PATCHING
+
 /** HWACCM SSM version
  */
+#ifdef VBOX_HWACCM_WITH_GUEST_PATCHING
+#define HWACCM_SSM_VERSION                  5
+#define HWACCM_SSM_VERSION_NO_PATCHING      4
+#else
 #define HWACCM_SSM_VERSION                  4
+#define HWACCM_SSM_VERSION_NO_PATCHING      4
+#endif
 #define HWACCM_SSM_VERSION_2_0_X            3
 
@@ -188 +197 @@
     HWACCMTPRINSTR_WRITE_REG,
     HWACCMTPRINSTR_WRITE_IMM,
-    HWACCMTPRINSTR_MOV,
+    HWACCMTPRINSTR_JUMP_REPLACEMENT,
     /** The usual 32-bit paranoia. */
     HWACCMTPRINSTR_32BIT_HACK   = 0x7fffffff
@@ -209 +218 @@
     /** Number of times the instruction caused a fault. */
     uint32_t                cFaults;
+    /** Patch address of the jump replacement. */
+    RTGCPTR32               pJumpTarget;
 } HWACCMTPRPATCH;
 /** Pointer to HWACCMTPRPATCH. */
@@ -260 +271 @@
      * This number is set much higher when RTThreadPreemptIsPending is reliable. */
     uint32_t                    cMaxResumeLoops;
+
+    /** Guest allocated memory for patching purposes. */
+    RTGCPTR                     pGuestPatchMem;
+    /** Current free pointer inside the patch block. */
+    RTGCPTR                     pFreeGuestPatchMem;
+    /** Size of the guest patch memory block. */
+    uint32_t                    cbGuestPatchMem;
+    uint32_t                    uPadding1;
 
 #if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
@@ -411 +430 @@
          */
         AVLOU32TREE                 PatchTree;
-
         uint32_t                    cPatches;
         HWACCMTPRPATCH              aPatches[64];

trunk/src/VBox/VMM/VMM.cpp

@@ -1315 +1315 @@
 {
     if (HWACCMIsEnabled(pVM))
-        HWACMMR3EnablePatching(pVM);
-
-    return VERR_ACCESS_DENIED;
+        return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
+
+    return VERR_NOT_SUPPORTED;
 }
 
@@ -1331 +1331 @@
 {
     if (HWACCMIsEnabled(pVM))
-    {
-        int rc = HWACMMR3DisablePatching(pVM);
-        if (VBOX_FAILURE(rc))
-            return rc;
-    }
+        return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
 
     return VINF_SUCCESS;

trunk/src/VBox/VMM/VMMAll/VMMAll.cpp

@@ -153 +153 @@
     return pVM->vmm.s.enmSwitcher;
 }
-

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -1737 +1737 @@
             &&  pVM->hwaccm.s.fHasIoApic
             &&  !(errCode & X86_TRAP_PF_P)  /* not present */
-            &&  CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx)) == 0
             &&  !CPUMIsGuestInLongModeEx(pCtx))
         {
@@ -1743 +1742 @@
             PDMApicGetBase(pVM, &GCPhysApicBase);   /* @todo cache this */
             GCPhysApicBase &= PAGE_BASE_GC_MASK;
+
+            Assert(CPUMGetGuestCPL(pVCpu, CPUMCTX2CORE(pCtx)) == 0);
 
             if (uFaultAddress == GCPhysApicBase + 0x80)