Changeset 22584 in vbox for trunk/src/VBox/Devices/Serial/DevSerial.cpp
- Timestamp:
- Aug 31, 2009 6:38:57 AM (15 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Serial/DevSerial.cpp
r22480 r22584 72 72 #define SERIAL_SAVED_STATE_VERSION 3 73 73 74 #define UART_LCR_DLAB 0x80/* Divisor latch access bit */75 76 #define UART_IER_MSI 0x08/* Enable Modem status interrupt */77 #define UART_IER_RLSI 0x04/* Enable receiver line status interrupt */78 #define UART_IER_THRI 0x02/* Enable Transmitter holding register int. */79 #define UART_IER_RDI 0x01/* Enable receiver data interrupt */80 81 #define UART_IIR_NO_INT 0x01/* No interrupts pending */82 #define UART_IIR_ID 0x06/* Mask for the interrupt ID */83 84 #define UART_IIR_MSI 0x00/* Modem status interrupt */85 #define UART_IIR_THRI 0x02/* Transmitter holding register empty */86 #define UART_IIR_RDI 0x04/* Receiver data interrupt */87 #define UART_IIR_RLSI 0x06/* Receiver line status interrupt */74 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ 75 76 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ 77 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ 78 #define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ 79 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ 80 81 #define UART_IIR_NO_INT 0x01 /* No interrupts pending */ 82 #define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ 83 84 #define UART_IIR_MSI 0x00 /* Modem status interrupt */ 85 #define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ 86 #define UART_IIR_RDI 0x04 /* Receiver data interrupt */ 87 #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ 88 88 89 89 /* 90 90 * These are the definitions for the Modem Control Register 91 91 */ 92 #define UART_MCR_LOOP 0x10/* Enable loopback test mode */93 #define UART_MCR_OUT2 0x08/* Out2 complement */94 #define UART_MCR_OUT1 0x04/* Out1 complement */95 #define UART_MCR_RTS 0x02/* RTS complement */96 #define UART_MCR_DTR 0x01/* DTR complement */92 #define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ 93 #define UART_MCR_OUT2 0x08 /* Out2 complement */ 94 #define UART_MCR_OUT1 0x04 /* Out1 complement */ 95 #define UART_MCR_RTS 0x02 /* RTS complement */ 96 #define UART_MCR_DTR 0x01 /* DTR complement */ 97 97 98 98 /* 99 99 * These are the definitions for the Modem Status Register 100 100 */ 101 #define UART_MSR_DCD 0x80/* Data Carrier Detect */102 #define UART_MSR_RI 0x40/* Ring Indicator */103 #define UART_MSR_DSR 0x20/* Data Set Ready */104 #define UART_MSR_CTS 0x10/* Clear to Send */105 #define UART_MSR_DDCD 0x08/* Delta DCD */106 #define UART_MSR_TERI 0x04/* Trailing edge ring indicator */107 #define UART_MSR_DDSR 0x02/* Delta DSR */108 #define UART_MSR_DCTS 0x01/* Delta CTS */109 #define UART_MSR_ANY_DELTA 0x0F 110 111 #define UART_LSR_TEMT 0x40/* Transmitter empty */112 #define UART_LSR_THRE 0x20/* Transmit-hold-register empty */113 #define UART_LSR_BI 0x10/* Break interrupt indicator */114 #define UART_LSR_FE 0x08/* Frame error indicator */115 #define UART_LSR_PE 0x04/* Parity error indicator */116 #define UART_LSR_OE 0x02/* Overrun error indicator */117 #define UART_LSR_DR 0x01/* Receiver data ready */101 #define UART_MSR_DCD 0x80 /* Data Carrier Detect */ 102 #define UART_MSR_RI 0x40 /* Ring Indicator */ 103 #define UART_MSR_DSR 0x20 /* Data Set Ready */ 104 #define UART_MSR_CTS 0x10 /* Clear to Send */ 105 #define UART_MSR_DDCD 0x08 /* Delta DCD */ 106 #define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ 107 #define UART_MSR_DDSR 0x02 /* Delta DSR */ 108 #define UART_MSR_DCTS 0x01 /* Delta CTS */ 109 #define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ 110 111 #define UART_LSR_TEMT 0x40 /* Transmitter empty */ 112 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ 113 #define UART_LSR_BI 0x10 /* Break interrupt indicator */ 114 #define UART_LSR_FE 0x08 /* Frame error indicator */ 115 #define UART_LSR_PE 0x04 /* Parity error indicator */ 116 #define UART_LSR_OE 0x02 /* Overrun error indicator */ 117 #define UART_LSR_DR 0x01 /* Receiver data ready */ 118 118 119 119
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