Changeset 23366 in vbox
- Timestamp:
- Sep 28, 2009 12:31:50 PM (15 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/HWACCM.cpp
r23244 r23366 406 406 407 407 #ifdef VBOX_WITH_STATISTICS 408 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRPatchSuccess, STAMTYPE_COUNTER, "/HWACCM/TPR/Patch/Success", STAMUNIT_OCCURENCES,"Number of times an instruction was successfully patched.");409 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRPatchFailure, STAMTYPE_COUNTER, "/HWACCM/TPR/Patch/Failed", STAMUNIT_OCCURENCES,"Number of unsuccessful patch attempts.");410 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRReplaceSuccess, STAMTYPE_COUNTER, "/HWACCM/TPR/Replace/Success", STAMUNIT_OCCURENCES,"Number of times an instruction was successfully patched.");411 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRReplaceFailure, STAMTYPE_COUNTER, "/HWACCM/TPR/Replace/Failed", STAMUNIT_OCCURENCES,"Number of unsuccessful patch attempts.");408 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRPatchSuccess, STAMTYPE_COUNTER, "/HWACCM/TPR/Patch/Success", STAMUNIT_OCCURENCES, "Number of times an instruction was successfully patched."); 409 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRPatchFailure, STAMTYPE_COUNTER, "/HWACCM/TPR/Patch/Failed", STAMUNIT_OCCURENCES, "Number of unsuccessful patch attempts."); 410 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRReplaceSuccess, STAMTYPE_COUNTER, "/HWACCM/TPR/Replace/Success",STAMUNIT_OCCURENCES, "Number of times an instruction was successfully patched."); 411 STAM_REG(pVM, &pVM->hwaccm.s.StatTPRReplaceFailure, STAMTYPE_COUNTER, "/HWACCM/TPR/Replace/Failed", STAMUNIT_OCCURENCES, "Number of unsuccessful patch attempts."); 412 412 413 413 /* … … 419 419 int rc; 420 420 421 rc = STAMR3RegisterF(pVM, &pVCpu->hwaccm.s.StatSpinPoke, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "Profiling of VMXR0RunGuestCode entry", 422 "/PROF/HWACCM/CPU%d/PokeWait", i); 423 AssertRC(rc); 424 rc = STAMR3RegisterF(pVM, &pVCpu->hwaccm.s.StatSpinPokeFailed, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "Profiling of VMXR0RunGuestCode entry", 425 "/PROF/HWACCM/CPU%d/PokeWaitFailed", i); 426 AssertRC(rc); 421 427 rc = STAMR3RegisterF(pVM, &pVCpu->hwaccm.s.StatEntry, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "Profiling of VMXR0RunGuestCode entry", 422 428 "/PROF/HWACCM/CPU%d/SwitchToGC", i); -
trunk/src/VBox/VMM/HWACCMInternal.h
r22429 r23366 548 548 bool fActive; 549 549 550 /** Set when the TLB has been checked until we return from the world switch. */ 551 volatile uint8_t fCheckedTLBFlush; 552 uint8_t bAlignment[3]; 553 550 554 /** HWACCM_CHANGED_* flags. */ 551 555 RTUINT fContextUseFlags; 552 556 553 /* Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */557 /** Id of the last cpu we were executing code on (NIL_RTCPUID for the first time) */ 554 558 RTCPUID idLastCpu; 555 559 556 /* TLB flush count */560 /** TLB flush count */ 557 561 RTUINT cTLBFlushes; 558 562 559 /* Current ASID in use by the VM */563 /** Current ASID in use by the VM */ 560 564 RTUINT uCurrentASID; 565 566 /** World switch exit counter. */ 567 volatile uint32_t cWorldSwitchExit; 561 568 562 569 struct … … 758 765 STAMPROFILEADV StatWorldSwitch3264; 759 766 #endif 767 STAMPROFILEADV StatSpinPoke; 768 STAMPROFILEADV StatSpinPokeFailed; 760 769 761 770 STAMCOUNTER StatIntInject; -
trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp
r23201 r23366 59 59 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH); 60 60 #else 61 Be very careful when activating this code! 61 62 if (iPage == RT_ELEMENTS(pVCpu->hwaccm.s.TlbShootdown.aPages)) 62 63 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH); … … 118 119 * 119 120 */ 120 void hwaccmMpPokeCpu(RTCPUID idHostCpu) 121 { 121 void hwaccmMpPokeCpu(PVMCPU pVCpu, RTCPUID idHostCpu) 122 { 123 uint32_t cWorldSwitchExit = pVCpu->hwaccm.s.cWorldSwitchExit; 124 122 125 int rc = RTMpPokeCpu(idHostCpu); 123 # ifndef RT_OS_WINDOWS124 126 /* Not implemented on some platforms (Darwin, Linux kernel < 2.6.19); fall back to a less efficient implementation (broadcast). */ 125 127 if (rc == VERR_NOT_SUPPORTED) 128 { 129 /* synchronous. */ 126 130 RTMpOnSpecific(idHostCpu, hwaccmFlushHandler, 0, 0); 127 # endif 131 } 132 else 133 { 134 if (rc == VINF_SUCCESS) 135 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatSpinPoke, z); 136 else 137 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatSpinPokeFailed, z); 138 139 /* Spin until the VCPU has switched back. */ 140 while ( VMCPU_GET_STATE(pVCpu) == VMCPUSTATE_STARTED_EXEC 141 && pVCpu->hwaccm.s.fCheckedTLBFlush 142 && cWorldSwitchExit == pVCpu->hwaccm.s.cWorldSwitchExit) 143 { 144 ASMNopPause(); 145 } 146 if (rc == VINF_SUCCESS) 147 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatSpinPoke, z); 148 else 149 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatSpinPokeFailed, z); 150 } 128 151 } 129 152 #endif … … 152 175 { 153 176 hwaccmQueueInvlPage(pVCpu, GCPtr); 154 if (VMCPU_GET_STATE(pVCpu) == VMCPUSTATE_STARTED_EXEC) 177 if ( VMCPU_GET_STATE(pVCpu) == VMCPUSTATE_STARTED_EXEC 178 && pVCpu->hwaccm.s.fCheckedTLBFlush) 155 179 { 156 180 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTlbShootdown); … … 158 182 RTCPUID idHostCpu = pVCpu->hwaccm.s.idEnteredCpu; 159 183 if (idHostCpu != NIL_RTCPUID) 160 hwaccmMpPokeCpu( idHostCpu);184 hwaccmMpPokeCpu(pVCpu, idHostCpu); 161 185 #else 162 186 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_POKE); … … 197 221 continue; 198 222 199 if (VMCPU_GET_STATE(pVCpu) == VMCPUSTATE_STARTED_EXEC) 223 if ( VMCPU_GET_STATE(pVCpu) == VMCPUSTATE_STARTED_EXEC 224 && pVCpu->hwaccm.s.fCheckedTLBFlush) 200 225 { 201 226 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTlbShootdownFlush); … … 203 228 RTCPUID idHostCpu = pVCpu->hwaccm.s.idEnteredCpu; 204 229 if (idHostCpu != NIL_RTCPUID) 205 hwaccmMpPokeCpu( idHostCpu);230 hwaccmMpPokeCpu(pVCpu, idHostCpu); 206 231 #else 207 232 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_POKE); … … 272 297 273 298 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH); 274 if (VMCPU_GET_STATE(pVCpu) == VMCPUSTATE_STARTED_EXEC) 299 if ( VMCPU_GET_STATE(pVCpu) == VMCPUSTATE_STARTED_EXEC 300 && pVCpu->hwaccm.s.fCheckedTLBFlush) 275 301 { 276 302 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTlbShootdownFlush); … … 278 304 RTCPUID idHostCpu = pVCpu->hwaccm.s.idEnteredCpu; 279 305 if (idHostCpu != NIL_RTCPUID) 280 hwaccmMpPokeCpu( idHostCpu);306 hwaccmMpPokeCpu(pVCpu, idHostCpu); 281 307 # else 282 308 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_POKE); -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r23220 r23366 1186 1186 pVCpu->hwaccm.s.idLastCpu = pCpu->idCpu; 1187 1187 1188 /** Set TLB flush state as checked until we return from the world switch. */ 1189 ASMAtomicWriteU8(&pVCpu->hwaccm.s.fCheckedTLBFlush, true); 1190 1188 1191 /* Check for tlb shootdown flushes. */ 1189 1192 if (VMCPU_FF_TESTANDCLEAR(pVCpu, VMCPU_FF_TLB_FLUSH)) … … 1262 1265 pVCpu->hwaccm.s.svm.pfnVMRun(pVCpu->hwaccm.s.svm.pVMCBHostPhys, pVCpu->hwaccm.s.svm.pVMCBPhys, pCtx, pVM, pVCpu); 1263 1266 #endif 1267 ASMAtomicWriteU8(&pVCpu->hwaccm.s.fCheckedTLBFlush, false); 1268 ASMAtomicIncU32(&pVCpu->hwaccm.s.cWorldSwitchExit); 1264 1269 /* Possibly the last TSC value seen by the guest (too high) (only when we're in tsc offset mode). */ 1265 1270 if (!(pVMCB->ctrl.u32InterceptCtrl1 & SVM_CTRL1_INTERCEPT_RDTSC)) -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r23220 r23366 2551 2551 #endif 2552 2552 2553 /* Deal with tagged TLB setup and invalidation. */2554 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB(pVM, pVCpu);2555 2556 2553 /* Non-register state Guest Context */ 2557 2554 /** @todo change me according to cpu state */ 2558 2555 rc = VMXWriteVMCS(VMX_VMCS32_GUEST_ACTIVITY_STATE, VMX_CMS_GUEST_ACTIVITY_ACTIVE); 2559 2556 AssertRC(rc); 2557 2558 /** Set TLB flush state as checked until we return from the world switch. */ 2559 ASMAtomicWriteU8(&pVCpu->hwaccm.s.fCheckedTLBFlush, true); 2560 /* Deal with tagged TLB setup and invalidation. */ 2561 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB(pVM, pVCpu); 2560 2562 2561 2563 STAM_STATS({ STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x); fStatEntryStarted = false; }); … … 2573 2575 */ 2574 2576 2575 2576 2577 /* All done! Let's start VM execution. */ 2577 2578 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatInGC, z); … … 2589 2590 rc = pVCpu->hwaccm.s.vmx.pfnStartVM(pVCpu->hwaccm.s.fResumeVM, pCtx, &pVCpu->hwaccm.s.vmx.VMCSCache, pVM, pVCpu); 2590 2591 #endif 2592 ASMAtomicWriteU8(&pVCpu->hwaccm.s.fCheckedTLBFlush, false); 2593 ASMAtomicIncU32(&pVCpu->hwaccm.s.cWorldSwitchExit); 2591 2594 /* Possibly the last TSC value seen by the guest (too high) (only when we're in tsc offset mode). */ 2592 2595 if (!(pVCpu->hwaccm.s.vmx.proc_ctls & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT)) -
trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp
r23056 r23366 365 365 CHECK_MEMBER_ALIGNMENT(HWACCM, StatTPRPatchSuccess, 8); 366 366 CHECK_MEMBER_ALIGNMENT(HWACCMCPU, StatEntry, 8); 367 CHECK_MEMBER_ALIGNMENT(HWACCMCPU, vmx.pVMCSPhys, sizeof(RTHCPHYS)); 367 368 CHECK_MEMBER_ALIGNMENT(HWACCMCPU, vmx.proc_ctls, 8); 368 369 CHECK_MEMBER_ALIGNMENT(HWACCMCPU, Event.intInfo, 8);
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