Changeset 24453 in vbox for trunk/include

Timestamp:

Nov 6, 2009 3:43:52 PM (15 years ago)

Author:

vboxsync

Message:

CPUM: CPUID validation on state load.

File:

• trunk/include/VBox/x86.h (modified) (7 diffs)

trunk/include/VBox/x86.h

@@ -223 +223 @@
     /** Bit 10 - CNTX-ID - L1 Context ID. */
     unsigned    u1CNTXID : 1;
-    /** Reserved. */
-    unsigned    u2Reserved2 : 2;
+    /** Bit 11 - FMA. */
+    unsigned    u1FMA : 1;
+    /** Bit 12 - Reserved. */
+    unsigned    u1Reserved2 : 1;
     /** Bit 13 - CX16 - CMPXCHG16B. */
     unsigned    u1CX16 : 1;
@@ -245 +247 @@
     /** Bit 23 - POPCNT - Supports POPCNT. */
     unsigned    u1POPCNT : 1;
-    /** Reserved. */
-    unsigned    u2Reserved4 : 2;
+    /** Bit 24 - Reserved. */
+    unsigned    u1Reserved4 : 1;
+    /** Bit 25 - AES. */
+    unsigned    u1AES : 1;
     /** Bit 26 - XSAVE - Supports XSAVE. */
     unsigned    u1XSAVE : 1;
@@ -355 +359 @@
 /** ECX Bit 0 - SSE3 - Supports SSE3 or not. */
 #define X86_CPUID_FEATURE_ECX_SSE3      RT_BIT(0)
+/** ECX Bit 1 - PCLMUL - PCLMULQDQ support (for AES-GCM). */
+#define X86_CPUID_FEATURE_ECX_PCLMUL    RT_BIT(1)
 /** ECX Bit 2 - DTES64 - DS Area 64-bit Layout. */
 #define X86_CPUID_FEATURE_ECX_DTES64    RT_BIT(2)
@@ -373 +379 @@
 /** ECX Bit 10 - CNTX-ID - L1 Context ID. */
 #define X86_CPUID_FEATURE_ECX_CNTXID    RT_BIT(10)
+/** ECX Bit 12 - FMA. */
+#define X86_CPUID_FEATURE_ECX_FMA       RT_BIT(12)
 /** ECX Bit 13 - CX16 - CMPXCHG16B. */
 #define X86_CPUID_FEATURE_ECX_CX16      RT_BIT(13)
@@ -389 +397 @@
 /** ECX Bit 22 - MOVBE instruction. */
 #define X86_CPUID_FEATURE_ECX_MOVBE     RT_BIT(22)
-/** ECX Bit 23 - POPCOUNT instruction. */
-#define X86_CPUID_FEATURE_ECX_POPCOUNT  RT_BIT(23)
+/** ECX Bit 23 - POPCNT instruction. */
+#define X86_CPUID_FEATURE_ECX_POPCNT    RT_BIT(23)
+/** ECX Bit 25 - AES instructions. */
+#define X86_CPUID_FEATURE_ECX_AES       RT_BIT(25)
 /** ECX Bit 26 - XSAVE instruction. */
 #define X86_CPUID_FEATURE_ECX_XSAVE     RT_BIT(26)
 /** ECX Bit 27 - OSXSAVE instruction. */
 #define X86_CPUID_FEATURE_ECX_OSXSAVE   RT_BIT(27)
+/** ECX Bit 28 - AVX. */
+#define X86_CPUID_FEATURE_ECX_AVX       RT_BIT(28)
 
 
@@ -463 +475 @@
  */
 /** Bit 0 - FPU - x87 FPU on Chip. */
-#define X86_CPUID_AMD_FEATURE_EDX_FPU   RT_BIT(0)
+#define X86_CPUID_AMD_FEATURE_EDX_FPU       RT_BIT(0)
 /** Bit 1 - VME - Virtual 8086 Mode Enhancements. */
-#define X86_CPUID_AMD_FEATURE_EDX_VME    RT_BIT(1)
+#define X86_CPUID_AMD_FEATURE_EDX_VME       RT_BIT(1)
 /** Bit 2 - DE - Debugging extensions. */
 #define X86_CPUID_AMD_FEATURE_EDX_DE        RT_BIT(2)
@@ -537 +549 @@
 /** Bit 9 - OSVW - AMD OS visible workaround. */
 #define X86_CPUID_AMD_FEATURE_ECX_OSVW      RT_BIT(9)
+/** Bit 10 - IBS - Instruct based sampling. */
+#define X86_CPUID_AMD_FEATURE_ECX_IBS       RT_BIT(10)
+/** Bit 11 - SSE5 - SSE5 instruction support. */
+#define X86_CPUID_AMD_FEATURE_ECX_SSE5      RT_BIT(11)
 /** Bit 12 - SKINIT - AMD SKINIT: SKINIT, STGI, and DEV support. */
 #define X86_CPUID_AMD_FEATURE_ECX_SKINIT    RT_BIT(12)