Changeset 26499 in vbox
- Timestamp:
- Feb 14, 2010 8:22:40 AM (15 years ago)
- svn:sync-xref-src-repo-rev:
- 57669
- Location:
- trunk/src/recompiler
- Files:
-
- 19 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/recompiler/cutils.c
r17040 r26499 33 33 } 34 34 35 /* Quick sort from OpenSolaris: 35 /* Quick sort from OpenSolaris: 36 36 http://src.opensolaris.org/source/raw/onnv/onnv-gate/usr/src/common/util/qsort.c */ 37 37 /* … … 583 583 y--; 584 584 } 585 t = 86400 * (d + (153 * m - 457) / 5 + 365 * y + y / 4 - y / 100 + 585 t = 86400 * (d + (153 * m - 457) / 5 + 365 * y + y / 4 - y / 100 + 586 586 y / 400 - 719469); 587 587 t += 3600 * tm->tm_hour + 60 * tm->tm_min + tm->tm_sec; -
trunk/src/recompiler/dyngen-exec.h
r13731 r26499 125 125 #endif 126 126 #ifdef __x86_64__ 127 #if defined(VBOX) 127 #if defined(VBOX) 128 128 /* Must be in sync with TCG register notion, see tcg-target.h */ 129 129 #endif … … 243 243 #define __hidden __attribute__((visibility("hidden"))) 244 244 #else 245 #define __hidden 245 #define __hidden 246 246 #endif 247 247 … … 278 278 279 279 #ifdef VBOX 280 #define GETPC() ASMReturnAddress() 280 #define GETPC() ASMReturnAddress() 281 281 #elif defined(__s390__) 282 282 /* The return address may point to the start of the next instruction. -
trunk/src/recompiler/elf.h
r13384 r26499 1041 1041 #define SHN_HIRESERVE 0xffff 1042 1042 #define SHN_MIPS_ACCOMON 0xff00 1043 1043 1044 1044 typedef struct elf32_shdr { 1045 1045 Elf32_Word sh_name; -
trunk/src/recompiler/fpu/softfloat.h
r21292 r26499 102 102 #if defined(VBOX) && (!defined(FLOATX80) || defined(CONFIG_SOFTFLOAT)) 103 103 # error misconfigured 104 #endif 104 #endif 105 105 106 106 #define STATUS_PARAM , float_status *status -
trunk/src/recompiler/host-utils.h
r17040 r26499 175 175 #endif 176 176 } 177 177 178 178 #ifndef VBOX 179 179 static always_inline int cto32 (uint32_t val) -
trunk/src/recompiler/softmmu_header.h
r13731 r26499 1 1 /* 2 2 * Software MMU support 3 * 3 * 4 4 * Copyright (c) 2003 Fabrice Bellard 5 5 * -
trunk/src/recompiler/softmmu_template.h
r15173 r26499 1 1 /* 2 2 * Software MMU support 3 * 3 * 4 4 * Copyright (c) 2003 Fabrice Bellard 5 5 * … … 71 71 void *retaddr); 72 72 #ifndef VBOX 73 static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, 73 static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, 74 74 target_ulong addr, 75 75 void *retaddr) 76 76 #else 77 DECLINLINE(DATA_TYPE) glue(io_read, SUFFIX)(target_phys_addr_t physaddr, 77 DECLINLINE(DATA_TYPE) glue(io_read, SUFFIX)(target_phys_addr_t physaddr, 78 78 target_ulong addr, 79 79 void *retaddr) … … 115 115 that valid value takes the whole register, why gcc after 4.3 may 116 116 use only lower part of register for smaller types. So force promoution. */ 117 DATA_TYPE_PROMOTED REGPARM 117 DATA_TYPE_PROMOTED REGPARM 118 118 glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, 119 119 int mmu_idx) … … 224 224 #ifndef SOFTMMU_CODE_ACCESS 225 225 226 static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, 227 DATA_TYPE val, 226 static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, 227 DATA_TYPE val, 228 228 int mmu_idx, 229 229 void *retaddr); 230 230 231 231 #ifndef VBOX 232 static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, 232 static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, 233 233 DATA_TYPE val, 234 234 target_ulong addr, 235 235 void *retaddr) 236 236 #else 237 DECLINLINE(void) glue(io_write, SUFFIX)(target_phys_addr_t physaddr, 237 DECLINLINE(void) glue(io_write, SUFFIX)(target_phys_addr_t physaddr, 238 238 DATA_TYPE val, 239 239 target_ulong addr, -
trunk/src/recompiler/target-i386/exec.h
r13504 r26499 163 163 } 164 164 165 #ifndef VBOX 165 #ifndef VBOX 166 166 static inline void stfq(target_ulong ptr, double v) 167 167 #else … … 444 444 { 445 445 CPU86_LDoubleU temp; 446 446 447 447 temp.d = f; 448 448 stq(ptr, temp.l.lower); … … 494 494 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); 495 495 DF = 1 - (2 * ((eflags >> 10) & 1)); 496 env->eflags = (env->eflags & ~update_mask) | 496 env->eflags = (env->eflags & ~update_mask) | 497 497 (eflags & update_mask); 498 498 } -
trunk/src/recompiler/target-i386/opreg_template.h
r11982 r26499 2 2 * i386 micro operations (templates for various register related 3 3 * operations) 4 * 4 * 5 5 * Copyright (c) 2003 Fabrice Bellard 6 6 * -
trunk/src/recompiler/target-i386/ops_sse.h
r18879 r26499 1989 1989 1990 1990 if (res) 1991 #ifndef VBOX 1991 #ifndef VBOX 1992 1992 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1 : ffs1)(res) - 1; 1993 1993 #else 1994 1994 env->regs[R_ECX] = ((ctrl & (1 << 6)) ? rffs1(res) : ffs1(res)) - 1; 1995 #endif 1995 #endif 1996 1996 else 1997 1997 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0)); -
trunk/src/recompiler/target-i386/ops_template.h
r11982 r26499 2 2 * i386 micro operations (included several times to generate 3 3 * different operand sizes) 4 * 4 * 5 5 * Copyright (c) 2003 Fabrice Bellard 6 6 * … … 249 249 sf = lshift(CC_DST, 8 - DATA_BITS) & 0x80; 250 250 /* of is defined if shift count == 1 */ 251 of = lshift(CC_SRC ^ CC_DST, 12 - DATA_BITS) & CC_O; 251 of = lshift(CC_SRC ^ CC_DST, 12 - DATA_BITS) & CC_O; 252 252 return cf | pf | af | zf | sf | of; 253 253 } … … 512 512 int count; 513 513 target_long res; 514 514 515 515 res = T0 & DATA_MASK; 516 516 if (res != 0) { -
trunk/src/recompiler/target-i386/ops_template_mem.h
r11982 r26499 2 2 * i386 micro operations (included several times to generate 3 3 * different operand sizes) 4 * 4 * 5 5 * Copyright (c) 2003 Fabrice Bellard 6 6 * … … 94 94 asm volatile("" : : "r" (T0)); 95 95 #endif 96 CC_SRC = (cc_table[CC_OP].compute_all() & ~(CC_O | CC_C)) | 97 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 96 CC_SRC = (cc_table[CC_OP].compute_all() & ~(CC_O | CC_C)) | 97 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 98 98 (T0 & CC_C); 99 99 CC_OP = CC_OP_EFLAGS; … … 119 119 #endif 120 120 CC_SRC = (cc_table[CC_OP].compute_all() & ~(CC_O | CC_C)) | 121 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 121 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 122 122 ((T0 >> (DATA_BITS - 1)) & CC_C); 123 123 CC_OP = CC_OP_EFLAGS; … … 178 178 #endif 179 179 CC_SRC = (eflags & ~(CC_C | CC_O)) | 180 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 180 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 181 181 ((src >> (DATA_BITS - count)) & CC_C); 182 182 CC_OP = CC_OP_EFLAGS; … … 209 209 #endif 210 210 CC_SRC = (eflags & ~(CC_C | CC_O)) | 211 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 211 (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | 212 212 ((src >> (count - 1)) & CC_C); 213 213 CC_OP = CC_OP_EFLAGS; -
trunk/src/recompiler/tcg/i386/tcg-target.h
r21292 r26499 49 49 50 50 /* used for function call generation */ 51 #define TCG_REG_CALL_STACK TCG_REG_ESP 51 #define TCG_REG_CALL_STACK TCG_REG_ESP 52 52 #define TCG_TARGET_STACK_ALIGN 16 53 53 #define TCG_TARGET_CALL_STACK_OFFSET 0 -
trunk/src/recompiler/tcg/tcg-op.h
r18083 r26499 117 117 118 118 #ifndef VBOX 119 static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 120 #else /* VBOX */ 121 DECLINLINE(void) tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 119 static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 120 #else /* VBOX */ 121 DECLINLINE(void) tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 122 122 #endif /* VBOX */ 123 123 TCGv arg4) … … 131 131 132 132 #ifndef VBOX 133 static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 134 #else /* VBOX */ 135 DECLINLINE(void) tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 133 static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 134 #else /* VBOX */ 135 DECLINLINE(void) tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 136 136 #endif /* VBOX */ 137 137 TCGArg arg4) … … 145 145 146 146 #ifndef VBOX 147 static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, 148 #else /* VBOX */ 149 DECLINLINE(void) tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, 147 static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, 148 #else /* VBOX */ 149 DECLINLINE(void) tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, 150 150 #endif /* VBOX */ 151 151 TCGArg arg4) … … 159 159 160 160 #ifndef VBOX 161 static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, 162 #else /* VBOX */ 163 DECLINLINE(void) tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, 161 static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, 162 #else /* VBOX */ 163 DECLINLINE(void) tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, 164 164 #endif /* VBOX */ 165 165 TCGv arg3, TCGv arg4, … … 175 175 176 176 #ifndef VBOX 177 static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, 178 #else /* VBOX */ 179 DECLINLINE(void) tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, 177 static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, 178 #else /* VBOX */ 179 DECLINLINE(void) tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, 180 180 #endif /* VBOX */ 181 181 TCGv arg3, TCGv arg4, … … 191 191 192 192 #ifndef VBOX 193 static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, 194 #else /* VBOX */ 195 DECLINLINE(void) tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, 193 static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, 194 #else /* VBOX */ 195 DECLINLINE(void) tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, 196 196 #endif /* VBOX */ 197 197 TCGv arg3, TCGv arg4, … … 208 208 209 209 #ifndef VBOX 210 static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, 211 #else /* VBOX */ 212 DECLINLINE(void) tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, 210 static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, 211 #else /* VBOX */ 212 DECLINLINE(void) tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, 213 213 #endif /* VBOX */ 214 214 TCGv arg3, TCGv arg4, … … 272 272 TCGv t0; 273 273 t0 = tcg_const_ptr((tcg_target_long)func); 274 tcg_gen_call(&tcg_ctx, 274 tcg_gen_call(&tcg_ctx, 275 275 t0, TCG_HELPER_CALL_FLAGS, 276 276 0, NULL, 0, NULL); … … 303 303 args[1] = arg2; 304 304 t0 = tcg_const_ptr((tcg_target_long)func); 305 tcg_gen_call(&tcg_ctx, 305 tcg_gen_call(&tcg_ctx, 306 306 t0, TCG_HELPER_CALL_FLAGS, 307 307 0, NULL, 2, args); … … 377 377 378 378 #ifndef VBOX 379 static inline void tcg_gen_helper_1_2(void *func, TCGv ret, 380 #else /* VBOX */ 381 DECLINLINE(void) tcg_gen_helper_1_2(void *func, TCGv ret, 379 static inline void tcg_gen_helper_1_2(void *func, TCGv ret, 380 #else /* VBOX */ 381 DECLINLINE(void) tcg_gen_helper_1_2(void *func, TCGv ret, 382 382 #endif /* VBOX */ 383 383 TCGv arg1, TCGv arg2) … … 388 388 args[1] = arg2; 389 389 t0 = tcg_const_ptr((tcg_target_long)func); 390 tcg_gen_call(&tcg_ctx, 390 tcg_gen_call(&tcg_ctx, 391 391 t0, TCG_HELPER_CALL_FLAGS, 392 392 1, &ret, 2, args); … … 710 710 711 711 #ifndef VBOX 712 static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, 713 #else /* VBOX */ 714 DECLINLINE(void) tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, 712 static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, 713 #else /* VBOX */ 714 DECLINLINE(void) tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, 715 715 #endif /* VBOX */ 716 716 int label_index) … … 720 720 721 721 #ifndef VBOX 722 static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, 723 #else /* VBOX */ 724 DECLINLINE(void) tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, 722 static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, 723 #else /* VBOX */ 724 DECLINLINE(void) tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, 725 725 #endif /* VBOX */ 726 726 int label_index) … … 990 990 #endif /* VBOX */ 991 991 { 992 tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), 992 tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), 993 993 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); 994 994 } … … 1011 1011 #endif /* VBOX */ 1012 1012 { 1013 tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), 1013 tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), 1014 1014 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); 1015 1015 } … … 1143 1143 1144 1144 #ifndef VBOX 1145 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1146 #else /* VBOX */ 1147 DECLINLINE(void) tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1145 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1146 #else /* VBOX */ 1147 DECLINLINE(void) tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1148 1148 #endif /* VBOX */ 1149 1149 int label_index) 1150 1150 { 1151 tcg_gen_op6ii(INDEX_op_brcond2_i32, 1151 tcg_gen_op6ii(INDEX_op_brcond2_i32, 1152 1152 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), 1153 1153 cond, label_index); … … 1161 1161 { 1162 1162 TCGv t0, t1; 1163 1163 1164 1164 t0 = tcg_temp_new(TCG_TYPE_I64); 1165 1165 t1 = tcg_temp_new(TCG_TYPE_I32); 1166 1166 1167 1167 tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); 1168 1168 1169 1169 tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); 1170 1170 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); 1171 1171 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); 1172 1172 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); 1173 1173 1174 1174 tcg_gen_mov_i64(ret, t0); 1175 1175 tcg_temp_free(t0); … … 1526 1526 1527 1527 #ifndef VBOX 1528 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1529 #else /* VBOX */ 1530 DECLINLINE(void) tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1528 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1529 #else /* VBOX */ 1530 DECLINLINE(void) tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, 1531 1531 #endif /* VBOX */ 1532 1532 int label_index) … … 1648 1648 1649 1649 #ifndef VBOX 1650 static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, 1651 #else /* VBOX */ 1652 DECLINLINE(void) tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, 1650 static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, 1651 #else /* VBOX */ 1652 DECLINLINE(void) tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, 1653 1653 #endif /* VBOX */ 1654 1654 int label_index) … … 1723 1723 t0 = tcg_temp_new(TCG_TYPE_I32); 1724 1724 t1 = tcg_temp_new(TCG_TYPE_I32); 1725 1725 1726 1726 tcg_gen_shri_i32(t0, arg, 8); 1727 1727 tcg_gen_andi_i32(t1, arg, 0x000000ff); … … 1745 1745 t0 = tcg_temp_new(TCG_TYPE_I32); 1746 1746 t1 = tcg_temp_new(TCG_TYPE_I32); 1747 1747 1748 1748 tcg_gen_shli_i32(t0, arg, 24); 1749 1749 1750 1750 tcg_gen_andi_i32(t1, arg, 0x0000ff00); 1751 1751 tcg_gen_shli_i32(t1, t1, 8); 1752 1752 tcg_gen_or_i32(t0, t0, t1); 1753 1753 1754 1754 tcg_gen_shri_i32(t1, arg, 8); 1755 1755 tcg_gen_andi_i32(t1, t1, 0x0000ff00); 1756 1756 tcg_gen_or_i32(t0, t0, t1); 1757 1757 1758 1758 tcg_gen_shri_i32(t1, arg, 24); 1759 1759 tcg_gen_or_i32(ret, t0, t1); … … 1986 1986 t0 = tcg_temp_new(TCG_TYPE_I32); 1987 1987 t1 = tcg_temp_new(TCG_TYPE_I32); 1988 1988 1989 1989 tcg_gen_shli_i64(t0, arg, 56); 1990 1990 1991 1991 tcg_gen_andi_i64(t1, arg, 0x0000ff00); 1992 1992 tcg_gen_shli_i64(t1, t1, 40); 1993 1993 tcg_gen_or_i64(t0, t0, t1); 1994 1994 1995 1995 tcg_gen_andi_i64(t1, arg, 0x00ff0000); 1996 1996 tcg_gen_shli_i64(t1, t1, 24); … … 2004 2004 tcg_gen_andi_i64(t1, t1, 0xff000000); 2005 2005 tcg_gen_or_i64(t0, t0, t1); 2006 2006 2007 2007 tcg_gen_shri_i64(t1, arg, 24); 2008 2008 tcg_gen_andi_i64(t1, t1, 0x00ff0000); … … 2154 2154 /* XXX: must really use a 32 bit size for TCGArg in all cases */ 2155 2155 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS 2156 tcg_gen_op2ii(INDEX_op_debug_insn_start, 2156 tcg_gen_op2ii(INDEX_op_debug_insn_start, 2157 2157 (uint32_t)(pc), (uint32_t)(pc >> 32)); 2158 2158 #else -
trunk/src/recompiler/tcg/tcg.c
r18083 r26499 67 67 68 68 #ifdef VBOX 69 /* 69 /* 70 70 * Liveness analysis doesn't work well with 32-bit hosts and 64-bit targets, 71 * second element of the register pair to store 64-bit value is consedered 72 * dead, it seems. 71 * second element of the register pair to store 64-bit value is consedered 72 * dead, it seems. 73 73 * @todo: fix it in compiler 74 74 */ … … 78 78 #endif 79 79 80 static void patch_reloc(uint8_t *code_ptr, int type, 80 static void patch_reloc(uint8_t *code_ptr, int type, 81 81 tcg_target_long value, tcg_target_long addend); 82 82 … … 131 131 /* label relocation processing */ 132 132 133 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, 133 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, 134 134 int label_index, long addend) 135 135 { … … 140 140 if (l->has_value) { 141 141 /* FIXME: This may break relocations on RISC targets that 142 modify instruction fields in place. The caller may not have 142 modify instruction fields in place. The caller may not have 143 143 written the initial value. */ 144 144 patch_reloc(code_ptr, type, l->u.value, addend); … … 154 154 } 155 155 156 static void tcg_out_label(TCGContext *s, int label_index, 156 static void tcg_out_label(TCGContext *s, int label_index, 157 157 tcg_target_long value) 158 158 { … … 194 194 TCGPool *p; 195 195 int pool_size; 196 196 197 197 if (size > TCG_POOL_CHUNK_SIZE) { 198 198 /* big malloc: insert a new pool (XXX: could optimize) */ … … 217 217 p->size = pool_size; 218 218 p->next = NULL; 219 if (s->pool_current) 219 if (s->pool_current) 220 220 s->pool_current->next = p; 221 221 else … … 248 248 s->temps = s->static_temps; 249 249 s->nb_globals = 0; 250 250 251 251 /* Count total number of arguments and allocate the corresponding 252 252 space */ … … 269 269 args_ct += n; 270 270 } 271 271 272 272 tcg_target_init(s); 273 273 … … 276 276 s->code_ptr = s->code_buf; 277 277 tcg_target_qemu_prologue(s); 278 flush_icache_range((unsigned long)s->code_buf, 278 flush_icache_range((unsigned long)s->code_buf, 279 279 (unsigned long)s->code_ptr); 280 280 } … … 340 340 #if TCG_TARGET_REG_BITS == 32 341 341 /* temporary hack to avoid register shortage for tcg_qemu_st64() */ 342 TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2, 342 TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2, 343 343 const char *name) 344 344 { … … 554 554 } 555 555 556 static void tcg_gen_call_internal(TCGContext *s, TCGv func, 556 static void tcg_gen_call_internal(TCGContext *s, TCGv func, 557 557 unsigned int flags, 558 558 unsigned int nb_rets, const TCGv *rets, 559 559 unsigned int nb_params, const TCGv *params) 560 560 { 561 #ifndef VBOX 561 #ifndef VBOX 562 562 int i; 563 563 #else … … 639 639 } 640 640 } 641 tcg_gen_call_internal(s, func, flags, 641 tcg_gen_call_internal(s, func, flags, 642 642 nb_rets, rets, j, args2); 643 643 } … … 647 647 unsigned int nb_params, const TCGv *args1) 648 648 { 649 tcg_gen_call_internal(s, func, flags, 649 tcg_gen_call_internal(s, func, flags, 650 650 nb_rets, rets, nb_params, args1); 651 651 } … … 653 653 654 654 #if TCG_TARGET_REG_BITS == 32 655 void tcg_gen_shifti_i64(TCGv ret, TCGv arg1, 655 void tcg_gen_shifti_i64(TCGv ret, TCGv arg1, 656 656 int c, int right, int arith) 657 657 { … … 682 682 if (arith) 683 683 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c); 684 else 684 else 685 685 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c); 686 tcg_gen_shri_i32(ret, arg1, c); 686 tcg_gen_shri_i32(ret, arg1, c); 687 687 tcg_gen_or_i32(ret, ret, t0); 688 688 tcg_gen_mov_i32(TCGV_HIGH(ret), t1); … … 690 690 tcg_gen_shri_i32(t0, arg1, 32 - c); 691 691 /* Note: ret can be the same as arg1, so we use t1 */ 692 tcg_gen_shli_i32(t1, arg1, c); 692 tcg_gen_shli_i32(t1, arg1, c); 693 693 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); 694 694 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0); … … 733 733 pstrcpy(buf, buf_size, ts->name); 734 734 } else { 735 if (ts->temp_local) 735 if (ts->temp_local) 736 736 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); 737 737 else … … 767 767 if (unlikely(!s->helpers_sorted)) { 768 768 #ifdef VBOX 769 qemu_qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo), 769 qemu_qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo), 770 770 helper_cmp); 771 771 #else 772 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo), 772 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo), 773 773 helper_cmp); 774 774 #endif … … 846 846 pc = args[0]; 847 847 #endif 848 if (!first_insn) 848 if (!first_insn) 849 849 fprintf(outfile, "\n"); 850 850 fprintf(outfile, " ---- 0x%" PRIx64, pc); … … 886 886 } 887 887 } 888 } else if (c == INDEX_op_movi_i32 888 } else if (c == INDEX_op_movi_i32 889 889 #if TCG_TARGET_REG_BITS == 64 890 890 || c == INDEX_op_movi_i64 … … 897 897 nb_iargs = def->nb_iargs; 898 898 nb_cargs = def->nb_cargs; 899 fprintf(outfile, " %s %s,$", def->name, 899 fprintf(outfile, " %s %s,$", def->name, 900 900 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0])); 901 901 val = args[1]; … … 921 921 nb_cargs = def->nb_cargs; 922 922 } 923 923 924 924 k = 0; 925 925 for(i = 0; i < nb_oargs; i++) { … … 1083 1083 /* set a nop for an operation using 'nb_args' */ 1084 1084 #ifndef VBOX 1085 static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr, 1085 static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr, 1086 1086 #else /* VBOX */ 1087 DECLINLINE(void) tcg_set_nop(TCGContext *s, uint16_t *opc_ptr, 1087 DECLINLINE(void) tcg_set_nop(TCGContext *s, uint16_t *opc_ptr, 1088 1088 #endif /* VBOX */ 1089 1089 TCGArg *args, int nb_args) … … 1144 1144 uint8_t *dead_temps; 1145 1145 unsigned int dead_iargs; 1146 1146 1147 1147 gen_opc_ptr++; /* skip end */ 1148 1148 … … 1151 1151 /* XXX: make it really dynamic */ 1152 1152 s->op_dead_iargs = tcg_malloc(OPC_BUF_SIZE * sizeof(uint16_t)); 1153 1153 1154 1154 dead_temps = tcg_malloc(s->nb_temps); 1155 1155 memset(dead_temps, 1, s->nb_temps); … … 1180 1180 goto do_not_remove_call; 1181 1181 } 1182 tcg_set_nop(s, gen_opc_buf + op_index, 1182 tcg_set_nop(s, gen_opc_buf + op_index, 1183 1183 args - 1, nb_args); 1184 1184 } else { … … 1190 1190 dead_temps[arg] = 1; 1191 1191 } 1192 1192 1193 1193 /* globals are live (they may be used by the call) */ 1194 1194 memset(dead_temps, 0, s->nb_globals); 1195 1195 1196 1196 /* input args are live */ 1197 1197 dead_iargs = 0; … … 1257 1257 dead_temps[arg] = 1; 1258 1258 } 1259 1259 1260 1260 /* if end of basic block, update */ 1261 1261 if (def->flags & TCG_OPF_BB_END) { … … 1265 1265 memset(dead_temps, 0, s->nb_globals); 1266 1266 } 1267 1267 1268 1268 /* input args are live */ 1269 1269 dead_iargs = 0; … … 1335 1335 for(i = 0; i < TCG_TARGET_NB_REGS; i++) { 1336 1336 if (s->reg_to_temp[i] >= 0) { 1337 printf("%s: %s\n", 1338 tcg_target_reg_names[i], 1337 printf("%s: %s\n", 1338 tcg_target_reg_names[i], 1339 1339 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); 1340 1340 } … … 1354 1354 if (ts->val_type != TEMP_VAL_REG || 1355 1355 ts->reg != reg) { 1356 printf("Inconsistency for register %s:\n", 1356 printf("Inconsistency for register %s:\n", 1357 1357 tcg_target_reg_names[reg]); 1358 1358 goto fail; … … 1365 1365 !ts->fixed_reg && 1366 1366 s->reg_to_temp[ts->reg] != k) { 1367 printf("Inconsistency for temp %s:\n", 1367 printf("Inconsistency for temp %s:\n", 1368 1368 tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); 1369 1369 fail: … … 1404 1404 assert(ts->val_type == TEMP_VAL_REG); 1405 1405 if (!ts->mem_coherent) { 1406 if (!ts->mem_allocated) 1406 if (!ts->mem_allocated) 1407 1407 temp_allocate_frame(s, temp); 1408 1408 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); … … 1457 1457 break; 1458 1458 case TEMP_VAL_CONST: 1459 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1459 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1460 1460 allocated_regs); 1461 if (!ts->mem_allocated) 1461 if (!ts->mem_allocated) 1462 1462 temp_allocate_frame(s, temp); 1463 1463 tcg_out_movi(s, ts->type, reg, ts->val); … … 1589 1589 } 1590 1590 1591 static void tcg_reg_alloc_op(TCGContext *s, 1591 static void tcg_reg_alloc_op(TCGContext *s, 1592 1592 const TCGOpDef *def, int opc, 1593 1593 const TCGArg *args, … … 1606 1606 1607 1607 /* copy constants */ 1608 memcpy(new_args + nb_oargs + nb_iargs, 1609 args + nb_oargs + nb_iargs, 1608 memcpy(new_args + nb_oargs + nb_iargs, 1609 args + nb_oargs + nb_iargs, 1610 1610 sizeof(TCGArg) * def->nb_cargs); 1611 1611 1612 /* satisfy input constraints */ 1612 /* satisfy input constraints */ 1613 1613 tcg_regset_set(allocated_regs, s->reserved_regs); 1614 1614 for(k = 0; k < nb_iargs; k++) { … … 1651 1651 not dead after the instruction, we must allocate 1652 1652 a new register and move it */ 1653 if (!IS_DEAD_IARG(i - nb_oargs)) 1653 if (!IS_DEAD_IARG(i - nb_oargs)) 1654 1654 goto allocate_in_reg; 1655 1655 } … … 1660 1660 } else { 1661 1661 allocate_in_reg: 1662 /* allocate a new register matching the constraint 1662 /* allocate a new register matching the constraint 1663 1663 and move the temporary register into it */ 1664 1664 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); … … 1670 1670 iarg_end: ; 1671 1671 } 1672 1672 1673 1673 if (def->flags & TCG_OPF_BB_END) { 1674 1674 tcg_reg_alloc_bb_end(s, allocated_regs); … … 1686 1686 } 1687 1687 } 1688 1688 1689 1689 if (def->flags & TCG_OPF_CALL_CLOBBER) { 1690 /* XXX: permit generic clobber register list ? */ 1690 /* XXX: permit generic clobber register list ? */ 1691 1691 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { 1692 1692 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { … … 1696 1696 /* XXX: for load/store we could do that only for the slow path 1697 1697 (i.e. when a memory callback is called) */ 1698 1698 1699 1699 /* store globals and free associated registers (we assume the insn 1700 1700 can modify any global. */ 1701 1701 save_globals(s, allocated_regs); 1702 1702 } 1703 1703 1704 1704 /* satisfy the output constraints */ 1705 1705 tcg_regset_set(allocated_regs, s->reserved_regs); … … 1729 1729 /* temp value is modified, so the value kept in memory is 1730 1730 potentially not the same */ 1731 ts->mem_coherent = 0; 1731 ts->mem_coherent = 0; 1732 1732 s->reg_to_temp[reg] = arg; 1733 1733 } … … 1739 1739 /* emit instruction */ 1740 1740 tcg_out_op(s, opc, new_args, const_args); 1741 1741 1742 1742 /* move the outputs in the correct register if needed */ 1743 1743 for(i = 0; i < nb_oargs; i++) { … … 1783 1783 /* XXX: preallocate call stack */ 1784 1784 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long); 1785 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 1785 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & 1786 1786 ~(TCG_TARGET_STACK_ALIGN - 1); 1787 1787 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); … … 1801 1801 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); 1802 1802 } else if (ts->val_type == TEMP_VAL_MEM) { 1803 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1803 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1804 1804 s->reserved_regs); 1805 1805 /* XXX: not correct if reading values from the stack */ … … 1807 1807 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); 1808 1808 } else if (ts->val_type == TEMP_VAL_CONST) { 1809 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1809 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], 1810 1810 s->reserved_regs); 1811 1811 /* XXX: sign extend may be needed on some targets */ … … 1820 1820 #endif 1821 1821 } 1822 1822 1823 1823 /* assign input registers */ 1824 1824 tcg_regset_set(allocated_regs, s->reserved_regs); … … 1844 1844 } 1845 1845 } 1846 1846 1847 1847 /* assign function address */ 1848 1848 func_arg = args[nb_oargs + nb_iargs - 1]; … … 1877 1877 tcg_abort(); 1878 1878 } 1879 1880 1879 1880 1881 1881 /* mark dead temporaries and free the associated registers */ 1882 1882 for(i = 0; i < nb_iargs; i++) { … … 1891 1891 } 1892 1892 } 1893 1893 1894 1894 /* clobber call registers */ 1895 1895 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { … … 1898 1898 } 1899 1899 } 1900 1900 1901 1901 /* store globals and free associated registers (we assume the call 1902 1902 can modify any global. */ … … 1904 1904 1905 1905 tcg_out_op(s, opc, &func_arg, &const_func_arg); 1906 1906 1907 1907 if (allocate_args) { 1908 1908 tcg_out_addi(s, TCG_REG_CALL_STACK, STACK_DIR(call_stack_size)); … … 1924 1924 ts->val_type = TEMP_VAL_REG; 1925 1925 ts->reg = reg; 1926 ts->mem_coherent = 0; 1926 ts->mem_coherent = 0; 1927 1927 s->reg_to_temp[reg] = arg; 1928 1928 } 1929 1929 } 1930 1930 1931 1931 return nb_iargs + nb_oargs + def->nb_cargs + 1; 1932 1932 } … … 2114 2114 2115 2115 /* flush instruction cache */ 2116 flush_icache_range((unsigned long)gen_code_buf, 2116 flush_icache_range((unsigned long)gen_code_buf, 2117 2117 (unsigned long)s->code_ptr); 2118 2118 return s->code_ptr - gen_code_buf; … … 2138 2138 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", 2139 2139 tot, tot / 2.4e9); 2140 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2141 s->tb_count, 2140 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", 2141 s->tb_count, 2142 2142 s->tb_count1 - s->tb_count, 2143 2143 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); 2144 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2144 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2145 2145 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); 2146 cpu_fprintf(f, "old ops/total ops %0.1f%%\n", 2146 cpu_fprintf(f, "old ops/total ops %0.1f%%\n", 2147 2147 s->op_count ? (double)s->old_op_count / s->op_count * 100.0 : 0); 2148 2148 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2149 s->tb_count ? 2149 s->tb_count ? 2150 2150 (double)s->del_op_count / s->tb_count : 0); 2151 2151 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", 2152 s->tb_count ? 2152 s->tb_count ? 2153 2153 (double)s->temp_count / s->tb_count : 0, 2154 2154 s->temp_count_max); 2155 2156 cpu_fprintf(f, "cycles/op %0.1f\n", 2155 2156 cpu_fprintf(f, "cycles/op %0.1f\n", 2157 2157 s->op_count ? (double)tot / s->op_count : 0); 2158 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2158 cpu_fprintf(f, "cycles/in byte %0.1f\n", 2159 2159 s->code_in_len ? (double)tot / s->code_in_len : 0); 2160 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2160 cpu_fprintf(f, "cycles/out byte %0.1f\n", 2161 2161 s->code_out_len ? (double)tot / s->code_out_len : 0); 2162 2162 if (tot == 0) 2163 2163 tot = 1; 2164 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2164 cpu_fprintf(f, " gen_interm time %0.1f%%\n", 2165 2165 (double)s->interm_time / tot * 100.0); 2166 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2166 cpu_fprintf(f, " gen_code time %0.1f%%\n", 2167 2167 (double)s->code_time / tot * 100.0); 2168 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2168 cpu_fprintf(f, "liveness/code time %0.1f%%\n", 2169 2169 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); 2170 2170 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", -
trunk/src/recompiler/tcg/tcg.h
r18083 r26499 77 77 uint8_t *ptr; 78 78 tcg_target_long addend; 79 } TCGRelocation; 79 } TCGRelocation; 80 80 81 81 typedef struct TCGLabel { … … 168 168 cannot raise exceptions. Hence a call to a pure function can be 169 169 safely suppressed if the return value is not used. */ 170 #define TCG_CALL_PURE 0x0010 170 #define TCG_CALL_PURE 0x0010 171 171 172 172 /* used to align parameters */ … … 230 230 int nb_temps; 231 231 /* index of free temps, -1 if none */ 232 int first_free_temp[TCG_TYPE_COUNT * 2]; 232 int first_free_temp[TCG_TYPE_COUNT * 2]; 233 233 234 234 /* goto_tb support */ … … 241 241 uint16_t *op_dead_iargs; /* for each operation, each bit tells if the 242 242 corresponding input argument is dead */ 243 243 244 244 /* tells in which temporary a given register is. It does not take 245 245 into account fixed registers */ … … 319 319 tcg_target_long start, tcg_target_long size); 320 320 TCGv tcg_global_reg_new(TCGType type, int reg, const char *name); 321 TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2, 321 TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2, 322 322 const char *name); 323 323 TCGv tcg_global_mem_new(TCGType type, int reg, tcg_target_long offset, … … 362 362 #define TCG_OPF_BB_END 0x01 /* instruction defines the end of a basic 363 363 block */ 364 #define TCG_OPF_CALL_CLOBBER 0x02 /* instruction clobbers call registers 364 #define TCG_OPF_CALL_CLOBBER 0x02 /* instruction clobbers call registers 365 365 and potentially update globals. */ 366 366 #define TCG_OPF_SIDE_EFFECTS 0x04 /* instruction has side effects : it … … 376 376 int *sorted_args; 377 377 } TCGOpDef; 378 378 379 379 typedef struct TCGTargetOpDef { 380 380 int op; … … 413 413 unsigned int nb_rets, const TCGv *rets, 414 414 unsigned int nb_params, const TCGv *args1); 415 void tcg_gen_shifti_i64(TCGv ret, TCGv arg1, 415 void tcg_gen_shifti_i64(TCGv ret, TCGv arg1, 416 416 int c, int right, int arith); 417 417 … … 436 436 #endif 437 437 438 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, 438 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, 439 439 int label_index, long addend); 440 440 const TCGArg *tcg_gen_code_op(TCGContext *s, int opc, const TCGArg *args1, … … 465 465 #if defined(VBOX) && defined(GCC_WITH_BUGGY_REGPARM) 466 466 #define tcg_qemu_tb_exec(tb_ptr, ret) \ 467 __asm__ __volatile__("call *%%ecx" : "=a"(ret) : "a"(tb_ptr), "c" (&code_gen_prologue[0]) : "memory", "%edx", "cc") 467 __asm__ __volatile__("call *%%ecx" : "=a"(ret) : "a"(tb_ptr), "c" (&code_gen_prologue[0]) : "memory", "%edx", "cc") 468 468 #else 469 469 #define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr) -
trunk/src/recompiler/tcg/x86_64/tcg-target.c
r21292 r26499 80 80 81 81 static const int tcg_target_call_oarg_regs[2] = { 82 TCG_REG_RAX, 83 TCG_REG_RDX 82 TCG_REG_RAX, 83 TCG_REG_RDX 84 84 }; 85 85 86 86 static uint8_t *tb_ret_addr; 87 87 88 static void patch_reloc(uint8_t *code_ptr, int type, 88 static void patch_reloc(uint8_t *code_ptr, int type, 89 89 tcg_target_long value, tcg_target_long addend) 90 90 { … … 227 227 #define P_REXW 0x200 /* set rex.w = 1 */ 228 228 #define P_REXB 0x400 /* force rex use for byte registers */ 229 229 230 230 static const uint8_t tcg_cond_to_jcc[10] = { 231 231 [TCG_COND_EQ] = JCC_JE, … … 244 244 { 245 245 int rex; 246 rex = ((opc >> 6) & 0x8) | ((r >> 1) & 0x4) | 246 rex = ((opc >> 6) & 0x8) | ((r >> 1) & 0x4) | 247 247 ((x >> 2) & 2) | ((rm >> 3) & 1); 248 248 if (rex || (opc & P_REXB)) { … … 272 272 273 273 /* rm < 0 means no register index plus (-rm - 1 immediate bytes) */ 274 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, 274 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, 275 275 tcg_target_long offset) 276 276 { … … 321 321 #if defined(CONFIG_SOFTMMU) 322 322 /* XXX: incomplete. index must be different from ESP */ 323 static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm, 323 static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm, 324 324 int index, int shift, 325 325 tcg_target_long offset) … … 363 363 } 364 364 365 static inline void tcg_out_movi(TCGContext *s, TCGType type, 365 static inline void tcg_out_movi(TCGContext *s, TCGType type, 366 366 int ret, tcg_target_long arg) 367 367 { … … 451 451 int32_t val, val1; 452 452 TCGLabel *l = &s->labels[label_index]; 453 453 454 454 if (l->has_value) { 455 455 val = l->u.value - (tcg_target_long)s->code_ptr; … … 483 483 } 484 484 485 static void tcg_out_brcond(TCGContext *s, int cond, 485 static void tcg_out_brcond(TCGContext *s, int cond, 486 486 TCGArg arg1, TCGArg arg2, int const_arg2, 487 487 int label_index, int rexw) … … 510 510 if ((val >> 32) != 0) 511 511 { 512 tcg_out8(s, 0xc7); /* mov imm32, 4(%rsp) */ 513 tcg_out8(s, 0x44); 512 tcg_out8(s, 0xc7); /* mov imm32, 4(%rsp) */ 513 tcg_out8(s, 0x44); 514 514 tcg_out8(s, 0x24); 515 515 tcg_out8(s, 0x04); … … 518 518 } 519 519 520 DECLINLINE(void) tcg_out_long_call(TCGContext *s, tcg_target_long dst) 520 DECLINLINE(void) tcg_out_long_call(TCGContext *s, tcg_target_long dst) 521 521 { 522 522 intptr_t disp = dst - (tcg_target_long)s->code_ptr - 5; … … 561 561 return; 562 562 } 563 563 564 564 disp = dst - (tcg_target_long)s->code_ptr - 5; 565 565 if (disp < 2LL * _1G && disp > -2LL * _1G) … … 577 577 tcg_out8(s, 0xe0); 578 578 #endif 579 } 579 } 580 580 #endif 581 581 … … 619 619 620 620 static void tcg_out_vbox_phys_read(TCGContext *s, int index, int addr_reg, int data_reg) { 621 if (addr_reg != TCG_REG_RDI) 621 if (addr_reg != TCG_REG_RDI) 622 622 /* mov addr_reg, %rdi */ 623 623 tcg_out_modrm(s, 0x8b | P_REXW, TCG_REG_RDI, addr_reg); 624 624 625 625 tcg_out_long_call(s, (tcg_target_long)vbox_ld_helpers[index]); 626 626 /* mov %rax, data_reg*/ … … 629 629 630 630 static void tcg_out_vbox_phys_write(TCGContext *s, int index, int addr_reg, int val_reg) { 631 if (addr_reg != TCG_REG_RDI) 631 if (addr_reg != TCG_REG_RDI) 632 632 /* mov addr_reg, %rdi */ 633 633 tcg_out_modrm(s, 0x8b | P_REXW, TCG_REG_RDI, addr_reg); 634 if (val_reg != TCG_REG_RSI) 634 if (val_reg != TCG_REG_RSI) 635 635 /* mov addr_reg, %rsi */ 636 636 tcg_out_modrm(s, 0x8b | P_REXW, TCG_REG_RSI, val_reg); … … 667 667 /* mov */ 668 668 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 669 669 670 670 tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */ 671 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 672 671 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 672 673 673 tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */ 674 674 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); 675 675 676 676 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */ 677 677 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); … … 683 683 /* cmp 0(r1), r0 */ 684 684 tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0); 685 685 686 686 /* mov */ 687 687 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 688 688 689 689 /* je label1 */ 690 690 tcg_out8(s, 0x70 + JCC_JE); … … 696 696 #ifndef VBOX 697 697 tcg_out8(s, 0xe8); 698 tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] - 698 tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] - 699 699 (tcg_target_long)s->code_ptr - 4); 700 700 #else … … 731 731 label2_ptr = s->code_ptr; 732 732 s->code_ptr++; 733 733 734 734 /* label1: */ 735 735 *label1_ptr = s->code_ptr - label1_ptr - 1; 736 736 737 737 /* add x(r1), r0 */ 738 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 738 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 739 739 offsetof(CPUTLBEntry, addr_read)); 740 740 #else 741 741 r0 = addr_reg; 742 #endif 742 #endif 743 743 744 744 #if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB) … … 764 764 if (bswap) { 765 765 /* rolw $8, data_reg */ 766 tcg_out8(s, 0x66); 766 tcg_out8(s, 0x66); 767 767 tcg_out_modrm(s, 0xc1, 0, data_reg); 768 768 tcg_out8(s, 8); … … 774 774 tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0); 775 775 /* rolw $8, data_reg */ 776 tcg_out8(s, 0x66); 776 tcg_out8(s, 0x66); 777 777 tcg_out_modrm(s, 0xc1, 0, data_reg); 778 778 tcg_out8(s, 8); … … 855 855 /* mov */ 856 856 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 857 857 858 858 tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */ 859 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 860 859 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 860 861 861 tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */ 862 862 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); 863 863 864 864 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */ 865 865 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); … … 871 871 /* cmp 0(r1), r0 */ 872 872 tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0); 873 873 874 874 /* mov */ 875 875 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 876 876 877 877 /* je label1 */ 878 878 tcg_out8(s, 0x70 + JCC_JE); … … 902 902 #ifndef VBOX 903 903 tcg_out8(s, 0xe8); 904 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 904 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 905 905 (tcg_target_long)s->code_ptr - 4); 906 906 #else … … 912 912 label2_ptr = s->code_ptr; 913 913 s->code_ptr++; 914 914 915 915 /* label1: */ 916 916 *label1_ptr = s->code_ptr - label1_ptr - 1; 917 917 918 918 /* add x(r1), r0 */ 919 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 919 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 920 920 offsetof(CPUTLBEntry, addr_write)); 921 921 #else … … 983 983 { 984 984 int c; 985 985 986 986 switch(opc) { 987 987 case INDEX_op_exit_tb: … … 1004 1004 /* jmp Ev */ 1005 1005 #ifndef VBOX 1006 tcg_out_modrm_offset(s, 0xff, 4, -1, 1007 (tcg_target_long)(s->tb_next + 1006 tcg_out_modrm_offset(s, 0xff, 4, -1, 1007 (tcg_target_long)(s->tb_next + 1008 1008 args[0])); 1009 1009 #else 1010 1010 /* @todo: can we clobber RAX here? */ 1011 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_RAX, 1011 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_RAX, 1012 1012 (tcg_target_long)&(s->tb_next[args[0]])); 1013 1013 tcg_out8(s, 0xff); tcg_out8(s, 0x20 | TCG_REG_RAX); /* jmp *(%rax) */ … … 1084 1084 tcg_out_modrm_offset(s, 0x8b | P_REXW, args[0], args[1], args[2]); 1085 1085 break; 1086 1086 1087 1087 case INDEX_op_st8_i32: 1088 1088 case INDEX_op_st8_i64: … … 1213 1213 c = SHIFT_SAR; 1214 1214 goto gen_shift32; 1215 1215 1216 1216 case INDEX_op_shl_i64: 1217 1217 c = SHIFT_SHL; … … 1234 1234 c = SHIFT_SAR; 1235 1235 goto gen_shift64; 1236 1236 1237 1237 case INDEX_op_brcond_i32: 1238 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1238 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1239 1239 args[3], 0); 1240 1240 break; 1241 1241 case INDEX_op_brcond_i64: 1242 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1242 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1243 1243 args[3], P_REXW); 1244 1244 break; … … 1295 1295 tcg_out_qemu_ld(s, args, 3); 1296 1296 break; 1297 1297 1298 1298 case INDEX_op_qemu_st8: 1299 1299 tcg_out_qemu_st(s, args, 0); … … 1338 1338 push_size = 8 + ARRAY_SIZE(tcg_target_callee_save_regs) * 8; 1339 1339 frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE; 1340 frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & 1340 frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & 1341 1341 ~(TCG_TARGET_STACK_ALIGN - 1); 1342 1342 stack_addend = frame_size - push_size; … … 1344 1344 1345 1345 tcg_out_modrm(s, 0xff, 4, TCG_REG_RDI); /* jmp *%rdi */ 1346 1346 1347 1347 /* TB epilogue */ 1348 1348 tb_ret_addr = s->code_ptr; … … 1453 1453 tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff); 1454 1454 tcg_regset_set32(tcg_target_call_clobber_regs, 0, 1455 (1 << TCG_REG_RDI) | 1456 (1 << TCG_REG_RSI) | 1455 (1 << TCG_REG_RDI) | 1456 (1 << TCG_REG_RSI) | 1457 1457 (1 << TCG_REG_RDX) | 1458 1458 (1 << TCG_REG_RCX) | … … 1462 1462 (1 << TCG_REG_R10) | 1463 1463 (1 << TCG_REG_R11)); 1464 1464 1465 1465 tcg_regset_clear(s->reserved_regs); 1466 1466 tcg_regset_set_reg(s->reserved_regs, TCG_REG_RSP); -
trunk/src/recompiler/tcg/x86_64/tcg-target.h
r21292 r26499 60 60 61 61 /* used for function call generation */ 62 #define TCG_REG_CALL_STACK TCG_REG_RSP 62 #define TCG_REG_CALL_STACK TCG_REG_RSP 63 63 #define TCG_TARGET_STACK_ALIGN 16 64 64 #define TCG_TARGET_CALL_STACK_OFFSET 0 -
trunk/src/recompiler/vl.h
r13370 r26499 1 1 /* 2 2 * QEMU System Emulator header 3 * 3 * 4 4 * Copyright (c) 2003 Fabrice Bellard 5 * 5 * 6 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 7 * of this software and associated documentation files (the "Software"), to deal … … 54 54 55 55 #ifdef _WIN32 56 #ifndef VBOX 56 #ifndef VBOX 57 57 #include <windows.h> 58 58 #define fsync _commit … … 250 250 typedef void IOHandler(void *opaque); 251 251 252 int qemu_set_fd_handler2(int fd, 253 IOCanRWHandler *fd_read_poll, 254 IOHandler *fd_read, 255 IOHandler *fd_write, 252 int qemu_set_fd_handler2(int fd, 253 IOCanRWHandler *fd_read_poll, 254 IOHandler *fd_read, 255 IOHandler *fd_write, 256 256 void *opaque); 257 257 int qemu_set_fd_handler(int fd, 258 IOHandler *fd_read, 258 IOHandler *fd_read, 259 259 IOHandler *fd_write, 260 260 void *opaque); … … 321 321 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); 322 322 void qemu_chr_send_event(CharDriverState *s, int event); 323 void qemu_chr_add_handlers(CharDriverState *s, 324 IOCanRWHandler *fd_can_read, 323 void qemu_chr_add_handlers(CharDriverState *s, 324 IOCanRWHandler *fd_can_read, 325 325 IOReadHandler *fd_read, 326 326 IOEventHandler *fd_event, … … 520 520 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); 521 521 522 int register_savevm(const char *idstr, 523 int instance_id, 522 int register_savevm(const char *idstr, 523 int instance_id, 524 524 int version_id, 525 525 SaveStateHandler *save_state, … … 564 564 typedef struct BlockDriverInfo { 565 565 /* in bytes, 0 if irrelevant */ 566 int cluster_size; 566 int cluster_size; 567 567 /* offset at which the VM state can be saved (0 if not possible) */ 568 int64_t vm_state_offset; 568 int64_t vm_state_offset; 569 569 } BlockDriverInfo; 570 570 … … 592 592 void bdrv_init(void); 593 593 BlockDriver *bdrv_find_format(const char *format_name); 594 int bdrv_create(BlockDriver *drv, 594 int bdrv_create(BlockDriver *drv, 595 595 const char *filename, int64_t size_in_sectors, 596 596 const char *backing_file, int flags); … … 602 602 BlockDriver *drv); 603 603 void bdrv_close(BlockDriverState *bs); 604 int bdrv_read(BlockDriverState *bs, int64_t sector_num, 604 int bdrv_read(BlockDriverState *bs, int64_t sector_num, 605 605 uint8_t *buf, int nb_sectors); 606 int bdrv_write(BlockDriverState *bs, int64_t sector_num, 606 int bdrv_write(BlockDriverState *bs, int64_t sector_num, 607 607 const uint8_t *buf, int nb_sectors); 608 int bdrv_pread(BlockDriverState *bs, int64_t offset, 608 int bdrv_pread(BlockDriverState *bs, int64_t offset, 609 609 void *buf, int count); 610 int bdrv_pwrite(BlockDriverState *bs, int64_t offset, 610 int bdrv_pwrite(BlockDriverState *bs, int64_t offset, 611 611 const void *buf, int count); 612 612 int bdrv_truncate(BlockDriverState *bs, int64_t offset); … … 646 646 #define BIOS_ATA_TRANSLATION_RECHS 4 647 647 648 void bdrv_set_geometry_hint(BlockDriverState *bs, 648 void bdrv_set_geometry_hint(BlockDriverState *bs, 649 649 int cyls, int heads, int secs); 650 650 void bdrv_set_type_hint(BlockDriverState *bs, int type); 651 651 void bdrv_set_translation_hint(BlockDriverState *bs, int translation); 652 void bdrv_get_geometry_hint(BlockDriverState *bs, 652 void bdrv_get_geometry_hint(BlockDriverState *bs, 653 653 int *pcyls, int *pheads, int *psecs); 654 654 int bdrv_get_type_hint(BlockDriverState *bs); … … 661 661 void bdrv_set_locked(BlockDriverState *bs, int locked); 662 662 void bdrv_eject(BlockDriverState *bs, int eject_flag); 663 void bdrv_set_change_cb(BlockDriverState *bs, 663 void bdrv_set_change_cb(BlockDriverState *bs, 664 664 void (*change_cb)(void *opaque), void *opaque); 665 665 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); … … 669 669 int bdrv_is_encrypted(BlockDriverState *bs); 670 670 int bdrv_set_key(BlockDriverState *bs, const char *key); 671 void bdrv_iterate_format(void (*it)(void *opaque, const char *name), 671 void bdrv_iterate_format(void (*it)(void *opaque, const char *name), 672 672 void *opaque); 673 673 const char *bdrv_get_device_name(BlockDriverState *bs); 674 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num, 674 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num, 675 675 const uint8_t *buf, int nb_sectors); 676 676 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi); 677 677 678 void bdrv_get_backing_filename(BlockDriverState *bs, 678 void bdrv_get_backing_filename(BlockDriverState *bs, 679 679 char *filename, int filename_size); 680 int bdrv_snapshot_create(BlockDriverState *bs, 680 int bdrv_snapshot_create(BlockDriverState *bs, 681 681 QEMUSnapshotInfo *sn_info); 682 int bdrv_snapshot_goto(BlockDriverState *bs, 682 int bdrv_snapshot_goto(BlockDriverState *bs, 683 683 const char *snapshot_id); 684 684 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id); 685 int bdrv_snapshot_list(BlockDriverState *bs, 685 int bdrv_snapshot_list(BlockDriverState *bs, 686 686 QEMUSnapshotInfo **psn_info); 687 687 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn); … … 695 695 #ifndef QEMU_TOOL 696 696 697 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, 697 typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, 698 698 int boot_device, 699 699 DisplayState *ds, const char **fd_filename, int snapshot, … … 720 720 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); 721 721 722 int register_ioport_read(int start, int length, int size, 722 int register_ioport_read(int start, int length, int size, 723 723 IOPortReadFunc *func, void *opaque); 724 int register_ioport_write(int start, int length, int size, 724 int register_ioport_write(int start, int length, int size, 725 725 IOPortWriteFunc *func, void *opaque); 726 726 void isa_unassign_ioport(int start, int length); … … 735 735 typedef struct PCIDevice PCIDevice; 736 736 737 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, 737 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, 738 738 uint32_t address, uint32_t data, int len); 739 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, 739 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, 740 740 uint32_t address, int len); 741 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, 741 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, 742 742 uint32_t addr, uint32_t size, int type); 743 743 … … 778 778 char name[64]; 779 779 PCIIORegion io_regions[PCI_NUM_REGIONS]; 780 780 781 781 /* do not access the following fields */ 782 782 PCIConfigReadFunc *config_read; … … 791 791 PCIDevice *pci_register_device(PCIBus *bus, const char *name, 792 792 int instance_size, int devfn, 793 PCIConfigReadFunc *config_read, 793 PCIConfigReadFunc *config_read, 794 794 PCIConfigWriteFunc *config_write); 795 795 796 void pci_register_io_region(PCIDevice *pci_dev, int region_num, 797 uint32_t size, int type, 796 void pci_register_io_region(PCIDevice *pci_dev, int region_num, 797 uint32_t size, int type, 798 798 PCIMapIORegionFunc *map_func); 799 799 800 800 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); 801 801 802 uint32_t pci_default_read_config(PCIDevice *d, 802 uint32_t pci_default_read_config(PCIDevice *d, 803 803 uint32_t address, int len); 804 void pci_default_write_config(PCIDevice *d, 804 void pci_default_write_config(PCIDevice *d, 805 805 uint32_t address, uint32_t val, int len); 806 806 void pci_device_save(PCIDevice *s, QEMUFile *f); … … 903 903 } 904 904 905 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 905 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 906 906 unsigned long vga_ram_offset, int vga_ram_size); 907 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 907 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 908 908 unsigned long vga_ram_offset, int vga_ram_size, 909 909 unsigned long vga_bios_offset, int vga_bios_size); 910 910 911 911 /* cirrus_vga.c */ 912 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 912 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 913 913 unsigned long vga_ram_offset, int vga_ram_size); 914 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 914 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 915 915 unsigned long vga_ram_offset, int vga_ram_size); 916 916 … … 975 975 typedef struct fdctrl_t fdctrl_t; 976 976 977 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, 977 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, 978 978 uint32_t io_base, 979 979 BlockDriverState **fds); … … 1171 1171 void *intctl); 1172 1172 void ledma_set_irq(void *opaque, int isr); 1173 void ledma_memory_read(void *opaque, target_phys_addr_t addr, 1173 void ledma_memory_read(void *opaque, target_phys_addr_t addr, 1174 1174 uint8_t *buf, int len, int do_bswap); 1175 void ledma_memory_write(void *opaque, target_phys_addr_t addr, 1175 void ledma_memory_write(void *opaque, target_phys_addr_t addr, 1176 1176 uint8_t *buf, int len, int do_bswap); 1177 1177 void espdma_raise_irq(void *opaque); … … 1243 1243 int adb_poll(ADBBusState *s, uint8_t *buf_out); 1244 1244 1245 ADBDevice *adb_register_device(ADBBusState *s, int devaddr, 1246 ADBDeviceRequest *devreq, 1247 ADBDeviceReset *devreset, 1245 ADBDevice *adb_register_device(ADBBusState *s, int devaddr, 1246 ADBDeviceRequest *devreq, 1247 ADBDeviceReset *devreset, 1248 1248 void *opaque); 1249 1249 void adb_kbd_init(ADBBusState *bus); … … 1379 1379 BlockDriverState *bs, 1380 1380 target_ulong sector_len, int nb_blocs, int width, 1381 uint16_t id0, uint16_t id1, 1381 uint16_t id0, uint16_t id1, 1382 1382 uint16_t id2, uint16_t id3); 1383 1383
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