Changeset 26499 in vbox for trunk/src/recompiler/tcg/x86_64
- Timestamp:
- Feb 14, 2010 8:22:40 AM (15 years ago)
- svn:sync-xref-src-repo-rev:
- 57669
- Location:
- trunk/src/recompiler/tcg/x86_64
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/recompiler/tcg/x86_64/tcg-target.c
r21292 r26499 80 80 81 81 static const int tcg_target_call_oarg_regs[2] = { 82 TCG_REG_RAX, 83 TCG_REG_RDX 82 TCG_REG_RAX, 83 TCG_REG_RDX 84 84 }; 85 85 86 86 static uint8_t *tb_ret_addr; 87 87 88 static void patch_reloc(uint8_t *code_ptr, int type, 88 static void patch_reloc(uint8_t *code_ptr, int type, 89 89 tcg_target_long value, tcg_target_long addend) 90 90 { … … 227 227 #define P_REXW 0x200 /* set rex.w = 1 */ 228 228 #define P_REXB 0x400 /* force rex use for byte registers */ 229 229 230 230 static const uint8_t tcg_cond_to_jcc[10] = { 231 231 [TCG_COND_EQ] = JCC_JE, … … 244 244 { 245 245 int rex; 246 rex = ((opc >> 6) & 0x8) | ((r >> 1) & 0x4) | 246 rex = ((opc >> 6) & 0x8) | ((r >> 1) & 0x4) | 247 247 ((x >> 2) & 2) | ((rm >> 3) & 1); 248 248 if (rex || (opc & P_REXB)) { … … 272 272 273 273 /* rm < 0 means no register index plus (-rm - 1 immediate bytes) */ 274 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, 274 static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, 275 275 tcg_target_long offset) 276 276 { … … 321 321 #if defined(CONFIG_SOFTMMU) 322 322 /* XXX: incomplete. index must be different from ESP */ 323 static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm, 323 static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm, 324 324 int index, int shift, 325 325 tcg_target_long offset) … … 363 363 } 364 364 365 static inline void tcg_out_movi(TCGContext *s, TCGType type, 365 static inline void tcg_out_movi(TCGContext *s, TCGType type, 366 366 int ret, tcg_target_long arg) 367 367 { … … 451 451 int32_t val, val1; 452 452 TCGLabel *l = &s->labels[label_index]; 453 453 454 454 if (l->has_value) { 455 455 val = l->u.value - (tcg_target_long)s->code_ptr; … … 483 483 } 484 484 485 static void tcg_out_brcond(TCGContext *s, int cond, 485 static void tcg_out_brcond(TCGContext *s, int cond, 486 486 TCGArg arg1, TCGArg arg2, int const_arg2, 487 487 int label_index, int rexw) … … 510 510 if ((val >> 32) != 0) 511 511 { 512 tcg_out8(s, 0xc7); /* mov imm32, 4(%rsp) */ 513 tcg_out8(s, 0x44); 512 tcg_out8(s, 0xc7); /* mov imm32, 4(%rsp) */ 513 tcg_out8(s, 0x44); 514 514 tcg_out8(s, 0x24); 515 515 tcg_out8(s, 0x04); … … 518 518 } 519 519 520 DECLINLINE(void) tcg_out_long_call(TCGContext *s, tcg_target_long dst) 520 DECLINLINE(void) tcg_out_long_call(TCGContext *s, tcg_target_long dst) 521 521 { 522 522 intptr_t disp = dst - (tcg_target_long)s->code_ptr - 5; … … 561 561 return; 562 562 } 563 563 564 564 disp = dst - (tcg_target_long)s->code_ptr - 5; 565 565 if (disp < 2LL * _1G && disp > -2LL * _1G) … … 577 577 tcg_out8(s, 0xe0); 578 578 #endif 579 } 579 } 580 580 #endif 581 581 … … 619 619 620 620 static void tcg_out_vbox_phys_read(TCGContext *s, int index, int addr_reg, int data_reg) { 621 if (addr_reg != TCG_REG_RDI) 621 if (addr_reg != TCG_REG_RDI) 622 622 /* mov addr_reg, %rdi */ 623 623 tcg_out_modrm(s, 0x8b | P_REXW, TCG_REG_RDI, addr_reg); 624 624 625 625 tcg_out_long_call(s, (tcg_target_long)vbox_ld_helpers[index]); 626 626 /* mov %rax, data_reg*/ … … 629 629 630 630 static void tcg_out_vbox_phys_write(TCGContext *s, int index, int addr_reg, int val_reg) { 631 if (addr_reg != TCG_REG_RDI) 631 if (addr_reg != TCG_REG_RDI) 632 632 /* mov addr_reg, %rdi */ 633 633 tcg_out_modrm(s, 0x8b | P_REXW, TCG_REG_RDI, addr_reg); 634 if (val_reg != TCG_REG_RSI) 634 if (val_reg != TCG_REG_RSI) 635 635 /* mov addr_reg, %rsi */ 636 636 tcg_out_modrm(s, 0x8b | P_REXW, TCG_REG_RSI, val_reg); … … 667 667 /* mov */ 668 668 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 669 669 670 670 tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */ 671 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 672 671 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 672 673 673 tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */ 674 674 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); 675 675 676 676 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */ 677 677 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); … … 683 683 /* cmp 0(r1), r0 */ 684 684 tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0); 685 685 686 686 /* mov */ 687 687 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 688 688 689 689 /* je label1 */ 690 690 tcg_out8(s, 0x70 + JCC_JE); … … 696 696 #ifndef VBOX 697 697 tcg_out8(s, 0xe8); 698 tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] - 698 tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] - 699 699 (tcg_target_long)s->code_ptr - 4); 700 700 #else … … 731 731 label2_ptr = s->code_ptr; 732 732 s->code_ptr++; 733 733 734 734 /* label1: */ 735 735 *label1_ptr = s->code_ptr - label1_ptr - 1; 736 736 737 737 /* add x(r1), r0 */ 738 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 738 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 739 739 offsetof(CPUTLBEntry, addr_read)); 740 740 #else 741 741 r0 = addr_reg; 742 #endif 742 #endif 743 743 744 744 #if !defined(VBOX) || !defined(REM_PHYS_ADDR_IN_TLB) … … 764 764 if (bswap) { 765 765 /* rolw $8, data_reg */ 766 tcg_out8(s, 0x66); 766 tcg_out8(s, 0x66); 767 767 tcg_out_modrm(s, 0xc1, 0, data_reg); 768 768 tcg_out8(s, 8); … … 774 774 tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0); 775 775 /* rolw $8, data_reg */ 776 tcg_out8(s, 0x66); 776 tcg_out8(s, 0x66); 777 777 tcg_out_modrm(s, 0xc1, 0, data_reg); 778 778 tcg_out8(s, 8); … … 855 855 /* mov */ 856 856 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 857 857 858 858 tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */ 859 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 860 859 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 860 861 861 tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */ 862 862 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1)); 863 863 864 864 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */ 865 865 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); … … 871 871 /* cmp 0(r1), r0 */ 872 872 tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0); 873 873 874 874 /* mov */ 875 875 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 876 876 877 877 /* je label1 */ 878 878 tcg_out8(s, 0x70 + JCC_JE); … … 902 902 #ifndef VBOX 903 903 tcg_out8(s, 0xe8); 904 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 904 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 905 905 (tcg_target_long)s->code_ptr - 4); 906 906 #else … … 912 912 label2_ptr = s->code_ptr; 913 913 s->code_ptr++; 914 914 915 915 /* label1: */ 916 916 *label1_ptr = s->code_ptr - label1_ptr - 1; 917 917 918 918 /* add x(r1), r0 */ 919 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 919 tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 920 920 offsetof(CPUTLBEntry, addr_write)); 921 921 #else … … 983 983 { 984 984 int c; 985 985 986 986 switch(opc) { 987 987 case INDEX_op_exit_tb: … … 1004 1004 /* jmp Ev */ 1005 1005 #ifndef VBOX 1006 tcg_out_modrm_offset(s, 0xff, 4, -1, 1007 (tcg_target_long)(s->tb_next + 1006 tcg_out_modrm_offset(s, 0xff, 4, -1, 1007 (tcg_target_long)(s->tb_next + 1008 1008 args[0])); 1009 1009 #else 1010 1010 /* @todo: can we clobber RAX here? */ 1011 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_RAX, 1011 tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_RAX, 1012 1012 (tcg_target_long)&(s->tb_next[args[0]])); 1013 1013 tcg_out8(s, 0xff); tcg_out8(s, 0x20 | TCG_REG_RAX); /* jmp *(%rax) */ … … 1084 1084 tcg_out_modrm_offset(s, 0x8b | P_REXW, args[0], args[1], args[2]); 1085 1085 break; 1086 1086 1087 1087 case INDEX_op_st8_i32: 1088 1088 case INDEX_op_st8_i64: … … 1213 1213 c = SHIFT_SAR; 1214 1214 goto gen_shift32; 1215 1215 1216 1216 case INDEX_op_shl_i64: 1217 1217 c = SHIFT_SHL; … … 1234 1234 c = SHIFT_SAR; 1235 1235 goto gen_shift64; 1236 1236 1237 1237 case INDEX_op_brcond_i32: 1238 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1238 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1239 1239 args[3], 0); 1240 1240 break; 1241 1241 case INDEX_op_brcond_i64: 1242 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1242 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 1243 1243 args[3], P_REXW); 1244 1244 break; … … 1295 1295 tcg_out_qemu_ld(s, args, 3); 1296 1296 break; 1297 1297 1298 1298 case INDEX_op_qemu_st8: 1299 1299 tcg_out_qemu_st(s, args, 0); … … 1338 1338 push_size = 8 + ARRAY_SIZE(tcg_target_callee_save_regs) * 8; 1339 1339 frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE; 1340 frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & 1340 frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & 1341 1341 ~(TCG_TARGET_STACK_ALIGN - 1); 1342 1342 stack_addend = frame_size - push_size; … … 1344 1344 1345 1345 tcg_out_modrm(s, 0xff, 4, TCG_REG_RDI); /* jmp *%rdi */ 1346 1346 1347 1347 /* TB epilogue */ 1348 1348 tb_ret_addr = s->code_ptr; … … 1453 1453 tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff); 1454 1454 tcg_regset_set32(tcg_target_call_clobber_regs, 0, 1455 (1 << TCG_REG_RDI) | 1456 (1 << TCG_REG_RSI) | 1455 (1 << TCG_REG_RDI) | 1456 (1 << TCG_REG_RSI) | 1457 1457 (1 << TCG_REG_RDX) | 1458 1458 (1 << TCG_REG_RCX) | … … 1462 1462 (1 << TCG_REG_R10) | 1463 1463 (1 << TCG_REG_R11)); 1464 1464 1465 1465 tcg_regset_clear(s->reserved_regs); 1466 1466 tcg_regset_set_reg(s->reserved_regs, TCG_REG_RSP); -
trunk/src/recompiler/tcg/x86_64/tcg-target.h
r21292 r26499 60 60 61 61 /* used for function call generation */ 62 #define TCG_REG_CALL_STACK TCG_REG_RSP 62 #define TCG_REG_CALL_STACK TCG_REG_RSP 63 63 #define TCG_TARGET_STACK_ALIGN 16 64 64 #define TCG_TARGET_CALL_STACK_OFFSET 0
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