VirtualBox

Ignore:
Timestamp:
Jul 22, 2010 3:41:21 PM (14 years ago)
Author:
vboxsync
Message:

HDA: Added a few R/O registers.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp

    r30992 r31009  
    5858#define HDA_REG_SVALUE(pState, reg, val) (HDA_REG_VALUE(pState, reg, val) >> (HDA_REG_FIELD_SHIFT(reg, val)))
    5959
    60 #define ICH6_HDA_REG_GCAP 0 /* range 0x00*/
     60#define ICH6_HDA_REG_GCAP 0 /* range 0x00-0x01*/
    6161#define GCAP(pState) (HDA_REG((pState), GCAP))
     62
     63#define ICH6_HDA_REG_VMIN 1 /* range 0x02 */
     64#define VMIN(pState) (HDA_REG((pState), VMIN))
     65
     66#define ICH6_HDA_REG_VMAJ 2 /* range 0x03 */
     67#define VMAJ(pState) (HDA_REG((pState), VMAJ))
     68
     69#define ICH6_HDA_REG_OUTPAY 3 /* range 0x04-0x05 */
     70#define OUTPAY(pState) (HDA_REG((pState), OUTPAY))
     71
     72#define ICH6_HDA_REG_INPAY 4 /* range 0x06-0x07 */
     73#define INPAY(pState) (HDA_REG((pState), INPAY))
    6274
    6375#define ICH6_HDA_REG_GCTL (5)
     
    431443    /*-------  -------  ----------  ----------  -----------------------  ------------------------ ----------    ------------------------------*/
    432444    { 0x00000, 0x00002, 0x0000FFFB, 0x00000000, hdaRegReadGCAP         , hdaRegWriteUnimplemented, "GCAP"      , "Global Capabilities" },
    433     { 0x00002, 0x00001, 0xFFFFFFFF, 0x00000000, hdaRegReadUnimplemented, hdaRegWriteUnimplemented, "VMIN"      , "Minor Version" },
    434     { 0x00003, 0x00001, 0xFFFFFFFF, 0x00000000, hdaRegReadUnimplemented, hdaRegWriteUnimplemented, "VMAJ"      , "Major Version" },
    435     { 0x00004, 0x00002, 0xFFFFFFFF, 0x00000000, hdaRegReadUnimplemented, hdaRegWriteUnimplemented, "OUTPAY"    , "Output Payload Capabilities" },
    436     { 0x00006, 0x00002, 0xFFFFFFFF, 0x00000000, hdaRegReadUnimplemented, hdaRegWriteUnimplemented, "INPAY"     , "Input Payload Capabilities" },
     445    { 0x00002, 0x00001, 0x000000FF, 0x00000000, hdaRegReadU8           , hdaRegWriteUnimplemented, "VMIN"      , "Minor Version" },
     446    { 0x00003, 0x00001, 0x000000FF, 0x00000000, hdaRegReadU8           , hdaRegWriteUnimplemented, "VMAJ"      , "Major Version" },
     447    { 0x00004, 0x00002, 0x0000FFFF, 0x00000000, hdaRegReadU16          , hdaRegWriteUnimplemented, "OUTPAY"    , "Output Payload Capabilities" },
     448    { 0x00006, 0x00002, 0x0000FFFF, 0x00000000, hdaRegReadU16          , hdaRegWriteUnimplemented, "INPAY"     , "Input Payload Capabilities" },
    437449    { 0x00008, 0x00004, 0x00000103, 0x00000103, hdaRegReadGCTL         , hdaRegWriteGCTL         , "GCTL"      , "Global Control" },
    438450    { 0x0000c, 0x00002, 0xFFFFFFFF, 0x00000000, hdaRegReadUnimplemented, hdaRegWriteUnimplemented, "WAKEEN"    , "Wake Enable" },
     
    13141326    PCIINTELHDLinkState *pThis = PDMINS_2_DATA(pDevIns, PCIINTELHDLinkState *);
    13151327    GCAP(&pThis->hda) = 0x4401; /* see 6.2.1 */
     1328    VMIN(&pThis->hda) = 0x00;       /* see 6.2.2 */
     1329    VMAJ(&pThis->hda) = 0x01;       /* see 6.2.3 */
     1330    VMAJ(&pThis->hda) = 0x01;       /* see 6.2.3 */
     1331    OUTPAY(&pThis->hda) = 0x003C;   /* see 6.2.4 */
     1332    INPAY(&pThis->hda)  = 0x001D;   /* see 6.2.5 */
    13161333    pThis->hda.au32Regs[ICH6_HDA_REG_CORBSIZE] = 0x42; /* see 6.2.1 */
    13171334    pThis->hda.au32Regs[ICH6_HDA_REG_RIRBSIZE] = 0x42; /* see 6.2.1 */
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