Changeset 31136 in vbox for trunk/src/VBox/VMM/PGMInternal.h
- Timestamp:
- Jul 27, 2010 12:06:18 PM (14 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/PGMInternal.h
r31123 r31136 2621 2621 STAMPROFILE StatR3ResolveConflict; /**< R3: pgmR3SyncPTResolveConflict() profiling (includes the entire relocation). */ 2622 2622 2623 /* R3+RZ */ 2623 2624 STAMCOUNTER StatRZChunkR3MapTlbHits; /**< RC/R0: Ring-3/0 chunk mapper TLB hits. */ 2624 2625 STAMCOUNTER StatRZChunkR3MapTlbMisses; /**< RC/R0: Ring-3/0 chunk mapper TLB misses. */ … … 2637 2638 STAMCOUNTER StatR3PhysHandlerReset; /**< R3: The number of times PGMHandlerPhysicalReset is called. */ 2638 2639 STAMCOUNTER StatRZPhysHandlerReset; /**< RC/R0: The number of times PGMHandlerPhysicalReset is called. */ 2640 STAMCOUNTER StatR3PhysHandlerLookupHits; /**< R3: Number of cache hits when looking up physical handlers. */ 2641 STAMCOUNTER StatR3PhysHandlerLookupMisses; /**< R3: Number of cache misses when looking up physical handlers. */ 2642 STAMCOUNTER StatRZPhysHandlerLookupHits; /**< RC/R0: Number of cache hits when lookup up physical handlers. */ 2643 STAMCOUNTER StatRZPhysHandlerLookupMisses; /**< RC/R0: Number of cache misses when looking up physical handlers */ 2639 2644 STAMPROFILE StatRZVirtHandlerSearchByPhys; /**< RC/R0: Profiling of pgmHandlerVirtualFindByPhysAddr. */ 2640 2645 STAMPROFILE StatR3VirtHandlerSearchByPhys; /**< R3: Profiling of pgmHandlerVirtualFindByPhysAddr. */ … … 2716 2721 { 2717 2722 /** Offset to the VM structure. */ 2718 RTINToffVM;2723 int32_t offVM; 2719 2724 /** Offset of the PGMCPU structure relative to VMCPU. */ 2720 RTINToffVCpuPGM;2725 int32_t offVCpuPGM; 2721 2726 2722 2727 /** @cfgm{RamPreAlloc, boolean, false} … … 2740 2745 /** The host paging mode. (This is what SUPLib reports.) */ 2741 2746 SUPPAGINGMODE enmHostMode; 2742 2743 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */ 2744 RCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC; 2745 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */ 2746 RCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC; 2747 2748 /** 4 MB page mask; 32 or 36 bits depending on PSE-36 (identical for all VCPUs) */ 2749 RTGCPHYS GCPhys4MBPSEMask; 2750 /** Mask containing the invalid bits of a guest physical address. 2751 * @remarks this does not stop at bit 52. */ 2752 RTGCPHYS GCPhysInvAddrMask; 2753 2754 /** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for R3. 2755 * This is sorted by physical address and contains no overlapping ranges. */ 2756 R3PTRTYPE(PPGMRAMRANGE) pRamRangesR3; 2757 /** R0 pointer corresponding to PGM::pRamRangesR3. */ 2758 R0PTRTYPE(PPGMRAMRANGE) pRamRangesR0; 2759 /** RC pointer corresponding to PGM::pRamRangesR3. */ 2760 RCPTRTYPE(PPGMRAMRANGE) pRamRangesRC; 2761 /** Generation ID for the RAM ranges. This member is incremented everytime a RAM 2762 * range is linked or unlinked. */ 2763 uint32_t volatile idRamRangesGen; 2764 2765 /** Pointer to the list of ROM ranges - for R3. 2766 * This is sorted by physical address and contains no overlapping ranges. */ 2767 R3PTRTYPE(PPGMROMRANGE) pRomRangesR3; 2768 /** R0 pointer corresponding to PGM::pRomRangesR3. */ 2769 R0PTRTYPE(PPGMROMRANGE) pRomRangesR0; 2770 /** RC pointer corresponding to PGM::pRomRangesR3. */ 2771 RCPTRTYPE(PPGMROMRANGE) pRomRangesRC; 2772 #if HC_ARCH_BITS == 64 2773 /** Alignment padding. */ 2774 RTRCPTR GCPtrPadding2; 2775 #endif 2776 2777 /** Pointer to the list of MMIO2 ranges - for R3. 2778 * Registration order. */ 2779 R3PTRTYPE(PPGMMMIO2RANGE) pMmio2RangesR3; 2780 2781 /** PGM offset based trees - R3 Ptr. */ 2782 R3PTRTYPE(PPGMTREES) pTreesR3; 2783 /** PGM offset based trees - R0 Ptr. */ 2784 R0PTRTYPE(PPGMTREES) pTreesR0; 2785 /** PGM offset based trees - RC Ptr. */ 2786 RCPTRTYPE(PPGMTREES) pTreesRC; 2787 2788 /** Linked list of GC mappings - for RC. 2789 * The list is sorted ascending on address. 2790 */ 2791 RCPTRTYPE(PPGMMAPPING) pMappingsRC; 2792 /** Linked list of GC mappings - for HC. 2793 * The list is sorted ascending on address. 2794 */ 2795 R3PTRTYPE(PPGMMAPPING) pMappingsR3; 2796 /** Linked list of GC mappings - for R0. 2797 * The list is sorted ascending on address. 2798 */ 2799 R0PTRTYPE(PPGMMAPPING) pMappingsR0; 2800 2801 /** Pointer to the 5 page CR3 content mapping. 2802 * The first page is always the CR3 (in some form) while the 4 other pages 2803 * are used of the PDs in PAE mode. */ 2804 RTGCPTR GCPtrCR3Mapping; 2805 #if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 2806 uint32_t u32Alignment1; 2807 #endif 2747 /** We're not in a state which permits writes to guest memory. 2748 * (Only used in strict builds.) */ 2749 bool fNoMorePhysWrites; 2750 /** Alignment padding that makes the next member start on a 8 byte boundrary. */ 2751 bool afAlignment1[3]; 2808 2752 2809 2753 /** Indicates that PGMR3FinalizeMappings has been called and that further … … 2821 2765 * This is valid if either fMappingsFixed or fMappingsFixedRestored is set. */ 2822 2766 uint32_t cbMappingFixed; 2767 /** Generation ID for the RAM ranges. This member is incremented everytime 2768 * a RAM range is linked or unlinked. */ 2769 uint32_t volatile idRamRangesGen; 2770 2823 2771 /** Base address (GC) of fixed mapping. 2824 2772 * This is valid if either fMappingsFixed or fMappingsFixedRestored is set. */ … … 2826 2774 /** The address of the previous RAM range mapping. */ 2827 2775 RTGCPTR GCPtrPrevRamRangeMapping; 2776 2777 /** 4 MB page mask; 32 or 36 bits depending on PSE-36 (identical for all VCPUs) */ 2778 RTGCPHYS GCPhys4MBPSEMask; 2779 /** Mask containing the invalid bits of a guest physical address. 2780 * @remarks this does not stop at bit 52. */ 2781 RTGCPHYS GCPhysInvAddrMask; 2782 2783 2784 /** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for R3. 2785 * This is sorted by physical address and contains no overlapping ranges. */ 2786 R3PTRTYPE(PPGMRAMRANGE) pRamRangesR3; 2787 /** PGM offset based trees - R3 Ptr. */ 2788 R3PTRTYPE(PPGMTREES) pTreesR3; 2789 /** Caching the last physical handler we looked up in R3. */ 2790 R3PTRTYPE(PPGMPHYSHANDLER) pLastPhysHandlerR3; 2791 /** Shadow Page Pool - R3 Ptr. */ 2792 R3PTRTYPE(PPGMPOOL) pPoolR3; 2793 /** Linked list of GC mappings - for HC. 2794 * The list is sorted ascending on address. */ 2795 R3PTRTYPE(PPGMMAPPING) pMappingsR3; 2796 /** Pointer to the list of ROM ranges - for R3. 2797 * This is sorted by physical address and contains no overlapping ranges. */ 2798 R3PTRTYPE(PPGMROMRANGE) pRomRangesR3; 2799 /** Pointer to the list of MMIO2 ranges - for R3. 2800 * Registration order. */ 2801 R3PTRTYPE(PPGMMMIO2RANGE) pMmio2RangesR3; 2802 /** Pointer to SHW+GST mode data (function pointers). 2803 * The index into this table is made up from */ 2804 R3PTRTYPE(PPGMMODEDATA) paModeData; 2805 /*RTR3PTR R3PtrAlignment0;*/ 2806 2807 2808 /** R0 pointer corresponding to PGM::pRamRangesR3. */ 2809 R0PTRTYPE(PPGMRAMRANGE) pRamRangesR0; 2810 /** PGM offset based trees - R0 Ptr. */ 2811 R0PTRTYPE(PPGMTREES) pTreesR0; 2812 /** Caching the last physical handler we looked up in R0. */ 2813 R0PTRTYPE(PPGMPHYSHANDLER) pLastPhysHandlerR0; 2814 /** Shadow Page Pool - R0 Ptr. */ 2815 R0PTRTYPE(PPGMPOOL) pPoolR0; 2816 /** Linked list of GC mappings - for R0. 2817 * The list is sorted ascending on address. */ 2818 R0PTRTYPE(PPGMMAPPING) pMappingsR0; 2819 /** R0 pointer corresponding to PGM::pRomRangesR3. */ 2820 R0PTRTYPE(PPGMROMRANGE) pRomRangesR0; 2821 /*RTR0PTR R0PtrAlignment0;*/ 2822 2823 2824 /** RC pointer corresponding to PGM::pRamRangesR3. */ 2825 RCPTRTYPE(PPGMRAMRANGE) pRamRangesRC; 2826 /** PGM offset based trees - RC Ptr. */ 2827 RCPTRTYPE(PPGMTREES) pTreesRC; 2828 /** Caching the last physical handler we looked up in RC. */ 2829 RCPTRTYPE(PPGMPHYSHANDLER) pLastPhysHandlerRC; 2830 /** Shadow Page Pool - RC Ptr. */ 2831 RCPTRTYPE(PPGMPOOL) pPoolRC; 2832 /** Linked list of GC mappings - for RC. 2833 * The list is sorted ascending on address. */ 2834 RCPTRTYPE(PPGMMAPPING) pMappingsRC; 2835 /** RC pointer corresponding to PGM::pRomRangesR3. */ 2836 RCPTRTYPE(PPGMROMRANGE) pRomRangesRC; 2837 /*RTRCPTR RCPtrAlignment0;*/ 2838 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */ 2839 RCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC; 2840 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */ 2841 RCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC; 2842 2843 2844 /** Pointer to the 5 page CR3 content mapping. 2845 * The first page is always the CR3 (in some form) while the 4 other pages 2846 * are used of the PDs in PAE mode. */ 2847 RTGCPTR GCPtrCR3Mapping; 2828 2848 2829 2849 /** @name Intermediate Context … … 2877 2897 */ 2878 2898 PDMCRITSECT CritSect; 2879 2880 /** Pointer to SHW+GST mode data (function pointers).2881 * The index into this table is made up from */2882 R3PTRTYPE(PPGMMODEDATA) paModeData;2883 2884 /** Shadow Page Pool - R3 Ptr. */2885 R3PTRTYPE(PPGMPOOL) pPoolR3;2886 /** Shadow Page Pool - R0 Ptr. */2887 R0PTRTYPE(PPGMPOOL) pPoolR0;2888 /** Shadow Page Pool - RC Ptr. */2889 RCPTRTYPE(PPGMPOOL) pPoolRC;2890 2891 /** We're not in a state which permits writes to guest memory.2892 * (Only used in strict builds.) */2893 bool fNoMorePhysWrites;2894 /** Alignment padding that makes the next member start on a 8 byte boundrary. */2895 bool afAlignment3[HC_ARCH_BITS == 32 ? 7: 3];2896 2899 2897 2900 /** … … 3350 3353 bool fGst32BitPageSizeExtension; 3351 3354 /** Alignment padding. */ 3352 bool afAlignment 4[3];3355 bool afAlignment2[3]; 3353 3356 /** @} */ 3354 3357
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