Changeset 31167 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Jul 28, 2010 2:38:43 PM (15 years ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r31123 r31167 69 69 *******************************************************************************/ 70 70 DECLINLINE(int) pgmShwGetLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD); 71 DECLINLINE(int) pgmShwGetPaePoolPagePD(P PGMCPU pPGM, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde);71 DECLINLINE(int) pgmShwGetPaePoolPagePD(PVMCPU pVCpu, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde); 72 72 #ifndef IN_RC 73 73 static int pgmShwSyncLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, X86PGPAEUINT uGstPml4e, X86PGPAEUINT uGstPdpe, PX86PDPAE *ppPD); … … 920 920 { 921 921 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE; 922 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr( &pVCpu->pgm.s);922 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr(pVCpu); 923 923 PX86PDPE pPdpe = &pPdpt->a[iPdPt]; 924 924 PVM pVM = pVCpu->CTX_SUFF(pVM); … … 1010 1010 * 1011 1011 * @returns Pointer to the PDE. 1012 * @param p PGM Pointer to the PGMCPU instance data.1012 * @param pVCpu The current CPU. 1013 1013 * @param GCPtr The address. 1014 1014 * @param ppShwPde Receives the address of the pgm pool page for the shadow page directory 1015 1015 */ 1016 DECLINLINE(int) pgmShwGetPaePoolPagePD(P PGMCPU pPGM, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde)1016 DECLINLINE(int) pgmShwGetPaePoolPagePD(PVMCPU pVCpu, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde) 1017 1017 { 1018 1018 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE; 1019 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr(pPGM); 1020 1021 Assert(PGMIsLockOwner(PGMCPU2VM(pPGM))); 1019 PX86PDPT pPdpt = pgmShwGetPaePDPTPtr(pVCpu); 1020 PVM pVM = pVCpu->CTX_SUFF(pVM); 1021 1022 Assert(PGMIsLockOwner(pVM)); 1022 1023 1023 1024 AssertReturn(pPdpt, VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT); /* can't happen */ … … 1030 1031 1031 1032 /* Fetch the pgm pool shadow descriptor. */ 1032 PPGMPOOLPAGE pShwPde = pgmPoolGetPage( PGMCPU2PGM(pPGM)->CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);1033 PPGMPOOLPAGE pShwPde = pgmPoolGetPage(pVM->pgm.s.CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK); 1033 1034 AssertReturn(pShwPde, VERR_INTERNAL_ERROR); 1034 1035 … … 1060 1061 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1061 1062 const unsigned iPml4 = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK; 1062 PX86PML4E pPml4e = pgmShwGetLongModePML4EPtr(p PGM, iPml4);1063 PX86PML4E pPml4e = pgmShwGetLongModePML4EPtr(pVCpu, iPml4); 1063 1064 bool fNestedPagingOrNoGstPaging = pVM->pgm.s.fNestedPaging || !CPUMIsGuestPagingEnabled(pVCpu); 1064 1065 PPGMPOOLPAGE pShwPage; … … 1159 1160 PPGMCPU pPGM = &pVCpu->pgm.s; 1160 1161 const unsigned iPml4 = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK; 1161 PCX86PML4E pPml4e = pgmShwGetLongModePML4EPtr(p PGM, iPml4);1162 PCX86PML4E pPml4e = pgmShwGetLongModePML4EPtr(pVCpu, iPml4); 1162 1163 1163 1164 Assert(PGMIsLockOwner(PGMCPU2VM(pPGM))); … … 1202 1203 static int pgmShwGetEPTPDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD) 1203 1204 { 1204 PPGMCPU pPGM = &pVCpu->pgm.s;1205 1205 PVM pVM = pVCpu->CTX_SUFF(pVM); 1206 1206 const unsigned iPml4 = (GCPtr >> EPT_PML4_SHIFT) & EPT_PML4_MASK; … … 1214 1214 Assert(PGMIsLockOwner(pVM)); 1215 1215 1216 pPml4 = (PEPTPML4)PGMPOOL_PAGE_2_PTR _BY_PGMCPU(pPGM, pPGM->CTX_SUFF(pShwPageCR3));1216 pPml4 = (PEPTPML4)PGMPOOL_PAGE_2_PTR(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)); 1217 1217 Assert(pPml4); 1218 1218 -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r31141 r31167 511 511 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 512 512 const unsigned iPDDst = pvFault >> SHW_PD_SHIFT; 513 PX86PD pPDDst = pgmShwGet32BitPDPtr( &pVCpu->pgm.s);513 PX86PD pPDDst = pgmShwGet32BitPDPtr(pVCpu); 514 514 515 515 # elif PGM_SHW_TYPE == PGM_TYPE_PAE … … 1068 1068 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 1069 1069 const unsigned iPDDst = (GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK; 1070 PX86PDE pPdeDst = pgmShwGet32BitPDEPtr( &pVCpu->pgm.s, GCPtrPage);1070 PX86PDE pPdeDst = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage); 1071 1071 1072 1072 /* Fetch the pgm pool shadow descriptor. */ … … 1076 1076 # elif PGM_SHW_TYPE == PGM_TYPE_PAE 1077 1077 const unsigned iPdpt = (GCPtrPage >> X86_PDPT_SHIFT); 1078 PX86PDPT pPdptDst = pgmShwGetPaePDPTPtr( &pVCpu->pgm.s);1078 PX86PDPT pPdptDst = pgmShwGetPaePDPTPtr(pVCpu); 1079 1079 1080 1080 /* If the shadow PDPE isn't present, then skip the invalidate. */ … … 1091 1091 1092 1092 /* Fetch the pgm pool shadow descriptor. */ 1093 rc = pgmShwGetPaePoolPagePD( &pVCpu->pgm.s, GCPtrPage, &pShwPde);1093 rc = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde); 1094 1094 AssertRCSuccessReturn(rc, rc); 1095 1095 Assert(pShwPde); 1096 1096 1097 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPde);1097 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde); 1098 1098 PX86PDEPAE pPdeDst = &pPDDst->a[iPDDst]; 1099 1099 … … 1727 1727 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 1728 1728 const unsigned iPDDst = (GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK; 1729 PX86PDE pPdeDst = pgmShwGet32BitPDEPtr( &pVCpu->pgm.s, GCPtrPage);1729 PX86PDE pPdeDst = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage); 1730 1730 1731 1731 /* Fetch the pgm pool shadow descriptor. */ … … 1739 1739 1740 1740 /* Fetch the pgm pool shadow descriptor. */ 1741 int rc2 = pgmShwGetPaePoolPagePD( &pVCpu->pgm.s, GCPtrPage, &pShwPde);1741 int rc2 = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde); 1742 1742 AssertRCSuccessReturn(rc2, rc2); 1743 1743 Assert(pShwPde); 1744 1744 1745 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPde);1745 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde); 1746 1746 PX86PDEPAE pPdeDst = &pPDDst->a[iPDDst]; 1747 1747 … … 2057 2057 */ 2058 2058 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 2059 X86PDE PdeDst = pgmShwGet32BitPDE( &pVCpu->pgm.s, GCPtrPage);2059 X86PDE PdeDst = pgmShwGet32BitPDE(pVCpu, GCPtrPage); 2060 2060 2061 2061 # elif PGM_SHW_TYPE == PGM_TYPE_PAE 2062 X86PDEPAE PdeDst = pgmShwGetPaePDE( &pVCpu->pgm.s, GCPtrPage);2062 X86PDEPAE PdeDst = pgmShwGetPaePDE(pVCpu, GCPtrPage); 2063 2063 2064 2064 # elif PGM_SHW_TYPE == PGM_TYPE_AMD64 … … 2480 2480 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 2481 2481 const unsigned iPDDst = GCPtrPage >> SHW_PD_SHIFT; 2482 PSHWPDE pPdeDst = pgmShwGet32BitPDEPtr( &pVCpu->pgm.s, GCPtrPage);2482 PSHWPDE pPdeDst = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage); 2483 2483 2484 2484 /* Fetch the pgm pool shadow descriptor. */ … … 2493 2493 2494 2494 /* Fetch the pgm pool shadow descriptor. */ 2495 rc = pgmShwGetPaePoolPagePD( &pVCpu->pgm.s, GCPtrPage, &pShwPde);2495 rc = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde); 2496 2496 AssertRCSuccessReturn(rc, rc); 2497 2497 Assert(pShwPde); 2498 2498 2499 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPde);2499 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde); 2500 2500 pPdeDst = &pPDDst->a[iPDDst]; 2501 2501 … … 2934 2934 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 2935 2935 const unsigned iPDDst = (GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK; 2936 PSHWPDE pPdeDst = pgmShwGet32BitPDEPtr( &pVCpu->pgm.s, GCPtrPage);2936 PSHWPDE pPdeDst = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage); 2937 2937 2938 2938 /* Fetch the pgm pool shadow descriptor. */ … … 2947 2947 2948 2948 /* Fetch the pgm pool shadow descriptor. */ 2949 rc = pgmShwGetPaePoolPagePD( &pVCpu->pgm.s, GCPtrPage, &pShwPde);2949 rc = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde); 2950 2950 AssertRCSuccessReturn(rc, rc); 2951 2951 Assert(pShwPde); 2952 2952 2953 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPde);2953 pPDDst = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde); 2954 2954 pPdeDst = &pPDDst->a[iPDDst]; 2955 2955 … … 3172 3172 3173 3173 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 3174 const X86PDE PdeDst = pgmShwGet32BitPDE( &pVCpu->pgm.s, GCPtrPage);3174 const X86PDE PdeDst = pgmShwGet32BitPDE(pVCpu, GCPtrPage); 3175 3175 # elif PGM_SHW_TYPE == PGM_TYPE_PAE 3176 3176 const unsigned iPDDst = ((GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK); … … 3334 3334 */ 3335 3335 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 3336 PX86PDE pPdeDst = pgmShwGet32BitPDEPtr( &pVCpu->pgm.s, GCPtrPage);3336 PX86PDE pPdeDst = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage); 3337 3337 3338 3338 # elif PGM_SHW_TYPE == PGM_TYPE_PAE … … 3656 3656 3657 3657 pPml4eSrc = pgmGstGetLongModePML4EPtr(pVCpu, iPml4); 3658 pPml4eDst = pgmShwGetLongModePML4EPtr( &pVCpu->pgm.s, iPml4);3658 pPml4eDst = pgmShwGetLongModePML4EPtr(pVCpu, iPml4); 3659 3659 3660 3660 /* Fetch the pgm pool shadow descriptor if the shadow pml4e is present. */ … … 3712 3712 X86PDPE PdpeSrc; 3713 3713 PGSTPD pPDSrc = pgmGstGetPaePDPtr(pVCpu, GCPtr, &iPDSrc, &PdpeSrc); 3714 PX86PDPT pPdptDst = pgmShwGetPaePDPTPtr( &pVCpu->pgm.s);3714 PX86PDPT pPdptDst = pgmShwGetPaePDPTPtr(pVCpu); 3715 3715 # else 3716 3716 PX86PML4E pPml4eSrcIgn; … … 3780 3780 GSTPD const *pPDSrc = pgmGstGet32bitPDPtr(pVCpu); 3781 3781 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 3782 PCX86PD pPDDst = pgmShwGet32BitPDPtr( &pVCpu->pgm.s);3782 PCX86PD pPDDst = pgmShwGet32BitPDPtr(pVCpu); 3783 3783 # endif 3784 3784 # endif /* PGM_GST_TYPE == PGM_TYPE_32BIT */ … … 3794 3794 { 3795 3795 # if PGM_SHW_TYPE == PGM_TYPE_PAE 3796 const SHWPDE PdeDst = *pgmShwGetPaePDEPtr(p PGM, GCPtr);3796 const SHWPDE PdeDst = *pgmShwGetPaePDEPtr(pVCpu, GCPtr); 3797 3797 # else 3798 3798 const SHWPDE PdeDst = pPDDst->a[iPDDst]; -
trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
r31123 r31167 245 245 case PGMMODE_32_BIT: 246 246 { 247 PX86PD pShw32BitPd = pgmShwGet32BitPDPtr( &pVCpu->pgm.s);247 PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(pVCpu); 248 248 AssertFatal(pShw32BitPd); 249 249 #ifdef IN_RC /* Lock mapping to prevent it from being reused during pgmPoolFree. */ … … 272 272 const uint32_t iPdPt = iNewPDE / 256; 273 273 unsigned iPaePde = iNewPDE * 2 % 512; 274 PX86PDPT pShwPdpt = pgmShwGetPaePDPTPtr( &pVCpu->pgm.s);274 PX86PDPT pShwPdpt = pgmShwGetPaePDPTPtr(pVCpu); 275 275 Assert(pShwPdpt); 276 276 #ifdef IN_RC /* Lock mapping to prevent it from being reused during pgmShwSyncPaePDPtr. */ … … 284 284 * accessed bit causes invalid VT-x guest state errors. 285 285 */ 286 PX86PDPAE pShwPaePd = pgmShwGetPaePDPtr( &pVCpu->pgm.s, iPdPt << X86_PDPT_SHIFT);286 PX86PDPAE pShwPaePd = pgmShwGetPaePDPtr(pVCpu, iPdPt << X86_PDPT_SHIFT); 287 287 if (!pShwPaePd) 288 288 { … … 407 407 && pShwPageCR3 != pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)) 408 408 { 409 pCurrentShwPdpt = pgmShwGetPaePDPTPtr( &pVCpu->pgm.s);409 pCurrentShwPdpt = pgmShwGetPaePDPTPtr(pVCpu); 410 410 #ifdef IN_RC /* Lock mapping to prevent it from being reused (currently not possible). */ 411 411 if (pCurrentShwPdpt) … … 426 426 case PGMMODE_32_BIT: 427 427 { 428 PX86PD pShw32BitPd = (PX86PD)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPageCR3);428 PX86PD pShw32BitPd = (PX86PD)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3); 429 429 AssertFatal(pShw32BitPd); 430 430 … … 439 439 const unsigned iPdpt = iOldPDE / 256; /* iOldPDE * 2 / 512; iOldPDE is in 4 MB pages */ 440 440 unsigned iPaePde = iOldPDE * 2 % 512; 441 PX86PDPT pShwPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPageCR3);442 PX86PDPAE pShwPaePd = pgmShwGetPaePDPtr( &pVCpu->pgm.s, pShwPdpt, (iPdpt << X86_PDPT_SHIFT));441 PX86PDPT pShwPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3); 442 PX86PDPAE pShwPaePd = pgmShwGetPaePDPtr(pVCpu, pShwPdpt, (iPdpt << X86_PDPT_SHIFT)); 443 443 444 444 /* … … 538 538 case PGMMODE_32_BIT: 539 539 { 540 PCX86PD pShw32BitPd = (PCX86PD)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPageCR3);540 PCX86PD pShw32BitPd = (PCX86PD)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3); 541 541 AssertFatal(pShw32BitPd); 542 542 … … 553 553 const unsigned iPdpt = iPDE / 256; /* iPDE * 2 / 512; iPDE is in 4 MB pages */ 554 554 unsigned iPaePDE = iPDE * 2 % 512; 555 PX86PDPT pShwPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR _BY_PGM(&pVM->pgm.s, pShwPageCR3);556 PCX86PDPAE pShwPaePd = pgmShwGetPaePDPtr( &pVCpu->pgm.s, pShwPdpt, iPdpt << X86_PDPT_SHIFT);555 PX86PDPT pShwPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3); 556 PCX86PDPAE pShwPaePd = pgmShwGetPaePDPtr(pVCpu, pShwPdpt, iPdpt << X86_PDPT_SHIFT); 557 557 AssertFatal(pShwPaePd); 558 558 -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r31069 r31167 151 151 152 152 /* PML4 */ 153 X86PML4E Pml4e = pgmShwGetLongModePML4E( &pVCpu->pgm.s, GCPtr);153 X86PML4E Pml4e = pgmShwGetLongModePML4E(pVCpu, GCPtr); 154 154 if (!Pml4e.n.u1Present) 155 155 return VERR_PAGE_TABLE_NOT_PRESENT; … … 180 180 181 181 # elif PGM_SHW_TYPE == PGM_TYPE_PAE 182 X86PDEPAE Pde = pgmShwGetPaePDE( &pVCpu->pgm.s, GCPtr);182 X86PDEPAE Pde = pgmShwGetPaePDE(pVCpu, GCPtr); 183 183 184 184 # elif PGM_SHW_TYPE == PGM_TYPE_EPT … … 197 197 198 198 # else /* PGM_TYPE_32BIT */ 199 X86PDE Pde = pgmShwGet32BitPDE( &pVCpu->pgm.s, GCPtr);199 X86PDE Pde = pgmShwGet32BitPDE(pVCpu, GCPtr); 200 200 # endif 201 201 if (!Pde.n.u1Present) … … 317 317 X86PDEPAE Pde; 318 318 /* PML4 */ 319 X86PML4E Pml4e = pgmShwGetLongModePML4E( &pVCpu->pgm.s, GCPtr);319 X86PML4E Pml4e = pgmShwGetLongModePML4E(pVCpu, GCPtr); 320 320 if (!Pml4e.n.u1Present) 321 321 return VERR_PAGE_TABLE_NOT_PRESENT; … … 340 340 341 341 # elif PGM_SHW_TYPE == PGM_TYPE_PAE 342 X86PDEPAE Pde = pgmShwGetPaePDE( &pVCpu->pgm.s, GCPtr);342 X86PDEPAE Pde = pgmShwGetPaePDE(pVCpu, GCPtr); 343 343 344 344 # elif PGM_SHW_TYPE == PGM_TYPE_EPT … … 357 357 358 358 # else /* PGM_TYPE_32BIT */ 359 X86PDE Pde = pgmShwGet32BitPDE( &pVCpu->pgm.s, GCPtr);359 X86PDE Pde = pgmShwGet32BitPDE(pVCpu, GCPtr); 360 360 # endif 361 361 if (!Pde.n.u1Present)
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