- Timestamp:
- Oct 25, 2010 12:45:01 PM (14 years ago)
- Location:
- trunk
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/pdmdev.h
r33314 r33419 428 428 /** Offset of next capability to MSI */ 429 429 uint8_t iMsiNextOffset; 430 /** Value to initialize MSI message control register*/431 uint16_t iMsiFlags;430 /** If we support 64-bit MSI addressing */ 431 bool fMsi64bit; 432 432 433 433 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */ -
trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp
r33402 r33419 1530 1530 SSMR3GetMem (pSSMHandle, &pThis->hda.stMicBdle, sizeof (HDABDLEDESC)); 1531 1531 SSMR3GetMem (pSSMHandle, &pThis->hda.stInBdle, sizeof (HDABDLEDESC)); 1532 1532 1533 1533 AUD_set_active_in(ISD0FMT_TO_AUDIO_SELECTOR(&pThis->hda), SDCTL(&pThis->hda, 0) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)); 1534 1534 AUD_set_active_out(OSD0FMT_TO_AUDIO_SELECTOR(&pThis->hda), SDCTL(&pThis->hda, 4) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)); … … 1761 1761 aMsiReg.iMsiCapOffset = 0x60; 1762 1762 aMsiReg.iMsiNextOffset = 0x50; 1763 aMsiReg.iMsiFlags = 0;1764 1763 rc = PDMDevHlpPCIRegisterMsi(pDevIns, &aMsiReg); 1765 1764 if (RT_FAILURE (rc)) -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r33370 r33419 28 28 #include <iprt/assert.h> 29 29 #include <iprt/string.h> 30 #ifdef IN_RING3 31 #include <iprt/alloc.h> 32 #endif 30 33 31 34 #include "../Builtins.h" … … 527 530 if (MsiIsEnabled(pPciDev)) 528 531 { 529 Log2(("MSI interrupt: %d level=%d\n", iIrq, iLevel));530 532 PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns); 531 533 MsiNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel); … … 534 536 if (MsixIsEnabled(pPciDev)) 535 537 { 536 Log2(("MSI-X interrupt: %d level=%d\n", iIrq, iLevel));537 538 PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns); 538 539 MsixNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel); … … 919 920 if (RT_FAILURE(rc)) 920 921 return rc; 922 /* Save MSI-X page state */ 923 if (pDev->Int.s.u8MsixCapOffset != 0) 924 { 925 Assert(pDev->Int.s.pMsixPageR3 != NULL); 926 SSMR3PutMem(pSSM, pDev->Int.s.pMsixPageR3, 0x1000); 927 if (RT_FAILURE(rc)) 928 return rc; 929 } 921 930 } 922 931 } … … 1214 1223 } 1215 1224 1225 void* pvMsixPage = RTMemTmpAllocZ(0x1000); 1216 1226 /* 1217 1227 * Iterate all the devices. … … 1219 1229 for (i = 0;; i++) 1220 1230 { 1231 PPCIDEVICE pDev; 1221 1232 PCIDEVICE DevTmp; 1222 PPCIDEVICE pDev;1223 1233 1224 1234 /* index / terminator */ … … 1232 1242 { 1233 1243 AssertMsgFailed(("u32=%#x i=%#x\n", u32, i)); 1234 return rc;1244 goto out; 1235 1245 } 1236 1246 … … 1260 1270 rc = SSMR3GetU32(pSSM, &DevTmp.Int.s.uFlags); 1261 1271 if (RT_FAILURE(rc)) 1262 return rc;1272 goto out; 1263 1273 1264 1274 rc = SSMR3GetS32(pSSM, &DevTmp.Int.s.uIrqPinState); 1265 1275 if (RT_FAILURE(rc)) 1266 return rc;1276 goto out; 1267 1277 1268 1278 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsiCapOffset); 1269 1279 if (RT_FAILURE(rc)) 1270 return rc;1280 goto out; 1271 1281 1272 1282 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsiCapSize); 1273 1283 if (RT_FAILURE(rc)) 1274 return rc;1284 goto out; 1275 1285 1276 1286 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsixCapOffset); 1277 1287 if (RT_FAILURE(rc)) 1278 return rc;1288 goto out; 1279 1289 1280 1290 rc = SSMR3GetU8(pSSM, &DevTmp.Int.s.u8MsixCapSize); 1281 1291 if (RT_FAILURE(rc)) 1282 return rc; 1292 goto out; 1293 1294 /* Load MSI-X page state */ 1295 if (DevTmp.Int.s.u8MsixCapOffset != 0) 1296 { 1297 Assert(pvMsixPage != NULL); 1298 SSMR3GetMem(pSSM, pvMsixPage, 0x1000); 1299 if (RT_FAILURE(rc)) 1300 goto out; 1301 } 1283 1302 1284 1303 /* check that it's still around. */ … … 1303 1322 1304 1323 pDev->Int.s.uIrqPinState = DevTmp.Int.s.uIrqPinState; 1305 } 1306 1307 return VINF_SUCCESS; 1324 pDev->Int.s.u8MsiCapOffset = DevTmp.Int.s.u8MsiCapOffset; 1325 pDev->Int.s.u8MsiCapSize = DevTmp.Int.s.u8MsiCapSize; 1326 pDev->Int.s.u8MsixCapOffset = DevTmp.Int.s.u8MsixCapOffset; 1327 pDev->Int.s.u8MsixCapSize = DevTmp.Int.s.u8MsixCapSize; 1328 if (DevTmp.Int.s.u8MsixCapSize != 0) 1329 { 1330 Assert(pDev->Int.s.pMsixPageR3 != NULL); 1331 memcpy(pDev->Int.s.pMsixPageR3, pvMsixPage, 0x1000); 1332 } 1333 } 1334 1335 out: 1336 if (pvMsixPage) 1337 RTMemTmpFree(pvMsixPage); 1338 1339 return rc; 1308 1340 } 1309 1341 … … 1892 1924 int32_t iFunction; 1893 1925 } PciSlotAssignments[] = { 1894 /* Due to somewhat inflexible PCI bus configuration, ConsoleImpl hardcodes 0:5:0 as HDA address, so we shalln't put elsewhere */ 1926 /* Due to somewhat inflexible PCI bus configuration, ConsoleImpl hardcodes 0:5:0 as HDA address, so we shalln't put elsewhere */ 1895 1927 #if 0 1896 1928 { -
trunk/src/VBox/Devices/Bus/MsiCommon.cpp
r33314 r33419 54 54 } 55 55 56 DECLINLINE( bool) msiIsMME(PPCIDEVICE pDev)57 { 58 return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_QSIZE) != 0;56 DECLINLINE(uint8_t) msiGetMme(PPCIDEVICE pDev) 57 { 58 return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_QSIZE) >> 4; 59 59 } 60 60 … … 78 78 uint16_t lo = PCIDevGetWord(pDev, pDev->Int.s.u8MsiCapOffset + iOff); 79 79 80 /// @todo: vector encoding into lower bits of message data, for Multiple Message Enable 81 Assert(!msiIsMME(pDev)); 80 // vector encoding into lower bits of message data 81 uint8_t bits = msiGetMme(pDev); 82 uint16_t uMask = ((1 << bits) - 1); 83 lo &= ~uMask; 84 lo |= iVector & uMask; 82 85 83 86 return RT_MAKE_U32(lo, 0); … … 219 222 uint8_t iCapOffset = pMsiReg->iMsiCapOffset; 220 223 uint8_t iNextOffset = pMsiReg->iMsiNextOffset; 221 uint16_t iFlags = pMsiReg->iMsiFlags; 222 223 if (cVectors != 1) 224 /* We cannot handle multiple vectors yet */ 224 bool f64bit = pMsiReg->fMsi64bit; 225 uint16_t iFlags = 0; 226 int iMmc; 227 228 /* Compute multiple-message capable bitfield */ 229 for (iMmc = 0; iMmc < 6; iMmc++) 230 { 231 if ((1 << iMmc) >= cVectors) 232 break; 233 } 234 235 if ((cVectors > VBOX_MSI_MAX_ENTRIES) || (1 << iMmc) < cVectors) 225 236 return VERR_TOO_MUCH_DATA; 226 237 227 if (cVectors > VBOX_MSI_MAX_ENTRIES)228 return VERR_TOO_MUCH_DATA;229 230 238 Assert(iCapOffset != 0 && iCapOffset < 0xff && iNextOffset < 0xff); 231 239 232 bool f64bit = (iFlags & VBOX_PCI_MSI_FLAGS_64BIT) != 0;233 240 /* We always support per-vector masking */ 234 iFlags |= VBOX_PCI_MSI_FLAGS_MASKBIT; 241 iFlags |= VBOX_PCI_MSI_FLAGS_MASKBIT | iMmc; 242 if (f64bit) 243 iFlags |= VBOX_PCI_MSI_FLAGS_64BIT; 244 /* How many vectors we're capable of */ 245 iFlags |= iMmc; 235 246 236 247 pDev->Int.s.u8MsiCapOffset = iCapOffset; -
trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.cpp
r33236 r33419 5054 5054 PDMMSIREG aMsiReg; 5055 5055 RT_ZERO(aMsiReg); 5056 /* use this code for MSI-X support */ 5057 #if 0 5058 aMsiReg.cMsixVectors = 1; 5059 aMsiReg.iMsixCapOffset = 0x80; 5060 aMsiReg.iMsixNextOffset = 0x0; 5061 aMsiReg.iMsixBar = 3; 5062 #else 5056 5063 aMsiReg.cMsiVectors = 1; 5057 5064 aMsiReg.iMsiCapOffset = 0x80; 5058 5065 aMsiReg.iMsiNextOffset = 0x0; 5059 aMsiReg.iMsiFlags = 0; 5066 #endif 5060 5067 rc = PDMDevHlpPCIRegisterMsi(pDevIns, &aMsiReg); 5061 5068 if (RT_FAILURE (rc)) -
trunk/src/VBox/Devices/USB/DevOHCI.cpp
r33236 r33419 5417 5417 aMsiReg.iMsiCapOffset = 0x80; 5418 5418 aMsiReg.iMsiNextOffset = 0x0; 5419 aMsiReg.iMsiFlags = 0;5420 5419 rc = PDMDevHlpPCIRegisterMsi(pDevIns, &aMsiReg); 5421 5420 if (RT_FAILURE (rc)) … … 5575 5574 #endif /* IN_RING3 */ 5576 5575 #endif /* !VBOX_DEVICE_STRUCT_TESTCASE */ 5577
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