Changeset 35490 in vbox for trunk/src/VBox/VMM/VMMR3/DBGFReg.cpp
- Timestamp:
- Jan 11, 2011 3:17:10 PM (14 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR3/DBGFReg.cpp
r35470 r35490 30 30 #include <iprt/ctype.h> 31 31 #include <iprt/string.h> 32 #include <iprt/uint128.h> 32 33 33 34 … … 156 157 int dbgfR3RegInit(PVM pVM) 157 158 { 158 return RTSemRWCreate(&pVM->dbgf.s.hRegDbLock); 159 int rc = VINF_SUCCESS; 160 if (!pVM->dbgf.s.fRegDbInitialized) 161 { 162 rc = RTSemRWCreate(&pVM->dbgf.s.hRegDbLock); 163 pVM->dbgf.s.fRegDbInitialized = RT_SUCCESS(rc); 164 } 165 return rc; 159 166 } 160 167 … … 169 176 RTSemRWDestroy(pVM->dbgf.s.hRegDbLock); 170 177 pVM->dbgf.s.hRegDbLock = NIL_RTSEMRW; 178 pVM->dbgf.s.fRegDbInitialized = false; 171 179 } 172 180 … … 179 187 * @returns true if valid, false if not. 180 188 * @param pszName The register name to validate. 181 */ 182 static bool dbgfR3RegIsNameValid(const char *pszName) 189 * @param chDot Set to '.' if accepted, otherwise 0. 190 */ 191 static bool dbgfR3RegIsNameValid(const char *pszName, char chDot) 183 192 { 184 193 const char *psz = pszName; … … 189 198 if ( !RT_C_IS_LOWER(ch) 190 199 && !RT_C_IS_DIGIT(ch) 191 && ch != '_') 200 && ch != '_' 201 && ch != chDot) 192 202 return false; 193 203 if (psz - pszName > DBGF_REG_MAX_NAME) … … 215 225 */ 216 226 /* The name components. */ 217 AssertMsgReturn(dbgfR3RegIsNameValid(pszPrefix ), ("%s\n", pszPrefix), VERR_INVALID_NAME);227 AssertMsgReturn(dbgfR3RegIsNameValid(pszPrefix, 0), ("%s\n", pszPrefix), VERR_INVALID_NAME); 218 228 const char *psz = RTStrEnd(pszPrefix, RTSTR_MAX); 219 229 bool const fNeedUnderscore = RT_C_IS_DIGIT(psz[-1]); … … 228 238 for (iDesc = 0; paRegisters[iDesc].pszName != NULL; iDesc++) 229 239 { 230 AssertMsgReturn(dbgfR3RegIsNameValid(paRegisters[iDesc].pszName ), ("%s (#%u)\n", paRegisters[iDesc].pszName, iDesc), VERR_INVALID_NAME);240 AssertMsgReturn(dbgfR3RegIsNameValid(paRegisters[iDesc].pszName, 0), ("%s (#%u)\n", paRegisters[iDesc].pszName, iDesc), VERR_INVALID_NAME); 231 241 232 242 if (enmType == DBGFREGSETTYPE_CPU) … … 238 248 AssertReturn( paRegisters[iDesc].enmType > DBGFREGVALTYPE_INVALID 239 249 && paRegisters[iDesc].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER); 240 AssertMsgReturn( paRegisters[iDesc].fFlags & ~DBGFREG_FLAGS_READ_ONLY,250 AssertMsgReturn(!(paRegisters[iDesc].fFlags & ~DBGFREG_FLAGS_READ_ONLY), 241 251 ("%#x (#%u)\n", paRegisters[iDesc].fFlags, iDesc), 242 252 VERR_INVALID_PARAMETER); … … 251 261 for (; paAliases[iAlias].pszName; iAlias++) 252 262 { 253 AssertMsgReturn(dbgfR3RegIsNameValid(paAliases[iAlias].pszName ), ("%s (%s)\n", paAliases[iAlias].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);263 AssertMsgReturn(dbgfR3RegIsNameValid(paAliases[iAlias].pszName, 0), ("%s (%s)\n", paAliases[iAlias].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME); 254 264 AssertReturn( paAliases[iAlias].enmType > DBGFREGVALTYPE_INVALID 255 265 && paAliases[iAlias].enmType < DBGFREGVALTYPE_END, VERR_INVALID_PARAMETER); … … 264 274 for (; paSubFields[iSubField].pszName; iSubField++) 265 275 { 266 AssertMsgReturn(dbgfR3RegIsNameValid(paSubFields[iSubField].pszName ), ("%s (%s)\n", paSubFields[iSubField].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME);276 AssertMsgReturn(dbgfR3RegIsNameValid(paSubFields[iSubField].pszName, '.'), ("%s (%s)\n", paSubFields[iSubField].pszName, paRegisters[iDesc].pszName), VERR_INVALID_NAME); 267 277 AssertReturn(paSubFields[iSubField].iFirstBit + paSubFields[iSubField].cBits <= 128, VERR_INVALID_PARAMETER); 268 278 AssertReturn(paSubFields[iSubField].cBits + paSubFields[iSubField].cShift <= 128, VERR_INVALID_PARAMETER); … … 323 333 while (RT_SUCCESS(rc)) 324 334 { 325 size_t cchReg = strlen(p aRegisters[iDesc].pszName);326 memcpy(pszReg, p aRegisters[iDesc].pszName, cchReg + 1);335 size_t cchReg = strlen(pszRegName); 336 memcpy(pszReg, pszRegName, cchReg + 1); 327 337 pLookupRec->Core.pszString = MMR3HeapStrDup(pVM, MM_TAG_DBGF_REG, szName); 328 338 if (!pLookupRec->Core.pszString) … … 332 342 pLookupRec->pAlias = pCurAlias; 333 343 pLookupRec->pSubField = NULL; 344 pLookupRec++; 334 345 335 346 PCDBGFREGSUBFIELD paSubFields = paRegisters[iDesc].paSubFields; … … 348 359 pLookupRec->pAlias = pCurAlias; 349 360 pLookupRec->pSubField = &paSubFields[iSubField]; 361 pLookupRec++; 350 362 } 351 363 } … … 353 365 /* next */ 354 366 pCurAlias = pNextAlias++; 355 if ( !pCurAlias 356 || !pCurAlias->pszName) 367 if (!pCurAlias) 357 368 break; 358 369 pszRegName = pCurAlias->pszName; 370 if (!pszRegName) 371 break; 359 372 } 360 373 } 374 Assert(pLookupRec == &pRegSet->paLookupRecs[pRegSet->cLookupRecs]); 361 375 362 376 if (RT_SUCCESS(rc)) … … 406 420 * 407 421 * @returns VBox status code. 422 * @param pVM The VM handle. 408 423 * @param pVCpu The virtual CPU handle. 409 424 * @param paRegisters The register descriptors. 410 425 */ 411 VMMR3_INT_DECL(int) DBGFR3RegRegisterDevice(PVMCPU pVCpu, PCDBGFREGDESC paRegisters) 412 { 413 return dbgfR3RegRegisterCommon(pVCpu->pVMR3, paRegisters, DBGFREGSETTYPE_CPU, pVCpu, "cpu", pVCpu->idCpu); 426 VMMR3_INT_DECL(int) DBGFR3RegRegisterCpu(PVM pVM, PVMCPU pVCpu, PCDBGFREGDESC paRegisters) 427 { 428 if (!pVM->dbgf.s.fRegDbInitialized) 429 { 430 int rc = dbgfR3RegInit(pVM); 431 if (RT_FAILURE(rc)) 432 return rc; 433 } 434 435 return dbgfR3RegRegisterCommon(pVM, paRegisters, DBGFREGSETTYPE_CPU, pVCpu, "cpu", pVCpu->idCpu); 414 436 } 415 437 … … 1065 1087 1066 1088 /** 1067 * Performs a left shift on a RTUINT128U value.1068 *1069 * @returns pVal.1070 * @param pVal The value to shift (input/output).1071 * @param cBits The number of bits to shift it. Negative1072 * numbers are treated as right shifts.1073 */1074 static PRTUINT128U dbgfR3RegU128_ShiftLeft(PRTUINT128U pVal, int cBits)1075 {1076 RTUINT128U const InVal = *pVal;1077 1078 if (cBits >= 0)1079 {1080 if (cBits >= 128)1081 pVal->s.Lo = pVal->s.Hi = 0;1082 else if (cBits >= 64)1083 {1084 pVal->s.Lo = 0;1085 pVal->s.Hi = InVal.s.Lo << (cBits - 64);1086 }1087 else1088 {1089 pVal->s.Hi = InVal.s.Hi << cBits;1090 pVal->s.Hi |= InVal.s.Lo >> (64 - cBits);1091 pVal->s.Lo = InVal.s.Lo << cBits;1092 }1093 }1094 else1095 {1096 /* (right shift) */1097 cBits = -cBits;1098 if (cBits >= 128)1099 pVal->s.Lo = pVal->s.Hi = 0;1100 else if (cBits >= 64)1101 {1102 pVal->s.Hi = 0;1103 pVal->s.Lo = InVal.s.Hi >> (cBits - 64);1104 }1105 else1106 {1107 pVal->s.Lo = InVal.s.Lo >> cBits;1108 pVal->s.Lo |= InVal.s.Hi << (64 - cBits);1109 pVal->s.Hi = InVal.s.Hi >> cBits;1110 }1111 }1112 return pVal;1113 }1114 1115 1116 /**1117 * ANDs the RTUINT128U value against a bitmask made up of the first @a cBits1118 * bits.1119 *1120 * @returns pVal.1121 * @param pVal The value to shift (input/output).1122 * @param cBits The number of bits in the AND mask.1123 */1124 static PRTUINT128U dbgfR3RegU128_AndNFirstBits(PRTUINT128U pVal, unsigned cBits)1125 {1126 if (cBits <= 64)1127 {1128 pVal->s.Hi = 0;1129 pVal->s.Lo &= RT_BIT_64(cBits) - 1;1130 }1131 else if (cBits < 128)1132 pVal->s.Hi &= RT_BIT_64(cBits - 64) - 1;1133 return pVal;1134 }1135 1136 1137 /**1138 1089 * On CPU worker for the register queries, used by dbgfR3RegNmQueryWorker. 1139 1090 * … … 1177 1128 if (RT_SUCCESS(rc)) 1178 1129 { 1179 dbgfR3RegU128_ShiftLeft(&pValue->u128, -pSubField->iFirstBit);1180 dbgfR3RegU128_AndNFirstBits(&pValue->u128, pSubField->cBits);1130 RTUInt128AssignShiftLeft(&pValue->u128, -pSubField->iFirstBit); 1131 RTUInt128AssignAndNFirstBits(&pValue->u128, pSubField->cBits); 1181 1132 if (pSubField->cShift) 1182 dbgfR3RegU128_ShiftLeft(&pValue->u128, pSubField->cShift);1133 RTUInt128AssignShiftLeft(&pValue->u128, pSubField->cShift); 1183 1134 } 1184 1135 }
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