VirtualBox

Changeset 35515 in vbox


Ignore:
Timestamp:
Jan 13, 2011 7:35:07 AM (14 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
69398
Message:

Audio/HDA: more clean up.

Location:
trunk/src/VBox/Devices
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Audio/DevCodec.cpp

    r35497 r35515  
    21312131}
    21322132
     2133/**
     2134 *
     2135 * routines open one of the voices (IN, OUT) with corresponding parameters.
     2136 * this routine could be called from HDA on setting/resseting sound format.
     2137 *
     2138 * @todo: probably passed settings should be verified (if AFG's declared proposed format) before enabling.
     2139 */
     2140int codecOpenVoice(CODECState *pState, ENMSOUNDSOURCE enmSoundSource, audsettings_t *pAudioSettings)
     2141{
     2142    int rc = 0;
     2143    Assert((pState && pAudioSettings));
     2144    if (   !pState
     2145        || !pAudioSettings)
     2146        return -1;
     2147    switch (enmSoundSource)
     2148    {
     2149        case PI_INDEX:
     2150            pState->SwVoiceIn = AUD_open_in(&pState->card, pState->SwVoiceIn, "hda.in", pState, pi_callback, pAudioSettings);
     2151            rc = pState->SwVoiceIn ? 0 : 1;
     2152            break;
     2153        case PO_INDEX:
     2154            pState->SwVoiceOut = AUD_open_out(&pState->card, pState->SwVoiceOut, "hda.out", pState, po_callback, pAudioSettings);
     2155            rc = pState->SwVoiceOut ? 0 : 1;
     2156            break;
     2157        default:
     2158            return -1;
     2159    }
     2160    if (!rc)
     2161        LogRel(("HDAcodec: can't open %s fmt(freq: %d)\n",
     2162            enmSoundSource == PI_INDEX? "in" : "out",
     2163            pAudioSettings->freq));
     2164    return rc;
     2165}
     2166
    21332167int codecConstruct(PPDMDEVINS pDevIns, CODECState *pState, ENMCODEC enmCodec)
    21342168{
    … …  
    21682202    as.fmt = AUD_FMT_S16;
    21692203    as.endianness = 0;
    2170     #define SETUP_AUDIO_FORMAT(pState, base, mult, div, name, as, in_callback, out_callback)                                \
    2171     do{                                                                                                                     \
    2172         AUDIO_FORMAT_SELECTOR((pState), Out, (base), (mult), div) = AUD_open_out(&(pState)->card,                           \
    2173             AUDIO_FORMAT_SELECTOR(pState, Out, (base), (mult), (div)), name ".out", (pState), (out_callback), &(as));       \
    2174         if (!AUDIO_FORMAT_SELECTOR(pState, Out, (base), (mult), (div)))                                                     \
    2175             LogRel (("HDAcodec: WARNING: Unable to open PCM OUT(%s)!\n", name ".out"));                                     \
    2176         AUDIO_FORMAT_SELECTOR(pState, In, (base), (mult), (div)) = AUD_open_in(&(pState)->card,                             \
    2177             AUDIO_FORMAT_SELECTOR(pState, In, (base), (mult), (div)), name ".in", (pState), (in_callback), &(as));          \
    2178         if (!AUDIO_FORMAT_SELECTOR(pState, In, (base), (mult), (div)))                                                      \
    2179             LogRel (("HDAcodec: WARNING: Unable to open PCM IN(%s)!\n", name ".in"));                                       \
    2180     } while(0)
    2181     #define IS_FORMAT_SUPPORTED_BY_HOST(pState, base, mult, div) (AUDIO_FORMAT_SELECTOR((pState), Out, (base), (mult), (div)) \
    2182         && AUDIO_FORMAT_SELECTOR((pState), In, (base), (mult), (div)))
    21832204
    21842205    pState->pNodes[1].node.au32F00_param[0xA] = CODEC_F00_0A_16_BIT;
    2185     SETUP_AUDIO_FORMAT(pState, AFMT_HZ_44_1K, AFMT_MULT_X1, AFMT_DIV_X1, "hda44_1", as, pi_callback, po_callback);
    2186     pState->pNodes[1].node.au32F00_param[0xA] |= IS_FORMAT_SUPPORTED_BY_HOST(pState, AFMT_HZ_44_1K, AFMT_MULT_X1, AFMT_DIV_X1) ? CODEC_F00_0A_44_1KHZ : 0;
    2187 
    2188 #ifdef VBOX_WITH_AUDIO_FLEXIBLE_FORMAT
    2189     as.freq *= 2; /* 2 * 44.1kHz */
    2190     SETUP_AUDIO_FORMAT(pState, AFMT_HZ_44_1K, AFMT_MULT_X2, AFMT_DIV_X1, "hda44_1_2x", as, pi_callback, po_callback);
    2191     pState->pNodes[1].node.au32F00_param[0xA] |= IS_FORMAT_SUPPORTED_BY_HOST(pState, AFMT_HZ_44_1K, AFMT_MULT_X2, AFMT_DIV_X1) ? CODEC_F00_0A_44_1KHZ_MULT_2X : 0;
    2192 
    2193     as.freq *= 2; /* 4 * 44.1kHz */
    2194     SETUP_AUDIO_FORMAT(pState, AFMT_HZ_44_1K, AFMT_MULT_X4, AFMT_DIV_X1, "hda44_1_4x", as, pi_callback, po_callback);
    2195     pState->pNodes[1].node.au32F00_param[0xA] |= IS_FORMAT_SUPPORTED_BY_HOST(pState, AFMT_HZ_44_1K, AFMT_MULT_X4, AFMT_DIV_X1) ? CODEC_F00_0A_44_1KHZ_MULT_4X : 0;
    2196 
    2197     as.freq = 48000;
    2198     SETUP_AUDIO_FORMAT(pState, AFMT_HZ_48K, AFMT_MULT_X1, AFMT_DIV_X1, "hda48", as, pi_callback, po_callback);
    2199     pState->pNodes[1].node.au32F00_param[0xA] |= IS_FORMAT_SUPPORTED_BY_HOST(pState, AFMT_HZ_48K, AFMT_MULT_X1, AFMT_DIV_X1) ? CODEC_F00_0A_48KHZ : 0;
    2200 
    2201 # if 0
    2202     as.freq *= 2; /* 2 * 48kHz */
    2203     SETUP_AUDIO_FORMAT(pState, AFMT_HZ_48K, AFMT_MULT_X2, AFMT_DIV_X1, "hda48_2x", as, pi_callback, po_callback);
    2204     pState->pNodes[1].node.au32F00_param[0xA] |= IS_FORMAT_SUPPORTED_BY_HOST(pState, AFMT_HZ_48K, AFMT_MULT_X2, AFMT_DIV_X1) ? CODEC_F00_0A_48KHZ_MULT_2X : 0;
    2205 
    2206     as.freq *= 2; /* 4 * 48kHz */
    2207     SETUP_AUDIO_FORMAT(pState, AFMT_HZ_48K, AFMT_MULT_X4, AFMT_DIV_X1, "hda48_4x", as, pi_callback, po_callback);
    2208     pState->pNodes[1].node.au32F00_param[0xA] |= IS_FORMAT_SUPPORTED_BY_HOST(pState, AFMT_HZ_48K, AFMT_MULT_X4, AFMT_DIV_X1) ? CODEC_F00_0A_48KHZ_MULT_4X : 0;
    2209 # endif
    2210 #endif
    2211     #undef SETUP_AUDIO_FORMAT
    2212     #undef IS_FORMAT_SUPPORTED_BY_HOST
     2206    codecOpenVoice(pState, PI_INDEX, &as);
     2207    codecOpenVoice(pState, PO_INDEX, &as);
     2208    pState->pNodes[1].node.au32F00_param[0xA] |= CODEC_F00_0A_44_1KHZ;
    22132209
    22142210    uint8_t i;
    … …  
    22232219    codecToAudVolume(&pState->pNodes[pState->u8AdcVolsLineIn].adcvol.B_params, AUD_MIXER_LINE_IN);
    22242220
    2225 #ifdef VBOX_WITH_AUDIO_FLEXIBLE_FORMAT
    2226     /* @todo If no host voices were created, then fallback to nul audio. */
    2227 #else
    22282221    /* If no host voices were created, then fallback to nul audio. */
    22292222    if (!AUD_is_host_voice_in_ok(pState->SwVoiceIn))
    … …  
    22622255                "subsystem"), szMissingVoices);
    22632256    }
    2264 #endif /* VBOX_WITH_AUDIO_FLEXIBLE_FORMAT */
    22652257
    22662258    return VINF_SUCCESS;

  • trunk/src/VBox/Devices/Audio/DevCodec.h

    r35496 r35515  
    414414} ENMCODEC;
    415415
    416 #define AFMT_IN In
    417 #define AFMT_OUT Out
    418 
    419 #ifdef VBOX_WITH_AUDIO_FLEXIBLE_FORMAT
    420 # define MAX_AUDIO_FORMAT 64
    421 typedef SWVoiceIn *CODECAUDIOINFORMAT[MAX_AUDIO_FORMAT];
    422 typedef SWVoiceOut *CODECAUDIOOUTFORMAT[MAX_AUDIO_FORMAT];
    423 # define AUDIO_FORMAT_SELECTOR(pState, dir, hz, mult, divizor) ((pState)->aSwVoice##dir[(hz)*24 + (mult)*8 + (divizor)])
    424 # define AFMT_HZ_48K    0
    425 # define AFMT_HZ_44_1K  1
    426 # define AFMT_MULT_X1   0
    427 # define AFMT_MULT_X2   1
    428 # define AFMT_MULT_X3   2 /* reserved for stac9220 */
    429 # define AFMT_MULT_X4   3
    430 # define AFMT_DIV_X1    0
    431 # define AFMT_DIV_X2    1
    432 # define AFMT_DIV_X3    2
    433 # define AFMT_DIV_X4    3
    434 # define AFMT_DIV_X5    4
    435 # define AFMT_DIV_X6    5
    436 # define AFMT_DIV_X7    6
    437 # define AFMT_DIV_X8    7
    438 #else
    439 # define AUDIO_FORMAT_SELECTOR(pState, dir, hz, mult, divizor) ((pState)->SwVoice##dir)
    440 #endif
    441 
    442 
    443416typedef struct CODECState
    444417{
    … …  
    452425    PCODECNODE               pNodes;
    453426    QEMUSoundCard           card;
    454 #ifndef VBOX_WITH_AUDIO_FLEXIBLE_FORMAT
    455427    /** PCM in */
    456428    SWVoiceIn               *SwVoiceIn;
    457429    /** PCM out */
    458430    SWVoiceOut              *SwVoiceOut;
    459 #else
    460     CODECAUDIOOUTFORMAT        aSwVoiceOut;
    461     CODECAUDIOINFORMAT        aSwVoiceIn;
    462 #endif
    463431    ENMCODEC                enmCodec;
    464432    void                    *pHDAState;
    … …  
    492460int codecSaveState(CODECState *pCodecState, PSSMHANDLE pSSMHandle);
    493461int codecLoadState(CODECState *pCodecState, PSSMHANDLE pSSMHandle);
     462int codecOpenVoice(CODECState *pCodecState, ENMSOUNDSOURCE enmSoundSource, audsettings_t *pAudioSettings);
    494463
    495464#endif

  • trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp

    r35487 r35515  
    502502DECLCALLBACK(int)hdaRegWriteSDFIFOW(INTELHDLinkState* pState, uint32_t offset, uint32_t index, uint32_t u32Value);
    503503DECLCALLBACK(int)hdaRegWriteSDFIFOS(INTELHDLinkState* pState, uint32_t offset, uint32_t index, uint32_t u32Value);
     504DECLCALLBACK(int)hdaRegWriteSDFMT(INTELHDLinkState* pState, uint32_t offset, uint32_t index, uint32_t u32Value);
    504505DECLCALLBACK(int)hdaRegWriteSDBDPL(INTELHDLinkState* pState, uint32_t offset, uint32_t index, uint32_t u32Value);
    505506DECLCALLBACK(int)hdaRegWriteSDBDPU(INTELHDLinkState* pState, uint32_t offset, uint32_t index, uint32_t u32Value);
    … …  
    585586    { 0x0008E, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16          , hdaRegWriteSDFIFOW      , "ISD0FIFOW", "ISD0 FIFO Watermark" },
    586587    { 0x00090, 0x00002, 0x000000FF, 0x00000000, hdaRegReadU16          , hdaRegWriteU16          , "ISD0FIFOS", "ISD0 FIFO Size" },
    587     { 0x00092, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "ISD0FMT"  , "ISD0 Format" },
     588    { 0x00092, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "ISD0FMT"  , "ISD0 Format" },
    588589    { 0x00098, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "ISD0BDPL" , "ISD0 Buffer Descriptor List Pointer-Lower Base Address" },
    589590    { 0x0009C, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "ISD0BDPU" , "ISD0 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    596597    { 0x000AE, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16          , hdaRegWriteSDFIFOW      , "ISD1FIFOW", "ISD1 FIFO Watermark" },
    597598    { 0x000B0, 0x00002, 0x000000FF, 0x00000000, hdaRegReadU16          , hdaRegWriteU16          , "ISD1FIFOS", "ISD1 FIFO Size" },
    598     { 0x000B2, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "ISD1FMT"  , "ISD1 Format" },
     599    { 0x000B2, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "ISD1FMT"  , "ISD1 Format" },
    599600    { 0x000B8, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "ISD1BDPL" , "ISD1 Buffer Descriptor List Pointer-Lower Base Address" },
    600601    { 0x000BC, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "ISD1BDPU" , "ISD1 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    607608    { 0x000CE, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16          , hdaRegWriteSDFIFOW      , "ISD2FIFOW", "ISD2 FIFO Watermark" },
    608609    { 0x000D0, 0x00002, 0x000000FF, 0x00000000, hdaRegReadU16          , hdaRegWriteU16          , "ISD2FIFOS", "ISD2 FIFO Size" },
    609     { 0x000D2, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "ISD2FMT"  , "ISD2 Format" },
     610    { 0x000D2, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "ISD2FMT"  , "ISD2 Format" },
    610611    { 0x000D8, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "ISD2BDPL" , "ISD2 Buffer Descriptor List Pointer-Lower Base Address" },
    611612    { 0x000DC, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "ISD2BDPU" , "ISD2 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    618619    { 0x000EE, 0x00002, 0x00000005, 0x00000005, hdaRegReadU16          , hdaRegWriteU16          , "ISD3FIFOW", "ISD3 FIFO Watermark" },
    619620    { 0x000F0, 0x00002, 0x000000FF, 0x00000000, hdaRegReadU16          , hdaRegWriteU16          , "ISD3FIFOS", "ISD3 FIFO Size" },
    620     { 0x000F2, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "ISD3FMT"  , "ISD3 Format" },
     621    { 0x000F2, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "ISD3FMT"  , "ISD3 Format" },
    621622    { 0x000F8, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "ISD3BDPL" , "ISD3 Buffer Descriptor List Pointer-Lower Base Address" },
    622623    { 0x000FC, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "ISD3BDPU" , "ISD3 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    629630    { 0x0010E, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16          , hdaRegWriteSDFIFOW      , "OSD0FIFOW", "OSD0 FIFO Watermark" },
    630631    { 0x00110, 0x00002, 0x000000FF, 0x000000FF, hdaRegReadU16          , hdaRegWriteSDFIFOS      , "OSD0FIFOS", "OSD0 FIFO Size" },
    631     { 0x00112, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "OSD0FMT"  , "OSD0 Format" },
     632    { 0x00112, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "OSD0FMT"  , "OSD0 Format" },
    632633    { 0x00118, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "OSD0BDPL" , "OSD0 Buffer Descriptor List Pointer-Lower Base Address" },
    633634    { 0x0011C, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "OSD0BDPU" , "OSD0 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    640641    { 0x0012E, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16          , hdaRegWriteSDFIFOW      , "OSD1FIFOW", "OSD1 FIFO Watermark" },
    641642    { 0x00130, 0x00002, 0x000000FF, 0x000000FF, hdaRegReadU16          , hdaRegWriteSDFIFOS      , "OSD1FIFOS", "OSD1 FIFO Size" },
    642     { 0x00132, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "OSD1FMT"  , "OSD1 Format" },
     643    { 0x00132, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "OSD1FMT"  , "OSD1 Format" },
    643644    { 0x00138, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "OSD1BDPL" , "OSD1 Buffer Descriptor List Pointer-Lower Base Address" },
    644645    { 0x0013C, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "OSD1BDPU" , "OSD1 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    651652    { 0x0014E, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16          , hdaRegWriteSDFIFOW      , "OSD2FIFOW", "OSD2 FIFO Watermark" },
    652653    { 0x00150, 0x00002, 0x000000FF, 0x000000FF, hdaRegReadU16          , hdaRegWriteSDFIFOS      , "OSD2FIFOS", "OSD2 FIFO Size" },
    653     { 0x00152, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "OSD2FMT"  , "OSD2 Format" },
     654    { 0x00152, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "OSD2FMT"  , "OSD2 Format" },
    654655    { 0x00158, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "OSD2BDPL" , "OSD2 Buffer Descriptor List Pointer-Lower Base Address" },
    655656    { 0x0015C, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "OSD2BDPU" , "OSD2 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    662663    { 0x0016E, 0x00002, 0x00000007, 0x00000007, hdaRegReadU16          , hdaRegWriteSDFIFOW      , "OSD3FIFOW", "OSD3 FIFO Watermark" },
    663664    { 0x00170, 0x00002, 0x000000FF, 0x000000FF, hdaRegReadU16          , hdaRegWriteSDFIFOS      , "OSD3FIFOS", "OSD3 FIFO Size" },
    664     { 0x00172, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteU16          , "OSD3FMT"  , "OSD3 Format" },
     665    { 0x00172, 0x00002, 0x00007F7F, 0x00007F7F, hdaRegReadU16          , hdaRegWriteSDFMT        , "OSD3FMT"  , "OSD3 Format" },
    665666    { 0x00178, 0x00004, 0xFFFFFF80, 0xFFFFFF80, hdaRegReadU32          , hdaRegWriteSDBDPL       , "OSD3BDPL" , "OSD3 Buffer Descriptor List Pointer-Lower Base Address" },
    666667    { 0x0017C, 0x00004, 0xFFFFFFFF, 0xFFFFFFFF, hdaRegReadU32          , hdaRegWriteSDBDPU       , "OSD3BDPU" , "OSD3 Buffer Descriptor List Pointer-Upper Base Address" },
    … …  
    11311132        {
    11321133            case ICH6_HDA_REG_SD0CTL:
    1133                 AUD_set_active_in(ISD0FMT_TO_AUDIO_SELECTOR(pState), fRun);
     1134                AUD_set_active_in(pState->Codec.SwVoiceIn, fRun);
    11341135            break;
    11351136            case ICH6_HDA_REG_SD4CTL:
    1136                 AUD_set_active_out(OSD0FMT_TO_AUDIO_SELECTOR(pState), fRun);
     1137                AUD_set_active_out(pState->Codec.SwVoiceOut, fRun);
    11371138            break;
    11381139            default:
    … …  
    12181219    }
    12191220    return VINF_SUCCESS;
     1221}
     1222
     1223static void inline hdaSdFmtToAudSettings(uint32_t u32SdFmt, audsettings_t *pAudSetting)
     1224{
     1225    Assert((pAudSetting));
     1226#define EXTRACT_VALUE(v, mask, shift) ((v & ((mask) << (shift))) >> (shift))
     1227    uint32_t u32Hz = (u32SdFmt & ICH6_HDA_SDFMT_BASE_RATE_SHIFT) ? 44100 : 48000;
     1228    uint32_t u32HzMult = 1;
     1229    uint32_t u32HzDiv = 1;
     1230    switch (EXTRACT_VALUE(u32SdFmt, ICH6_HDA_SDFMT_MULT_MASK, ICH6_HDA_SDFMT_MULT_SHIFT))
     1231    {
     1232        case 0: u32HzMult = 1; break;
     1233        case 1: u32HzMult = 2; break;
     1234        case 2: u32HzMult = 3; break;
     1235        case 3: u32HzMult = 4; break;
     1236        default:
     1237            Log(("hda: unsupported multiplier %x\n", u32SdFmt));
     1238    }
     1239    switch (EXTRACT_VALUE(u32SdFmt, ICH6_HDA_SDFMT_DIV_MASK, ICH6_HDA_SDFMT_DIV_SHIFT))
     1240    {
     1241        case 0: u32HzDiv = 1; break;
     1242        case 1: u32HzDiv = 2; break;
     1243        case 2: u32HzDiv = 3; break;
     1244        case 3: u32HzDiv = 4; break;
     1245        case 4: u32HzDiv = 5; break;
     1246        case 5: u32HzDiv = 6; break;
     1247        case 6: u32HzDiv = 7; break;
     1248        case 7: u32HzDiv = 8; break;
     1249    }
     1250    pAudSetting->freq = u32Hz * u32HzMult / u32HzDiv;
     1251    pAudSetting->nchannels = 2;
     1252    pAudSetting->fmt = AUD_FMT_S16;
     1253    pAudSetting->endianness = 0;
     1254#undef EXTRACT_VALUE
     1255}
     1256
     1257DECLCALLBACK(int)hdaRegWriteSDFMT(INTELHDLinkState* pState, uint32_t offset, uint32_t index, uint32_t u32Value)
     1258{
     1259#if 0
     1260        /* @todo here some more investigations are required. */
     1261        audsettings_t as;
     1262        /* no reason to reopen voice with same settings */
     1263        if (u32Value == HDA_REG_IND(pState, index))
     1264            return VINF_SUCCESS;
     1265        hdaSdFmtToAudSettings(u32Value, &as);
     1266        switch (index)
     1267        {
     1268            case ICH6_HDA_REG_SD0FMT:
     1269                codecOpenVoice(&pState->Codec, PI_INDEX, &as);
     1270                break;
     1271            case ICH6_HDA_REG_SD4FMT:
     1272                codecOpenVoice(&pState->Codec, PO_INDEX, &as);
     1273                break;
     1274            default:
     1275                AssertMsgFailed(("unimplemented"));
     1276        }
     1277#endif
     1278        return hdaRegWriteU16(pState, offset, index, u32Value);
    12201279}
    12211280
    … …  
    15681627     * read from backend input line to last ureported position or at the begining.
    15691628     */
    1570     cbBackendCopy = AUD_read (ISD0FMT_TO_AUDIO_SELECTOR(pState), pBdle->au8HdaBuffer, cb2Copy);
     1629    cbBackendCopy = AUD_read (pState->Codec.SwVoiceIn, pBdle->au8HdaBuffer, cb2Copy);
    15711630    /*
    15721631     * write on the HDA DMA
    … …  
    16191678         * We feed backend with new portion of fetched samples including not reported.
    16201679         */
    1621         cbBackendCopy = AUD_write (OSD0FMT_TO_AUDIO_SELECTOR(pState), pBdle->au8HdaBuffer, cb2Copy + pBdle->cbUnderFifoW);
     1680        cbBackendCopy = AUD_write (pState->Codec.SwVoiceOut, pBdle->au8HdaBuffer, cb2Copy + pBdle->cbUnderFifoW);
    16221681        hdaBackendWriteTransferReported(pBdle, cb2Copy, cbBackendCopy, &cbTransfered, pu32Avail);
    16231682    }
    … …  
    19121971    SSMR3GetMem (pSSMHandle, &pThis->hda.stInBdle, sizeof (HDABDLEDESC));
    19131972
    1914     AUD_set_active_in(ISD0FMT_TO_AUDIO_SELECTOR(&pThis->hda), SDCTL(&pThis->hda, 0) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
    1915     AUD_set_active_out(OSD0FMT_TO_AUDIO_SELECTOR(&pThis->hda), SDCTL(&pThis->hda, 4) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
     1973    AUD_set_active_in(pThis->hda.Codec.SwVoiceIn, SDCTL(&pThis->hda, 0) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
     1974    AUD_set_active_out(pThis->hda.Codec.SwVoiceOut, SDCTL(&pThis->hda, 4) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN));
    19161975
    19171976    pThis->hda.u64CORBBase = CORBLBASE(&pThis->hda);

  • trunk/src/VBox/Devices/Makefile.kmk

    r35401 r35515  
    261261        VBOX_HGCM_HOST_CODE \
    262262        VBOX_WITH_HGCM \
    263         $(if $(VBOX_WITH_AUDIO_FLEXIBLE_FORMAT),VBOX_WITH_AUDIO_FLEXIBLE_FORMAT,) \
    264263        $(if $(VBOX_BIOS_DMI_FALLBACK),VBOX_BIOS_DMI_FALLBACK,)
    265264 DevicesR3_DEFS.linux   += _GNU_SOURCE
    … …  
    788787        $(if $(VBOX_WITH_INIP),VBOX_WITH_INIP,) \
    789788        $(if $(VBOX_WITH_DRV_DISK_INTEGRITY),VBOX_WITH_DRV_DISK_INTEGRITY,) \
    790         $(if $(VBOX_WITH_AUDIO_FLEXIBLE_FORMAT),VBOX_WITH_AUDIO_FLEXIBLE_FORMAT,) \
    791789
    792790 Drivers_INCS      := \
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