Changeset 36079 in vbox for trunk/src/VBox/Devices/Bus

Timestamp:

Feb 24, 2011 5:10:31 PM (14 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

70201

Message:

PCI: cleanup, todos, raw PCI regions work

Location:

trunk/src/VBox/Devices/Bus

Files:

• DevPCI.cpp (modified) (8 diffs)
• DevPciIch9.cpp (modified) (24 diffs)
• MsiCommon.cpp (modified) (4 diffs)
• MsixCommon.cpp (modified) (4 diffs)
• PCIInternal.h (modified) (1 diff)

trunk/src/VBox/Devices/Bus/DevPCI.cpp

@@ -773 +773 @@
          */
         PPCIDEVICE pBridgeTemp = pBus->papBridgesR3[iBridge];
-        AssertMsg(pBridgeTemp && PCIIsPci2PciBridge(pBridgeTemp),
+        AssertMsg(pBridgeTemp && pciDevIsPci2PciBridge(pBridgeTemp),
                   ("Device is not a PCI bridge but on the list of PCI bridges\n"));
 
@@ -1721 +1721 @@
             }
         }
-        PCIClearRequestedDevfunc(pPciDev);
+        pciDevClearRequestedDevfunc(pPciDev);
     }
     else
@@ -1742 +1742 @@
             AssertReleaseMsg(!(iDev % 8), ("PCI Configuration Conflict! iDev=%d pszName=%s clashes with %s\n",
                                            iDev, pszName, pBus->devices[iDev]->name));
-            if (    PCIIsRequestedDevfunc(pBus->devices[iDev])
-                ||  (pBus->devices[iDev + 1] && PCIIsRequestedDevfunc(pBus->devices[iDev + 1]))
-                ||  (pBus->devices[iDev + 2] && PCIIsRequestedDevfunc(pBus->devices[iDev + 2]))
-                ||  (pBus->devices[iDev + 3] && PCIIsRequestedDevfunc(pBus->devices[iDev + 3]))
-                ||  (pBus->devices[iDev + 4] && PCIIsRequestedDevfunc(pBus->devices[iDev + 4]))
-                ||  (pBus->devices[iDev + 5] && PCIIsRequestedDevfunc(pBus->devices[iDev + 5]))
-                ||  (pBus->devices[iDev + 6] && PCIIsRequestedDevfunc(pBus->devices[iDev + 6]))
-                ||  (pBus->devices[iDev + 7] && PCIIsRequestedDevfunc(pBus->devices[iDev + 7])))
+            if (    pciDevIsRequestedDevfunc(pBus->devices[iDev])
+                ||  (pBus->devices[iDev + 1] && pciDevIsRequestedDevfunc(pBus->devices[iDev + 1]))
+                ||  (pBus->devices[iDev + 2] && pciDevIsRequestedDevfunc(pBus->devices[iDev + 2]))
+                ||  (pBus->devices[iDev + 3] && pciDevIsRequestedDevfunc(pBus->devices[iDev + 3]))
+                ||  (pBus->devices[iDev + 4] && pciDevIsRequestedDevfunc(pBus->devices[iDev + 4]))
+                ||  (pBus->devices[iDev + 5] && pciDevIsRequestedDevfunc(pBus->devices[iDev + 5]))
+                ||  (pBus->devices[iDev + 6] && pciDevIsRequestedDevfunc(pBus->devices[iDev + 6]))
+                ||  (pBus->devices[iDev + 7] && pciDevIsRequestedDevfunc(pBus->devices[iDev + 7])))
             {
                 AssertReleaseMsgFailed(("Configuration error:'%s' and '%s' are both configured as device %d\n",
@@ -1786 +1786 @@
             }
         } /* if conflict */
-        PCISetRequestedDevfunc(pPciDev);
+        pciDevSetRequestedDevfunc(pPciDev);
     }
 
@@ -1798 +1798 @@
     pPciDev->Int.s.pfnConfigWrite   = pci_default_write_config;
     pBus->devices[iDev]             = pPciDev;
-    if (PCIIsPci2PciBridge(pPciDev))
+    if (pciDevIsPci2PciBridge(pPciDev))
     {
         AssertMsg(pBus->cBridges < RT_ELEMENTS(pBus->devices), ("Number of bridges exceeds the number of possible devices on the bus\n"));
@@ -2111 +2111 @@
 
     pBus->PciDev.pDevIns              = pDevIns;
-    PCISetRequestedDevfunc(&pBus->PciDev);
+    pciDevSetRequestedDevfunc(&pBus->PciDev);
     pciRegisterInternal(pBus, 0, &pBus->PciDev, "i440FX");
 
@@ -2122 +2122 @@
 
     pGlobals->PIIX3State.dev.pDevIns      = pDevIns;
-    PCISetRequestedDevfunc(&pGlobals->PIIX3State.dev);
+    pciDevSetRequestedDevfunc(&pGlobals->PIIX3State.dev);
     pciRegisterInternal(pBus, 8, &pGlobals->PIIX3State.dev, "PIIX3");
     piix3_reset(&pGlobals->PIIX3State);
@@ -2496 +2496 @@
 
     /* Bridge-specific data */
-    PCISetPci2PciBridge(&pBus->PciDev);
+    pciDevSetPci2PciBridge(&pBus->PciDev);
     pBus->PciDev.Int.s.pfnBridgeConfigRead  = pcibridgeConfigRead;
     pBus->PciDev.Int.s.pfnBridgeConfigWrite = pcibridgeConfigWrite;

trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

@@ -698 +698 @@
          */
         PPCIDEVICE pBridgeTemp = pBus->papBridgesR3[iBridge];
-        AssertMsg(pBridgeTemp && PCIIsPci2PciBridge(pBridgeTemp),
+        AssertMsg(pBridgeTemp && pciDevIsPci2PciBridge(pBridgeTemp),
                   ("Device is not a PCI bridge but on the list of PCI bridges\n"));
 
@@ -949 +949 @@
 static DECLCALLBACK(int) ich9pciGenericSaveExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)
 {
-    Assert(!PCIIsPassthrough(pPciDev));
+    Assert(!pciDevIsPassthrough(pPciDev));
     return SSMR3PutMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config));
 }
@@ -969 +969 @@
 
             /* Device flags */
-            int rc = SSMR3PutU32(pSSM, pDev->Int.s.uFlags);
+            int rc = SSMR3PutU32(pSSM, pDev->Int.s.fFlags);
             if (RT_FAILURE(rc))
                 return rc;
@@ -1202 +1202 @@
      */
     uint8_t const fBridge = fIsBridge ? 2 : 1;
-    Assert(!PCIIsPassthrough(pDev));
+    Assert(!pciDevIsPassthrough(pDev));
     uint8_t *pbDstConfig = &pDev->config[0];
 
@@ -1339 +1339 @@
 
         /* get the data */
-        DevTmp.Int.s.uFlags = 0;
+        DevTmp.Int.s.fFlags = 0;
         DevTmp.Int.s.u8MsiCapOffset = 0;
         DevTmp.Int.s.u8MsiCapSize = 0;
@@ -1347 +1347 @@
         SSMR3GetMem(pSSM, DevTmp.config, sizeof(DevTmp.config));
 
-        rc = SSMR3GetU32(pSSM, &DevTmp.Int.s.uFlags);
+        rc = SSMR3GetU32(pSSM, &DevTmp.Int.s.fFlags);
         if (RT_FAILURE(rc))
             goto out;
@@ -1398 +1398 @@
 
         /* commit the loaded device config. */
-        Assert(!PCIIsPassthrough(pDev));
+        Assert(!pciDevIsPassthrough(pDev));
         pciR3CommonRestoreConfig(pDev, &DevTmp.config[0], false ); /** @todo fix bridge fun! */
 
@@ -1430 +1430 @@
 static DECLCALLBACK(int) ich9pciGenericLoadExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)
 {
-    Assert(!PCIIsPassthrough(pPciDev));
+    Assert(!pciDevIsPassthrough(pPciDev));
     return SSMR3GetMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config));
 }
@@ -1758 +1758 @@
     AssertMsgReturn(u32Address + len <= 256, ("Read after end of PCI config space\n"),
                     0);
-    if (   PCIIsMsiCapable(aDev)
+    if (   pciDevIsMsiCapable(aDev)
         && (u32Address >= aDev->Int.s.u8MsiCapOffset)
         && (u32Address <  aDev->Int.s.u8MsiCapOffset + aDev->Int.s.u8MsiCapSize)
@@ -1766 +1766 @@
     }
 
-    if (   PCIIsMsixCapable(aDev)
+    if (   pciDevIsMsixCapable(aDev)
         && (u32Address >= aDev->Int.s.u8MsixCapOffset)
         && (u32Address <  aDev->Int.s.u8MsixCapOffset + aDev->Int.s.u8MsixCapSize)
@@ -1839 +1839 @@
     AssertMsgReturnVoid(u32Address + len <= 256, ("Write after end of PCI config space\n"));
 
-    if (   PCIIsMsiCapable(aDev)
+    if (   pciDevIsMsiCapable(aDev)
         && (u32Address >= aDev->Int.s.u8MsiCapOffset)
         && (u32Address <  aDev->Int.s.u8MsiCapOffset + aDev->Int.s.u8MsiCapSize)
@@ -1850 +1850 @@
     }
 
-    if (   PCIIsMsixCapable(aDev)
+    if (   pciDevIsMsixCapable(aDev)
         && (u32Address >= aDev->Int.s.u8MsixCapOffset)
         && (u32Address <  aDev->Int.s.u8MsixCapOffset + aDev->Int.s.u8MsixCapSize)
@@ -2006 +2006 @@
         if (!strcmp(pszName, PciSlotAssignments[i].pszName))
         {
-            PCISetRequestedDevfunc(pPciDev);
+            pciDevSetRequestedDevfunc(pPciDev);
             aPosition->iDeviceFunc =
                     (PciSlotAssignments[i].iSlot << 3) + PciSlotAssignments[i].iFunction;
@@ -2031 +2031 @@
                 &&  !pBus->apDevices[iPos + 7])
         {
-            PCIClearRequestedDevfunc(pPciDev);
+            pciDevClearRequestedDevfunc(pPciDev);
             aPosition->iDeviceFunc = iPos;
             return true;
@@ -2044 +2044 @@
     PCIDevice** aSlot = &pBus->apDevices[iSlot << 3];
 
-    return     (aSlot[0] && PCIIsRequestedDevfunc(aSlot[0]))
-            || (aSlot[1] && PCIIsRequestedDevfunc(aSlot[1]))
-            || (aSlot[2] && PCIIsRequestedDevfunc(aSlot[2]))
-            || (aSlot[3] && PCIIsRequestedDevfunc(aSlot[3]))
-            || (aSlot[4] && PCIIsRequestedDevfunc(aSlot[4]))
-            || (aSlot[5] && PCIIsRequestedDevfunc(aSlot[5]))
-            || (aSlot[6] && PCIIsRequestedDevfunc(aSlot[6]))
-            || (aSlot[7] && PCIIsRequestedDevfunc(aSlot[7]))
+    return     (aSlot[0] && pciDevIsRequestedDevfunc(aSlot[0]))
+            || (aSlot[1] && pciDevIsRequestedDevfunc(aSlot[1]))
+            || (aSlot[2] && pciDevIsRequestedDevfunc(aSlot[2]))
+            || (aSlot[3] && pciDevIsRequestedDevfunc(aSlot[3]))
+            || (aSlot[4] && pciDevIsRequestedDevfunc(aSlot[4]))
+            || (aSlot[5] && pciDevIsRequestedDevfunc(aSlot[5]))
+            || (aSlot[6] && pciDevIsRequestedDevfunc(aSlot[6]))
+            || (aSlot[7] && pciDevIsRequestedDevfunc(aSlot[7]))
            ;
 }
@@ -2078 +2078 @@
      * its current habitant, if it wasn't hard assigned too.
      */
-    if (PCIIsRequestedDevfunc(pPciDev) &&
+    if (pciDevIsRequestedDevfunc(pPciDev) &&
         pBus->apDevices[iDev]          &&
-        PCIIsRequestedDevfunc(pBus->apDevices[iDev]))
+        pciDevIsRequestedDevfunc(pBus->apDevices[iDev]))
     {
         AssertReleaseMsgFailed(("Configuration error:'%s' and '%s' are both configured as device %d\n",
@@ -2123 +2123 @@
     pPciDev->Int.s.pfnConfigWrite   = ich9pciConfigWriteDev;
     pBus->apDevices[iDev]           = pPciDev;
-    if (PCIIsPci2PciBridge(pPciDev))
+    if (pciDevIsPci2PciBridge(pPciDev))
     {
         AssertMsg(pBus->cBridges < RT_ELEMENTS(pBus->apDevices), ("Number of bridges exceeds the number of possible devices on the bus\n"));
@@ -2132 +2132 @@
     }
 
-    Log(("PCI: Registered device %d function %d (%#x) '%s'.\n",
-         iDev >> 3, iDev & 7, 0x80000000 | (iDev << 8), pszName));
+    Log(("PCI: Registered device %d function %d on bus %d (%#x) '%s'.\n",
+         iDev >> 3, iDev & 7, pBus->iBus, 0x80000000 | (iDev << 8), pszName));
 
     return VINF_SUCCESS;
@@ -2144 +2144 @@
         pHlp->pfnPrintf(pHlp, "    ");
     }
+}
+static uint32_t ich9pciGetCfg(PCIDevice* aDev, int32_t iRegister, int cb)
+{
+    return aDev->Int.s.pfnConfigRead(aDev, iRegister, cb);
+}
+
+static uint8_t ich9pciGetByte(PCIDevice* aDev, int32_t iRegister)
+{
+    return (uint8_t)ich9pciGetCfg(aDev, iRegister, 1);
+}
+
+static uint16_t ich9pciGetWord(PCIDevice* aDev, int32_t iRegister)
+{
+    return (uint16_t)ich9pciGetCfg(aDev, iRegister, 2);
+}
+
+static uint32_t ich9pciGetDWord(PCIDevice* aDev, int32_t iRegister)
+{
+    return (uint32_t)ich9pciGetCfg(aDev, iRegister, 4);
 }
 
@@ -2153 +2172 @@
         if (pPciDev != NULL)
         {
-            if (PCIIsPassthrough(pPciDev))
-            {
-                printIndent(pHlp, iIndent);
-                /**
-                 * For passthrough devices MSI/MSI-X mostly reflects the way interrupts delivered to the guest,
-                 * as host driver handles real devices interrupts.
-                 */
-                pHlp->pfnPrintf(pHlp, "%02x:%02x:%02x %s: %s%s - PASSTHROUGH\n",
-                                pBus->iBus, (iDev >> 3) & 0xff, iDev & 0x7,
-                                pPciDev->name,
-                                PCIIsMsiCapable(pPciDev)  ? " MSI" : "",
-                                PCIIsMsixCapable(pPciDev) ? " MSI-X" : ""
-                                );
-                continue;
-            }
             printIndent(pHlp, iIndent);
-            pHlp->pfnPrintf(pHlp, "%02x:%02x:%02x %s: %04x-%04x%s%s",
+
+            /**
+             * For passthrough devices MSI/MSI-X mostly reflects the way interrupts delivered to the guest,
+             * as host driver handles real devices interrupts.
+             */
+            pHlp->pfnPrintf(pHlp, "%02x:%02x:%02x %s%s: %04x-%04x%s%s",
                             pBus->iBus, (iDev >> 3) & 0xff, iDev & 0x7,
                             pPciDev->name,
-                            PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev),
-                            PCIIsMsiCapable(pPciDev)  ? " MSI" : "",
-                            PCIIsMsixCapable(pPciDev) ? " MSI-X" : ""
+                            pciDevIsPassthrough(pPciDev) ? " (PASSTHROUGH)" : "",
+                            ich9pciGetWord(pPciDev, VBOX_PCI_VENDOR_ID), ich9pciGetWord(pPciDev, VBOX_PCI_DEVICE_ID),
+                            pciDevIsMsiCapable(pPciDev)  ? " MSI" : "",
+                            pciDevIsMsixCapable(pPciDev) ? " MSI-X" : ""
                             );
-            if (PCIDevGetInterruptPin(pPciDev) != 0)
+            if (!pciDevIsPassthrough(pPciDev) && PCIDevGetInterruptPin(pPciDev) != 0)
                 pHlp->pfnPrintf(pHlp, " IRQ%d", PCIDevGetInterruptLine(pPciDev));
 
             pHlp->pfnPrintf(pHlp, "\n");
 
-            int iCmd = PCIDevGetCommand(pPciDev);
+            int iCmd = ich9pciGetWord(pPciDev, VBOX_PCI_COMMAND);
             if ((iCmd & (VBOX_PCI_COMMAND_IO | VBOX_PCI_COMMAND_MEMORY)) != 0)
             {
@@ -2192 +2202 @@
                         continue;
 
-                    uint32_t u32Addr = ich9pciConfigReadDev(pPciDev, ich9pciGetRegionReg(iRegion), 4);
+                    uint32_t u32Addr = ich9pciGetDWord(pPciDev, ich9pciGetRegionReg(iRegion));
                     const char * szDesc;
 
@@ -2224 +2234 @@
                     while (iPerLine-- > 0)
                     {
-                        pHlp->pfnPrintf(pHlp, "%02x ", pPciDev->config[iReg++]);
+                        pHlp->pfnPrintf(pHlp, "%02x ", ich9pciGetByte(pPciDev, iReg++));
                     }
                     pHlp->pfnPrintf(pHlp, "\n");
@@ -2521 +2531 @@
 
     /* Bridge device reset handlers processed later */
-    if (!PCIIsPci2PciBridge(pDev))
+    if (!pciDevIsPci2PciBridge(pDev))
     {
         PCIDevSetByte(pDev, VBOX_PCI_CACHE_LINE_SIZE, 0x0);
@@ -2667 +2677 @@
 
     /* Bridge-specific data */
-    PCISetPci2PciBridge(&pBus->aPciDev);
+    pciDevSetPci2PciBridge(&pBus->aPciDev);
     pBus->aPciDev.Int.s.pfnBridgeConfigRead  = ich9pcibridgeConfigRead;
     pBus->aPciDev.Int.s.pfnBridgeConfigWrite = ich9pcibridgeConfigWrite;

trunk/src/VBox/Devices/Bus/MsiCommon.cpp

@@ -105 +105 @@
 {
     int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset;
-    Assert(iOff >= 0 && (PCIIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
+    Assert(iOff >= 0 && (pciDevIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
 
     Log2(("MsiPciConfigWrite: %d <- %x (%d)\n", iOff, val, len));
@@ -190 +190 @@
     int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset;
 
-    Assert(iOff >= 0 && (PCIIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
+    Assert(iOff >= 0 && (pciDevIsMsiCapable(pDev) && iOff < pDev->Int.s.u8MsiCapSize));
     uint32_t rv = 0;
 
@@ -255 +255 @@
     *msiGetPendingBits(pDev) = 0;
 
-    PCISetMsiCapable(pDev);
+    pciDevSetMsiCapable(pDev);
 
     return VINF_SUCCESS;
@@ -263 +263 @@
 bool     MsiIsEnabled(PPCIDEVICE pDev)
 {
-    return PCIIsMsiCapable(pDev) && msiIsEnabled(pDev);
+    return pciDevIsMsiCapable(pDev) && msiIsEnabled(pDev);
 }
 

trunk/src/VBox/Devices/Bus/MsixCommon.cpp

@@ -210 +210 @@
     PCIDevSetDWord(pDev,  iCapOffset + VBOX_MSIX_PBA_BIROFFSET,   offPBA   | iBar);
 
-    PCISetMsixCapable(pDev);
+    pciDevSetMsixCapable(pDev);
 
     return VINF_SUCCESS;
@@ -218 +218 @@
 bool     MsixIsEnabled(PPCIDEVICE pDev)
 {
-    return PCIIsMsixCapable(pDev) && msixIsEnabled(pDev);
+    return pciDevIsMsixCapable(pDev) && msixIsEnabled(pDev);
 }
 
@@ -267 +267 @@
 {
     int32_t iOff = u32Address - pDev->Int.s.u8MsixCapOffset;
-    Assert(iOff >= 0 && (PCIIsMsixCapable(pDev) && iOff < pDev->Int.s.u8MsixCapSize));
+    Assert(iOff >= 0 && (pciDevIsMsixCapable(pDev) && iOff < pDev->Int.s.u8MsixCapSize));
 
     Log2(("MsixPciConfigWrite: %d <- %x (%d)\n", iOff, val, len));
@@ -312 +312 @@
     int32_t iOff = u32Address - pDev->Int.s.u8MsixCapOffset;
 
-    Assert(iOff >= 0 && (PCIIsMsixCapable(pDev) && iOff < pDev->Int.s.u8MsixCapSize));
+    Assert(iOff >= 0 && (pciDevIsMsixCapable(pDev) && iOff < pDev->Int.s.u8MsixCapSize));
     uint32_t rv = 0;
 

trunk/src/VBox/Devices/Bus/PCIInternal.h

@@ -125 +125 @@
     R3PTRTYPE(PFNPCICONFIGWRITE)    pfnConfigWrite;
 
-    /** Flags of this PCI device, see PCIDEV_FLAG_XXX constants.
-     *  @todo s/uFlags/fFlags/g */
-    uint32_t                        uFlags;
+    /** Flags of this PCI device, see PCIDEV_FLAG_XXX constants. */
+    uint32_t                        fFlags;
     /** Current state of the IRQ pin of the device. */
     int32_t                         uIrqPinState;