Changeset 36170 in vbox for trunk/src/recompiler/tcg
- Timestamp:
- Mar 4, 2011 12:49:02 PM (14 years ago)
- svn:sync-xref-src-repo-rev:
- 70361
- Location:
- trunk/src/recompiler/tcg
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/recompiler/tcg/README ¶
r36140 r36170 61 61 - Basic blocks end after branches (e.g. brcond_i32 instruction), 62 62 goto_tb and exit_tb instructions. 63 - Basic blocks end before legacy dyngen operations. 64 - Basic blocks start after the end of a previous basic block, at a 65 set_label instruction or after a legacy dyngen operation. 63 - Basic blocks start after the end of a previous basic block, or at a 64 set_label instruction. 66 65 67 66 After the end of a basic block, the content of temporaries is … … 206 205 t0=~t1 207 206 208 ********* Shifts 207 * andc_i32/i64 t0, t1, t2 208 209 t0=t1&~t2 210 211 * eqv_i32/i64 t0, t1, t2 212 213 t0=~(t1^t2) 214 215 * nand_i32/i64 t0, t1, t2 216 217 t0=~(t1&t2) 218 219 * nor_i32/i64 t0, t1, t2 220 221 t0=~(t1|t2) 222 223 * orc_i32/i64 t0, t1, t2 224 225 t0=t1|~t2 226 227 ********* Shifts/Rotates 209 228 210 229 * shl_i32/i64 t0, t1, t2 … … 219 238 220 239 t0=t1 >> t2 (signed). Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) 240 241 * rotl_i32/i64 t0, t1, t2 242 243 Rotation of t2 bits to the left. Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) 244 245 * rotr_i32/i64 t0, t1, t2 246 247 Rotation of t2 bits to the right. Undefined behavior if t2 < 0 or t2 >= 32 (resp 64) 221 248 222 249 ********* Misc … … 308 335 instructions. 309 336 310 * qemu_ld _i32/i64t0, t1, flags311 qemu_ld8 u_i32/i64t0, t1, flags312 qemu_ld 8s_i32/i64t0, t1, flags313 qemu_ld16 u_i32/i64t0, t1, flags314 qemu_ld 16s_i32/i64t0, t1, flags315 qemu_ld32 u_i64t0, t1, flags316 qemu_ld 32s_i64 t0, t1, flags337 * qemu_ld8u t0, t1, flags 338 qemu_ld8s t0, t1, flags 339 qemu_ld16u t0, t1, flags 340 qemu_ld16s t0, t1, flags 341 qemu_ld32u t0, t1, flags 342 qemu_ld32s t0, t1, flags 343 qemu_ld64 t0, t1, flags 317 344 318 345 Load data at the QEMU CPU address t1 into t0. t1 has the QEMU CPU … … 320 347 kernel access) for example. 321 348 322 * qemu_st _i32/i64t0, t1, flags323 qemu_st 8_i32/i64t0, t1, flags324 qemu_st 16_i32/i64t0, t1, flags325 qemu_st 32_i64 t0, t1, flags349 * qemu_st8 t0, t1, flags 350 qemu_st16 t0, t1, flags 351 qemu_st32 t0, t1, flags 352 qemu_st64 t0, t1, flags 326 353 327 354 Store the data t0 at the QEMU CPU Address t1. t1 has the QEMU CPU … … 362 389 instruction. Memory constraints are not supported in this 363 390 version. Aliases are specified in the input operands as for GCC. 391 392 The same register may be used for both an input and an output, even when 393 they are not explicitly aliased. If an op expands to multiple target 394 instructions then care must be taken to avoid clobbering input values. 395 GCC style "early clobber" outputs are not currently supported. 364 396 365 397 A target can define specific register or constant constraints. If an … … 391 423 64 bit return type. 392 424 393 5) Migration from dyngen to TCG 394 395 TCG is backward compatible with QEMU "dyngen" operations. It means 396 that TCG instructions can be freely mixed with dyngen operations. It 397 is expected that QEMU targets will be progressively fully converted to 398 TCG. Once a target is fully converted to TCG, it will be possible 399 to apply more optimizations because more registers will be free for 400 the generated code. 401 402 The exception model is the same as the dyngen one. 403 404 6) Recommended coding rules for best performance 425 5) Recommended coding rules for best performance 405 426 406 427 - Use globals to represent the parts of the QEMU CPU state which are … … 410 431 - Avoid globals stored in fixed registers. They must be used only to 411 432 store the pointer to the CPU state and possibly to store a pointer 412 to a register window. The other uses are to ensure backward 413 compatibility with dyngen during the porting a new target to TCG. 433 to a register window. 414 434 415 435 - Use temporaries. Use local temporaries only when really needed, -
trunk/src/recompiler/tcg/i386/tcg-target.c ¶
r36140 r36170 302 302 } 303 303 304 void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)304 static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val) 305 305 { 306 306 if (val != 0) … … 309 309 310 310 #ifdef VBOX 311 void tcg_out_subi(TCGContext *s, int reg, tcg_target_long val)311 static void tcg_out_subi(TCGContext *s, int reg, tcg_target_long val) 312 312 { 313 313 if (val != 0) … … 666 666 break; 667 667 case 0: 668 /* movzbl */ 669 tcg_out_modrm(s, 0xb6 | P_EXT, data_reg, TCG_REG_EAX); 670 break; 668 671 case 1: 672 /* movzwl */ 673 tcg_out_modrm(s, 0xb7 | P_EXT, data_reg, TCG_REG_EAX); 674 break; 669 675 case 2: 670 676 default: … … 961 967 tcg_gen_stack_alignment_check(s); 962 968 # endif 963 964 969 tcg_out8(s, 0xe8); 965 970 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - -
trunk/src/recompiler/tcg/i386/tcg-target.h ¶
r36140 r36170 22 22 * THE SOFTWARE. 23 23 */ 24 25 24 #define TCG_TARGET_I386 1 26 25 -
trunk/src/recompiler/tcg/tcg-op.h ¶
r36125 r36170 22 22 * THE SOFTWARE. 23 23 */ 24 25 24 #include "tcg.h" 26 25 27 #ifdef CONFIG_DYNGEN_OP28 /* legacy dyngen operations */29 #include "gen-op.h"30 #endif31 32 26 int gen_new_label(void); 33 27 34 static inline void tcg_gen_op1(int opc, TCGv arg1) 35 { 36 *gen_opc_ptr++ = opc; 37 *gen_opparam_ptr++ = GET_TCGV(arg1); 28 static inline void tcg_gen_op1_i32(int opc, TCGv_i32 arg1) 29 { 30 *gen_opc_ptr++ = opc; 31 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 32 } 33 34 static inline void tcg_gen_op1_i64(int opc, TCGv_i64 arg1) 35 { 36 *gen_opc_ptr++ = opc; 37 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 38 38 } 39 39 … … 44 44 } 45 45 46 static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) 47 { 48 *gen_opc_ptr++ = opc; 49 *gen_opparam_ptr++ = GET_TCGV(arg1); 50 *gen_opparam_ptr++ = GET_TCGV(arg2); 51 } 52 53 static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) 54 { 55 *gen_opc_ptr++ = opc; 56 *gen_opparam_ptr++ = GET_TCGV(arg1); 46 static inline void tcg_gen_op2_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2) 47 { 48 *gen_opc_ptr++ = opc; 49 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 50 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 51 } 52 53 static inline void tcg_gen_op2_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2) 54 { 55 *gen_opc_ptr++ = opc; 56 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 57 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 58 } 59 60 static inline void tcg_gen_op2i_i32(int opc, TCGv_i32 arg1, TCGArg arg2) 61 { 62 *gen_opc_ptr++ = opc; 63 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 64 *gen_opparam_ptr++ = arg2; 65 } 66 67 static inline void tcg_gen_op2i_i64(int opc, TCGv_i64 arg1, TCGArg arg2) 68 { 69 *gen_opc_ptr++ = opc; 70 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 57 71 *gen_opparam_ptr++ = arg2; 58 72 } … … 65 79 } 66 80 67 static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) 68 { 69 *gen_opc_ptr++ = opc; 70 *gen_opparam_ptr++ = GET_TCGV(arg1); 71 *gen_opparam_ptr++ = GET_TCGV(arg2); 72 *gen_opparam_ptr++ = GET_TCGV(arg3); 73 } 74 75 static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) 76 { 77 *gen_opc_ptr++ = opc; 78 *gen_opparam_ptr++ = GET_TCGV(arg1); 79 *gen_opparam_ptr++ = GET_TCGV(arg2); 81 static inline void tcg_gen_op3_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 82 TCGv_i32 arg3) 83 { 84 *gen_opc_ptr++ = opc; 85 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 86 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 87 *gen_opparam_ptr++ = GET_TCGV_I32(arg3); 88 } 89 90 static inline void tcg_gen_op3_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 91 TCGv_i64 arg3) 92 { 93 *gen_opc_ptr++ = opc; 94 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 95 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 96 *gen_opparam_ptr++ = GET_TCGV_I64(arg3); 97 } 98 99 static inline void tcg_gen_op3i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 100 TCGArg arg3) 101 { 102 *gen_opc_ptr++ = opc; 103 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 104 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 80 105 *gen_opparam_ptr++ = arg3; 81 106 } 82 107 83 static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 84 TCGv arg4) 85 { 86 *gen_opc_ptr++ = opc; 87 *gen_opparam_ptr++ = GET_TCGV(arg1); 88 *gen_opparam_ptr++ = GET_TCGV(arg2); 89 *gen_opparam_ptr++ = GET_TCGV(arg3); 90 *gen_opparam_ptr++ = GET_TCGV(arg4); 91 } 92 93 static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, 94 TCGArg arg4) 95 { 96 *gen_opc_ptr++ = opc; 97 *gen_opparam_ptr++ = GET_TCGV(arg1); 98 *gen_opparam_ptr++ = GET_TCGV(arg2); 99 *gen_opparam_ptr++ = GET_TCGV(arg3); 108 static inline void tcg_gen_op3i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 109 TCGArg arg3) 110 { 111 *gen_opc_ptr++ = opc; 112 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 113 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 114 *gen_opparam_ptr++ = arg3; 115 } 116 117 static inline void tcg_gen_ldst_op_i32(int opc, TCGv_i32 val, TCGv_ptr base, 118 TCGArg offset) 119 { 120 *gen_opc_ptr++ = opc; 121 *gen_opparam_ptr++ = GET_TCGV_I32(val); 122 *gen_opparam_ptr++ = GET_TCGV_PTR(base); 123 *gen_opparam_ptr++ = offset; 124 } 125 126 static inline void tcg_gen_ldst_op_i64(int opc, TCGv_i64 val, TCGv_ptr base, 127 TCGArg offset) 128 { 129 *gen_opc_ptr++ = opc; 130 *gen_opparam_ptr++ = GET_TCGV_I64(val); 131 *gen_opparam_ptr++ = GET_TCGV_PTR(base); 132 *gen_opparam_ptr++ = offset; 133 } 134 135 static inline void tcg_gen_qemu_ldst_op_i64_i32(int opc, TCGv_i64 val, TCGv_i32 addr, 136 TCGArg mem_index) 137 { 138 *gen_opc_ptr++ = opc; 139 *gen_opparam_ptr++ = GET_TCGV_I64(val); 140 *gen_opparam_ptr++ = GET_TCGV_I32(addr); 141 *gen_opparam_ptr++ = mem_index; 142 } 143 144 static inline void tcg_gen_qemu_ldst_op_i64_i64(int opc, TCGv_i64 val, TCGv_i64 addr, 145 TCGArg mem_index) 146 { 147 *gen_opc_ptr++ = opc; 148 *gen_opparam_ptr++ = GET_TCGV_I64(val); 149 *gen_opparam_ptr++ = GET_TCGV_I64(addr); 150 *gen_opparam_ptr++ = mem_index; 151 } 152 153 static inline void tcg_gen_op4_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 154 TCGv_i32 arg3, TCGv_i32 arg4) 155 { 156 *gen_opc_ptr++ = opc; 157 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 158 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 159 *gen_opparam_ptr++ = GET_TCGV_I32(arg3); 160 *gen_opparam_ptr++ = GET_TCGV_I32(arg4); 161 } 162 163 static inline void tcg_gen_op4_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 164 TCGv_i64 arg3, TCGv_i64 arg4) 165 { 166 *gen_opc_ptr++ = opc; 167 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 168 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 169 *gen_opparam_ptr++ = GET_TCGV_I64(arg3); 170 *gen_opparam_ptr++ = GET_TCGV_I64(arg4); 171 } 172 173 static inline void tcg_gen_op4i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 174 TCGv_i32 arg3, TCGArg arg4) 175 { 176 *gen_opc_ptr++ = opc; 177 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 178 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 179 *gen_opparam_ptr++ = GET_TCGV_I32(arg3); 100 180 *gen_opparam_ptr++ = arg4; 101 181 } 102 182 103 static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, 104 TCGArg arg4) 105 { 106 *gen_opc_ptr++ = opc; 107 *gen_opparam_ptr++ = GET_TCGV(arg1); 108 *gen_opparam_ptr++ = GET_TCGV(arg2); 183 static inline void tcg_gen_op4i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 184 TCGv_i64 arg3, TCGArg arg4) 185 { 186 *gen_opc_ptr++ = opc; 187 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 188 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 189 *gen_opparam_ptr++ = GET_TCGV_I64(arg3); 190 *gen_opparam_ptr++ = arg4; 191 } 192 193 static inline void tcg_gen_op4ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 194 TCGArg arg3, TCGArg arg4) 195 { 196 *gen_opc_ptr++ = opc; 197 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 198 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 109 199 *gen_opparam_ptr++ = arg3; 110 200 *gen_opparam_ptr++ = arg4; 111 201 } 112 202 113 static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, 114 TCGv arg3, TCGv arg4, 115 TCGv arg5) 116 { 117 *gen_opc_ptr++ = opc; 118 *gen_opparam_ptr++ = GET_TCGV(arg1); 119 *gen_opparam_ptr++ = GET_TCGV(arg2); 120 *gen_opparam_ptr++ = GET_TCGV(arg3); 121 *gen_opparam_ptr++ = GET_TCGV(arg4); 122 *gen_opparam_ptr++ = GET_TCGV(arg5); 123 } 124 125 static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, 126 TCGv arg3, TCGv arg4, 127 TCGArg arg5) 128 { 129 *gen_opc_ptr++ = opc; 130 *gen_opparam_ptr++ = GET_TCGV(arg1); 131 *gen_opparam_ptr++ = GET_TCGV(arg2); 132 *gen_opparam_ptr++ = GET_TCGV(arg3); 133 *gen_opparam_ptr++ = GET_TCGV(arg4); 203 static inline void tcg_gen_op4ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 204 TCGArg arg3, TCGArg arg4) 205 { 206 *gen_opc_ptr++ = opc; 207 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 208 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 209 *gen_opparam_ptr++ = arg3; 210 *gen_opparam_ptr++ = arg4; 211 } 212 213 static inline void tcg_gen_op5_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 214 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5) 215 { 216 *gen_opc_ptr++ = opc; 217 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 218 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 219 *gen_opparam_ptr++ = GET_TCGV_I32(arg3); 220 *gen_opparam_ptr++ = GET_TCGV_I32(arg4); 221 *gen_opparam_ptr++ = GET_TCGV_I32(arg5); 222 } 223 224 static inline void tcg_gen_op5_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 225 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5) 226 { 227 *gen_opc_ptr++ = opc; 228 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 229 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 230 *gen_opparam_ptr++ = GET_TCGV_I64(arg3); 231 *gen_opparam_ptr++ = GET_TCGV_I64(arg4); 232 *gen_opparam_ptr++ = GET_TCGV_I64(arg5); 233 } 234 235 static inline void tcg_gen_op5i_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 236 TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5) 237 { 238 *gen_opc_ptr++ = opc; 239 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 240 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 241 *gen_opparam_ptr++ = GET_TCGV_I32(arg3); 242 *gen_opparam_ptr++ = GET_TCGV_I32(arg4); 134 243 *gen_opparam_ptr++ = arg5; 135 244 } 136 245 137 static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, 138 TCGv arg3, TCGv arg4, 139 TCGv arg5, TCGv arg6) 140 { 141 *gen_opc_ptr++ = opc; 142 *gen_opparam_ptr++ = GET_TCGV(arg1); 143 *gen_opparam_ptr++ = GET_TCGV(arg2); 144 *gen_opparam_ptr++ = GET_TCGV(arg3); 145 *gen_opparam_ptr++ = GET_TCGV(arg4); 146 *gen_opparam_ptr++ = GET_TCGV(arg5); 147 *gen_opparam_ptr++ = GET_TCGV(arg6); 148 } 149 150 static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, 151 TCGv arg3, TCGv arg4, 152 TCGArg arg5, TCGArg arg6) 153 { 154 *gen_opc_ptr++ = opc; 155 *gen_opparam_ptr++ = GET_TCGV(arg1); 156 *gen_opparam_ptr++ = GET_TCGV(arg2); 157 *gen_opparam_ptr++ = GET_TCGV(arg3); 158 *gen_opparam_ptr++ = GET_TCGV(arg4); 246 static inline void tcg_gen_op5i_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 247 TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5) 248 { 249 *gen_opc_ptr++ = opc; 250 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 251 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 252 *gen_opparam_ptr++ = GET_TCGV_I64(arg3); 253 *gen_opparam_ptr++ = GET_TCGV_I64(arg4); 254 *gen_opparam_ptr++ = arg5; 255 } 256 257 static inline void tcg_gen_op6_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 258 TCGv_i32 arg3, TCGv_i32 arg4, TCGv_i32 arg5, 259 TCGv_i32 arg6) 260 { 261 *gen_opc_ptr++ = opc; 262 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 263 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 264 *gen_opparam_ptr++ = GET_TCGV_I32(arg3); 265 *gen_opparam_ptr++ = GET_TCGV_I32(arg4); 266 *gen_opparam_ptr++ = GET_TCGV_I32(arg5); 267 *gen_opparam_ptr++ = GET_TCGV_I32(arg6); 268 } 269 270 static inline void tcg_gen_op6_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 271 TCGv_i64 arg3, TCGv_i64 arg4, TCGv_i64 arg5, 272 TCGv_i64 arg6) 273 { 274 *gen_opc_ptr++ = opc; 275 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 276 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 277 *gen_opparam_ptr++ = GET_TCGV_I64(arg3); 278 *gen_opparam_ptr++ = GET_TCGV_I64(arg4); 279 *gen_opparam_ptr++ = GET_TCGV_I64(arg5); 280 *gen_opparam_ptr++ = GET_TCGV_I64(arg6); 281 } 282 283 static inline void tcg_gen_op6ii_i32(int opc, TCGv_i32 arg1, TCGv_i32 arg2, 284 TCGv_i32 arg3, TCGv_i32 arg4, TCGArg arg5, 285 TCGArg arg6) 286 { 287 *gen_opc_ptr++ = opc; 288 *gen_opparam_ptr++ = GET_TCGV_I32(arg1); 289 *gen_opparam_ptr++ = GET_TCGV_I32(arg2); 290 *gen_opparam_ptr++ = GET_TCGV_I32(arg3); 291 *gen_opparam_ptr++ = GET_TCGV_I32(arg4); 159 292 *gen_opparam_ptr++ = arg5; 160 293 *gen_opparam_ptr++ = arg6; 161 294 } 162 295 296 static inline void tcg_gen_op6ii_i64(int opc, TCGv_i64 arg1, TCGv_i64 arg2, 297 TCGv_i64 arg3, TCGv_i64 arg4, TCGArg arg5, 298 TCGArg arg6) 299 { 300 *gen_opc_ptr++ = opc; 301 *gen_opparam_ptr++ = GET_TCGV_I64(arg1); 302 *gen_opparam_ptr++ = GET_TCGV_I64(arg2); 303 *gen_opparam_ptr++ = GET_TCGV_I64(arg3); 304 *gen_opparam_ptr++ = GET_TCGV_I64(arg4); 305 *gen_opparam_ptr++ = arg5; 306 *gen_opparam_ptr++ = arg6; 307 } 308 163 309 static inline void gen_set_label(int n) 164 310 { … … 171 317 } 172 318 173 static inline void tcg_gen_mov_i32(TCGv ret, TCGvarg)174 { 175 if (GET_TCGV (ret) != GET_TCGV(arg))176 tcg_gen_op2 (INDEX_op_mov_i32, ret, arg);177 } 178 179 static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg)180 { 181 tcg_gen_op2i (INDEX_op_movi_i32, ret, arg);319 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg) 320 { 321 if (GET_TCGV_I32(ret) != GET_TCGV_I32(arg)) 322 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg); 323 } 324 325 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg) 326 { 327 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg); 182 328 } 183 329 184 330 /* helper calls */ 185 #define TCG_HELPER_CALL_FLAGS 0 186 187 static inline void tcg_gen_helper_0_0(void *func) 188 { 189 TCGv t0; 190 t0 = tcg_const_ptr((tcg_target_long)func); 191 tcg_gen_call(&tcg_ctx, 192 t0, TCG_HELPER_CALL_FLAGS, 193 0, NULL, 0, NULL); 194 tcg_temp_free(t0); 195 } 196 197 static inline void tcg_gen_helper_0_1(void *func, TCGv arg) 198 { 199 TCGv t0; 200 t0 = tcg_const_ptr((tcg_target_long)func); 201 tcg_gen_call(&tcg_ctx, 202 t0, TCG_HELPER_CALL_FLAGS, 203 0, NULL, 1, &arg); 204 tcg_temp_free(t0); 205 } 206 207 static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) 208 { 209 TCGv args[2]; 210 TCGv t0; 211 args[0] = arg1; 212 args[1] = arg2; 213 t0 = tcg_const_ptr((tcg_target_long)func); 214 tcg_gen_call(&tcg_ctx, 215 t0, TCG_HELPER_CALL_FLAGS, 216 0, NULL, 2, args); 217 tcg_temp_free(t0); 218 } 219 220 static inline void tcg_gen_helper_0_3(void *func, 221 TCGv arg1, TCGv arg2, TCGv arg3) 222 { 223 TCGv args[3]; 224 TCGv t0; 225 args[0] = arg1; 226 args[1] = arg2; 227 args[2] = arg3; 228 t0 = tcg_const_ptr((tcg_target_long)func); 229 tcg_gen_call(&tcg_ctx, 230 t0, TCG_HELPER_CALL_FLAGS, 231 0, NULL, 3, args); 232 tcg_temp_free(t0); 233 } 234 235 static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, 236 TCGv arg3, TCGv arg4) 237 { 238 TCGv args[4]; 239 TCGv t0; 240 args[0] = arg1; 241 args[1] = arg2; 242 args[2] = arg3; 243 args[3] = arg4; 244 t0 = tcg_const_ptr((tcg_target_long)func); 245 tcg_gen_call(&tcg_ctx, 246 t0, TCG_HELPER_CALL_FLAGS, 247 0, NULL, 4, args); 248 tcg_temp_free(t0); 249 } 250 251 static inline void tcg_gen_helper_1_0(void *func, TCGv ret) 252 { 253 TCGv t0; 254 t0 = tcg_const_ptr((tcg_target_long)func); 255 tcg_gen_call(&tcg_ctx, 256 t0, TCG_HELPER_CALL_FLAGS, 257 1, &ret, 0, NULL); 258 tcg_temp_free(t0); 259 } 260 261 static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) 262 { 263 TCGv t0; 264 t0 = tcg_const_ptr((tcg_target_long)func); 265 tcg_gen_call(&tcg_ctx, 266 t0, TCG_HELPER_CALL_FLAGS, 267 1, &ret, 1, &arg1); 268 tcg_temp_free(t0); 269 } 270 271 static inline void tcg_gen_helper_1_2(void *func, TCGv ret, 272 TCGv arg1, TCGv arg2) 273 { 274 TCGv args[2]; 275 TCGv t0; 276 args[0] = arg1; 277 args[1] = arg2; 278 t0 = tcg_const_ptr((tcg_target_long)func); 279 tcg_gen_call(&tcg_ctx, 280 t0, TCG_HELPER_CALL_FLAGS, 281 1, &ret, 2, args); 282 tcg_temp_free(t0); 283 } 284 285 static inline void tcg_gen_helper_1_3(void *func, TCGv ret, 286 TCGv arg1, TCGv arg2, TCGv arg3) 287 { 288 TCGv args[3]; 289 TCGv t0; 290 args[0] = arg1; 291 args[1] = arg2; 292 args[2] = arg3; 293 t0 = tcg_const_ptr((tcg_target_long)func); 294 tcg_gen_call(&tcg_ctx, 295 t0, TCG_HELPER_CALL_FLAGS, 296 1, &ret, 3, args); 297 tcg_temp_free(t0); 298 } 299 300 static inline void tcg_gen_helper_1_4(void *func, TCGv ret, 301 TCGv arg1, TCGv arg2, TCGv arg3, 302 TCGv arg4) 303 { 304 TCGv args[4]; 305 TCGv t0; 306 args[0] = arg1; 307 args[1] = arg2; 308 args[2] = arg3; 309 args[3] = arg4; 310 t0 = tcg_const_ptr((tcg_target_long)func); 311 tcg_gen_call(&tcg_ctx, 312 t0, TCG_HELPER_CALL_FLAGS, 313 1, &ret, 4, args); 314 tcg_temp_free(t0); 331 static inline void tcg_gen_helperN(void *func, int flags, int sizemask, 332 TCGArg ret, int nargs, TCGArg *args) 333 { 334 TCGv_ptr fn; 335 fn = tcg_const_ptr((tcg_target_long)func); 336 tcg_gen_callN(&tcg_ctx, fn, flags, sizemask, ret, 337 nargs, args); 338 tcg_temp_free_ptr(fn); 339 } 340 341 /* FIXME: Should this be pure? */ 342 static inline void tcg_gen_helper64(void *func, TCGv_i64 ret, 343 TCGv_i64 a, TCGv_i64 b) 344 { 345 TCGv_ptr fn; 346 TCGArg args[2]; 347 fn = tcg_const_ptr((tcg_target_long)func); 348 args[0] = GET_TCGV_I64(a); 349 args[1] = GET_TCGV_I64(b); 350 tcg_gen_callN(&tcg_ctx, fn, 0, 7, GET_TCGV_I64(ret), 2, args); 351 tcg_temp_free_ptr(fn); 315 352 } 316 353 317 354 /* 32 bit ops */ 318 355 319 static inline void tcg_gen_ld8u_i32(TCGv ret, TCGvarg2, tcg_target_long offset)320 { 321 tcg_gen_ op3i(INDEX_op_ld8u_i32, ret, arg2, offset);322 } 323 324 static inline void tcg_gen_ld8s_i32(TCGv ret, TCGvarg2, tcg_target_long offset)325 { 326 tcg_gen_ op3i(INDEX_op_ld8s_i32, ret, arg2, offset);327 } 328 329 static inline void tcg_gen_ld16u_i32(TCGv ret, TCGvarg2, tcg_target_long offset)330 { 331 tcg_gen_ op3i(INDEX_op_ld16u_i32, ret, arg2, offset);332 } 333 334 static inline void tcg_gen_ld16s_i32(TCGv ret, TCGvarg2, tcg_target_long offset)335 { 336 tcg_gen_ op3i(INDEX_op_ld16s_i32, ret, arg2, offset);337 } 338 339 static inline void tcg_gen_ld_i32(TCGv ret, TCGvarg2, tcg_target_long offset)340 { 341 tcg_gen_ op3i(INDEX_op_ld_i32, ret, arg2, offset);342 } 343 344 static inline void tcg_gen_st8_i32(TCGv arg1, TCGvarg2, tcg_target_long offset)345 { 346 tcg_gen_ op3i(INDEX_op_st8_i32, arg1, arg2, offset);347 } 348 349 static inline void tcg_gen_st16_i32(TCGv arg1, TCGvarg2, tcg_target_long offset)350 { 351 tcg_gen_ op3i(INDEX_op_st16_i32, arg1, arg2, offset);352 } 353 354 static inline void tcg_gen_st_i32(TCGv arg1, TCGvarg2, tcg_target_long offset)355 { 356 tcg_gen_ op3i(INDEX_op_st_i32, arg1, arg2, offset);357 } 358 359 static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGvarg2)360 { 361 tcg_gen_op3 (INDEX_op_add_i32, ret, arg1, arg2);362 } 363 364 static inline void tcg_gen_addi_i32(TCGv ret, TCGvarg1, int32_t arg2)356 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) 357 { 358 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset); 359 } 360 361 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) 362 { 363 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset); 364 } 365 366 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) 367 { 368 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset); 369 } 370 371 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) 372 { 373 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset); 374 } 375 376 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset) 377 { 378 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset); 379 } 380 381 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset) 382 { 383 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset); 384 } 385 386 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset) 387 { 388 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset); 389 } 390 391 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset) 392 { 393 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset); 394 } 395 396 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 397 { 398 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2); 399 } 400 401 static inline void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 365 402 { 366 403 /* some cases can be optimized here */ … … 368 405 tcg_gen_mov_i32(ret, arg1); 369 406 } else { 370 TCGv t0 = tcg_const_i32(arg2);407 TCGv_i32 t0 = tcg_const_i32(arg2); 371 408 tcg_gen_add_i32(ret, arg1, t0); 372 tcg_temp_free (t0);409 tcg_temp_free_i32(t0); 373 410 } 374 411 } 375 412 376 static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) 377 { 378 tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); 379 } 380 381 static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) 413 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 414 { 415 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2); 416 } 417 418 static inline void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2) 419 { 420 TCGv_i32 t0 = tcg_const_i32(arg1); 421 tcg_gen_sub_i32(ret, t0, arg2); 422 tcg_temp_free_i32(t0); 423 } 424 425 static inline void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 382 426 { 383 427 /* some cases can be optimized here */ … … 385 429 tcg_gen_mov_i32(ret, arg1); 386 430 } else { 387 TCGv t0 = tcg_const_i32(arg2);431 TCGv_i32 t0 = tcg_const_i32(arg2); 388 432 tcg_gen_sub_i32(ret, arg1, t0); 389 tcg_temp_free (t0);433 tcg_temp_free_i32(t0); 390 434 } 391 435 } 392 436 393 static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGvarg2)394 { 395 tcg_gen_op3 (INDEX_op_and_i32, ret, arg1, arg2);396 } 397 398 static inline void tcg_gen_andi_i32(TCGv ret, TCGvarg1, int32_t arg2)437 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 438 { 439 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2); 440 } 441 442 static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 399 443 { 400 444 /* some cases can be optimized here */ … … 404 448 tcg_gen_mov_i32(ret, arg1); 405 449 } else { 406 TCGv t0 = tcg_const_i32(arg2);450 TCGv_i32 t0 = tcg_const_i32(arg2); 407 451 tcg_gen_and_i32(ret, arg1, t0); 408 tcg_temp_free (t0);452 tcg_temp_free_i32(t0); 409 453 } 410 454 } 411 455 412 static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGvarg2)413 { 414 tcg_gen_op3 (INDEX_op_or_i32, ret, arg1, arg2);415 } 416 417 static inline void tcg_gen_ori_i32(TCGv ret, TCGvarg1, int32_t arg2)456 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 457 { 458 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2); 459 } 460 461 static inline void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 418 462 { 419 463 /* some cases can be optimized here */ … … 423 467 tcg_gen_mov_i32(ret, arg1); 424 468 } else { 425 TCGv t0 = tcg_const_i32(arg2);469 TCGv_i32 t0 = tcg_const_i32(arg2); 426 470 tcg_gen_or_i32(ret, arg1, t0); 427 tcg_temp_free (t0);471 tcg_temp_free_i32(t0); 428 472 } 429 473 } 430 474 431 static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGvarg2)432 { 433 tcg_gen_op3 (INDEX_op_xor_i32, ret, arg1, arg2);434 } 435 436 static inline void tcg_gen_xori_i32(TCGv ret, TCGvarg1, int32_t arg2)475 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 476 { 477 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2); 478 } 479 480 static inline void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 437 481 { 438 482 /* some cases can be optimized here */ … … 440 484 tcg_gen_mov_i32(ret, arg1); 441 485 } else { 442 TCGv t0 = tcg_const_i32(arg2);486 TCGv_i32 t0 = tcg_const_i32(arg2); 443 487 tcg_gen_xor_i32(ret, arg1, t0); 444 tcg_temp_free (t0);488 tcg_temp_free_i32(t0); 445 489 } 446 490 } 447 491 448 static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGvarg2)449 { 450 tcg_gen_op3 (INDEX_op_shl_i32, ret, arg1, arg2);451 } 452 453 static inline void tcg_gen_shli_i32(TCGv ret, TCGvarg1, int32_t arg2)492 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 493 { 494 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2); 495 } 496 497 static inline void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 454 498 { 455 499 if (arg2 == 0) { 456 500 tcg_gen_mov_i32(ret, arg1); 457 501 } else { 458 TCGv t0 = tcg_const_i32(arg2);502 TCGv_i32 t0 = tcg_const_i32(arg2); 459 503 tcg_gen_shl_i32(ret, arg1, t0); 460 tcg_temp_free (t0);504 tcg_temp_free_i32(t0); 461 505 } 462 506 } 463 507 464 static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGvarg2)465 { 466 tcg_gen_op3 (INDEX_op_shr_i32, ret, arg1, arg2);467 } 468 469 static inline void tcg_gen_shri_i32(TCGv ret, TCGvarg1, int32_t arg2)508 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 509 { 510 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2); 511 } 512 513 static inline void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 470 514 { 471 515 if (arg2 == 0) { 472 516 tcg_gen_mov_i32(ret, arg1); 473 517 } else { 474 TCGv t0 = tcg_const_i32(arg2);518 TCGv_i32 t0 = tcg_const_i32(arg2); 475 519 tcg_gen_shr_i32(ret, arg1, t0); 476 tcg_temp_free (t0);520 tcg_temp_free_i32(t0); 477 521 } 478 522 } 479 523 480 static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGvarg2)481 { 482 tcg_gen_op3 (INDEX_op_sar_i32, ret, arg1, arg2);483 } 484 485 static inline void tcg_gen_sari_i32(TCGv ret, TCGvarg1, int32_t arg2)524 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 525 { 526 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2); 527 } 528 529 static inline void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 486 530 { 487 531 if (arg2 == 0) { 488 532 tcg_gen_mov_i32(ret, arg1); 489 533 } else { 490 TCGv t0 = tcg_const_i32(arg2);534 TCGv_i32 t0 = tcg_const_i32(arg2); 491 535 tcg_gen_sar_i32(ret, arg1, t0); 492 tcg_temp_free (t0);536 tcg_temp_free_i32(t0); 493 537 } 494 538 } 495 539 496 static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGvarg2,540 static inline void tcg_gen_brcond_i32(int cond, TCGv_i32 arg1, TCGv_i32 arg2, 497 541 int label_index) 498 542 { 499 tcg_gen_op4ii (INDEX_op_brcond_i32, arg1, arg2, cond, label_index);500 } 501 502 static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2,543 tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); 544 } 545 546 static inline void tcg_gen_brcondi_i32(int cond, TCGv_i32 arg1, int32_t arg2, 503 547 int label_index) 504 548 { 505 TCGv t0 = tcg_const_i32(arg2);549 TCGv_i32 t0 = tcg_const_i32(arg2); 506 550 tcg_gen_brcond_i32(cond, arg1, t0, label_index); 507 tcg_temp_free (t0);508 } 509 510 static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGvarg2)511 { 512 tcg_gen_op3 (INDEX_op_mul_i32, ret, arg1, arg2);513 } 514 515 static inline void tcg_gen_muli_i32(TCGv ret, TCGvarg1, int32_t arg2)516 { 517 TCGv t0 = tcg_const_i32(arg2);551 tcg_temp_free_i32(t0); 552 } 553 554 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 555 { 556 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2); 557 } 558 559 static inline void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 560 { 561 TCGv_i32 t0 = tcg_const_i32(arg2); 518 562 tcg_gen_mul_i32(ret, arg1, t0); 519 tcg_temp_free (t0);563 tcg_temp_free_i32(t0); 520 564 } 521 565 522 566 #ifdef TCG_TARGET_HAS_div_i32 523 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGvarg2)524 { 525 tcg_gen_op3 (INDEX_op_div_i32, ret, arg1, arg2);526 } 527 528 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGvarg2)529 { 530 tcg_gen_op3 (INDEX_op_rem_i32, ret, arg1, arg2);531 } 532 533 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGvarg2)534 { 535 tcg_gen_op3 (INDEX_op_divu_i32, ret, arg1, arg2);536 } 537 538 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGvarg2)539 { 540 tcg_gen_op3 (INDEX_op_remu_i32, ret, arg1, arg2);541 } 542 #else 543 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGvarg2)544 { 545 TCGv t0;546 t0 = tcg_temp_new (TCG_TYPE_I32);567 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 568 { 569 tcg_gen_op3_i32(INDEX_op_div_i32, ret, arg1, arg2); 570 } 571 572 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 573 { 574 tcg_gen_op3_i32(INDEX_op_rem_i32, ret, arg1, arg2); 575 } 576 577 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 578 { 579 tcg_gen_op3_i32(INDEX_op_divu_i32, ret, arg1, arg2); 580 } 581 582 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 583 { 584 tcg_gen_op3_i32(INDEX_op_remu_i32, ret, arg1, arg2); 585 } 586 #else 587 static inline void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 588 { 589 TCGv_i32 t0; 590 t0 = tcg_temp_new_i32(); 547 591 tcg_gen_sari_i32(t0, arg1, 31); 548 tcg_gen_op5 (INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);549 tcg_temp_free (t0);550 } 551 552 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGvarg2)553 { 554 TCGv t0;555 t0 = tcg_temp_new (TCG_TYPE_I32);592 tcg_gen_op5_i32(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); 593 tcg_temp_free_i32(t0); 594 } 595 596 static inline void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 597 { 598 TCGv_i32 t0; 599 t0 = tcg_temp_new_i32(); 556 600 tcg_gen_sari_i32(t0, arg1, 31); 557 tcg_gen_op5 (INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);558 tcg_temp_free (t0);559 } 560 561 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGvarg2)562 { 563 TCGv t0;564 t0 = tcg_temp_new (TCG_TYPE_I32);601 tcg_gen_op5_i32(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); 602 tcg_temp_free_i32(t0); 603 } 604 605 static inline void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 606 { 607 TCGv_i32 t0; 608 t0 = tcg_temp_new_i32(); 565 609 tcg_gen_movi_i32(t0, 0); 566 tcg_gen_op5 (INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);567 tcg_temp_free (t0);568 } 569 570 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGvarg2)571 { 572 TCGv t0;573 t0 = tcg_temp_new (TCG_TYPE_I32);610 tcg_gen_op5_i32(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); 611 tcg_temp_free_i32(t0); 612 } 613 614 static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 615 { 616 TCGv_i32 t0; 617 t0 = tcg_temp_new_i32(); 574 618 tcg_gen_movi_i32(t0, 0); 575 tcg_gen_op5 (INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);576 tcg_temp_free (t0);619 tcg_gen_op5_i32(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); 620 tcg_temp_free_i32(t0); 577 621 } 578 622 #endif … … 580 624 #if TCG_TARGET_REG_BITS == 32 581 625 582 static inline void tcg_gen_mov_i64(TCGv ret, TCGvarg)583 { 584 if (GET_TCGV (ret) != GET_TCGV(arg)) {585 tcg_gen_mov_i32( ret, arg);626 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg) 627 { 628 if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg)) { 629 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 586 630 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); 587 631 } 588 632 } 589 633 590 static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg)591 { 592 tcg_gen_movi_i32( ret, arg);634 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg) 635 { 636 tcg_gen_movi_i32(TCGV_LOW(ret), arg); 593 637 tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); 594 638 } 595 639 596 static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) 597 { 598 tcg_gen_ld8u_i32(ret, arg2, offset); 640 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, 641 tcg_target_long offset) 642 { 643 tcg_gen_ld8u_i32(TCGV_LOW(ret), arg2, offset); 599 644 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 600 645 } 601 646 602 static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) 603 { 604 tcg_gen_ld8s_i32(ret, arg2, offset); 605 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); 606 } 607 608 static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) 609 { 610 tcg_gen_ld16u_i32(ret, arg2, offset); 647 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, 648 tcg_target_long offset) 649 { 650 tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset); 651 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31); 652 } 653 654 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, 655 tcg_target_long offset) 656 { 657 tcg_gen_ld16u_i32(TCGV_LOW(ret), arg2, offset); 611 658 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 612 659 } 613 660 614 static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) 615 { 616 tcg_gen_ld16s_i32(ret, arg2, offset); 617 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); 618 } 619 620 static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) 621 { 622 tcg_gen_ld_i32(ret, arg2, offset); 661 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, 662 tcg_target_long offset) 663 { 664 tcg_gen_ld16s_i32(TCGV_LOW(ret), arg2, offset); 665 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 666 } 667 668 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, 669 tcg_target_long offset) 670 { 671 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset); 623 672 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 624 673 } 625 674 626 static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) 627 { 628 tcg_gen_ld_i32(ret, arg2, offset); 629 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); 630 } 631 632 static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) 675 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, 676 tcg_target_long offset) 677 { 678 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset); 679 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 680 } 681 682 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, 683 tcg_target_long offset) 633 684 { 634 685 /* since arg2 and ret have different types, they cannot be the … … 636 687 #ifdef TCG_TARGET_WORDS_BIGENDIAN 637 688 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); 638 tcg_gen_ld_i32( ret, arg2, offset + 4);639 #else 640 tcg_gen_ld_i32( ret, arg2, offset);689 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset + 4); 690 #else 691 tcg_gen_ld_i32(TCGV_LOW(ret), arg2, offset); 641 692 tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); 642 693 #endif 643 694 } 644 695 645 static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) 646 { 647 tcg_gen_st8_i32(arg1, arg2, offset); 648 } 649 650 static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) 651 { 652 tcg_gen_st16_i32(arg1, arg2, offset); 653 } 654 655 static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) 656 { 657 tcg_gen_st_i32(arg1, arg2, offset); 658 } 659 660 static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) 696 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, 697 tcg_target_long offset) 698 { 699 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset); 700 } 701 702 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, 703 tcg_target_long offset) 704 { 705 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset); 706 } 707 708 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, 709 tcg_target_long offset) 710 { 711 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); 712 } 713 714 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, 715 tcg_target_long offset) 661 716 { 662 717 #ifdef TCG_TARGET_WORDS_BIGENDIAN 663 718 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); 664 tcg_gen_st_i32( arg1, arg2, offset + 4);665 #else 666 tcg_gen_st_i32( arg1, arg2, offset);719 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4); 720 #else 721 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); 667 722 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); 668 723 #endif 669 724 } 670 725 671 static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) 672 { 673 tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), 674 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); 675 } 676 677 static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) 678 { 679 TCGv t0 = tcg_const_i64(arg2); 680 tcg_gen_add_i64(ret, arg1, t0); 681 tcg_temp_free(t0); 682 } 683 684 static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) 685 { 686 tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), 687 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); 688 } 689 690 static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) 691 { 692 TCGv t0 = tcg_const_i64(arg2); 693 tcg_gen_sub_i64(ret, arg1, t0); 694 tcg_temp_free(t0); 695 } 696 697 static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) 698 { 699 tcg_gen_and_i32(ret, arg1, arg2); 726 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 727 { 728 tcg_gen_op6_i32(INDEX_op_add2_i32, TCGV_LOW(ret), TCGV_HIGH(ret), 729 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2), 730 TCGV_HIGH(arg2)); 731 } 732 733 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 734 { 735 tcg_gen_op6_i32(INDEX_op_sub2_i32, TCGV_LOW(ret), TCGV_HIGH(ret), 736 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2), 737 TCGV_HIGH(arg2)); 738 } 739 740 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 741 { 742 tcg_gen_and_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); 700 743 tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); 701 744 } 702 745 703 static inline void tcg_gen_andi_i64(TCGv ret, TCGvarg1, int64_t arg2)704 { 705 tcg_gen_andi_i32( ret, arg1, arg2);746 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 747 { 748 tcg_gen_andi_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2); 706 749 tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); 707 750 } 708 751 709 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGvarg2)710 { 711 tcg_gen_or_i32( ret, arg1, arg2);752 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 753 { 754 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); 712 755 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); 713 756 } 714 757 715 static inline void tcg_gen_ori_i64(TCGv ret, TCGvarg1, int64_t arg2)716 { 717 tcg_gen_ori_i32( ret, arg1, arg2);758 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 759 { 760 tcg_gen_ori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2); 718 761 tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); 719 762 } 720 763 721 static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGvarg2)722 { 723 tcg_gen_xor_i32( ret, arg1, arg2);764 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 765 { 766 tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); 724 767 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); 725 768 } 726 769 727 static inline void tcg_gen_xori_i64(TCGv ret, TCGvarg1, int64_t arg2)728 { 729 tcg_gen_xori_i32( ret, arg1, arg2);770 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 771 { 772 tcg_gen_xori_i32(TCGV_LOW(ret), TCGV_LOW(arg1), arg2); 730 773 tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); 731 774 } … … 733 776 /* XXX: use generic code when basic block handling is OK or CPU 734 777 specific code (x86) */ 735 static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGvarg2)736 { 737 tcg_gen_helper _1_2(tcg_helper_shl_i64, ret, arg1, arg2);738 } 739 740 static inline void tcg_gen_shli_i64(TCGv ret, TCGvarg1, int64_t arg2)778 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 779 { 780 tcg_gen_helper64(tcg_helper_shl_i64, ret, arg1, arg2); 781 } 782 783 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 741 784 { 742 785 tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); 743 786 } 744 787 745 static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGvarg2)746 { 747 tcg_gen_helper _1_2(tcg_helper_shr_i64, ret, arg1, arg2);748 } 749 750 static inline void tcg_gen_shri_i64(TCGv ret, TCGvarg1, int64_t arg2)788 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 789 { 790 tcg_gen_helper64(tcg_helper_shr_i64, ret, arg1, arg2); 791 } 792 793 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 751 794 { 752 795 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); 753 796 } 754 797 755 static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGvarg2)756 { 757 tcg_gen_helper _1_2(tcg_helper_sar_i64, ret, arg1, arg2);758 } 759 760 static inline void tcg_gen_sari_i64(TCGv ret, TCGvarg1, int64_t arg2)798 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 799 { 800 tcg_gen_helper64(tcg_helper_sar_i64, ret, arg1, arg2); 801 } 802 803 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 761 804 { 762 805 tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); 763 806 } 764 807 765 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGvarg2,808 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2, 766 809 int label_index) 767 810 { 768 tcg_gen_op6ii(INDEX_op_brcond2_i32, 769 arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), 770 cond, label_index); 771 } 772 773 static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) 774 { 775 TCGv t0, t1; 776 777 t0 = tcg_temp_new(TCG_TYPE_I64); 778 t1 = tcg_temp_new(TCG_TYPE_I32); 779 780 tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); 781 782 tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); 811 tcg_gen_op6ii_i32(INDEX_op_brcond2_i32, 812 TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2), 813 TCGV_HIGH(arg2), cond, label_index); 814 } 815 816 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 817 { 818 TCGv_i64 t0; 819 TCGv_i32 t1; 820 821 t0 = tcg_temp_new_i64(); 822 t1 = tcg_temp_new_i32(); 823 824 tcg_gen_op4_i32(INDEX_op_mulu2_i32, TCGV_LOW(t0), TCGV_HIGH(t0), 825 TCGV_LOW(arg1), TCGV_LOW(arg2)); 826 827 tcg_gen_mul_i32(t1, TCGV_LOW(arg1), TCGV_HIGH(arg2)); 783 828 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); 784 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2);829 tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), TCGV_LOW(arg2)); 785 830 tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); 786 831 787 832 tcg_gen_mov_i64(ret, t0); 788 tcg_temp_free(t0); 789 tcg_temp_free(t1); 790 } 791 792 static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) 793 { 794 TCGv t0 = tcg_const_i64(arg2); 795 tcg_gen_mul_i64(ret, arg1, t0); 796 tcg_temp_free(t0); 797 } 798 799 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) 800 { 801 tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); 802 } 803 804 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) 805 { 806 tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); 807 } 808 809 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) 810 { 811 tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); 812 } 813 814 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) 815 { 816 tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); 817 } 818 819 #else 820 821 static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) 822 { 823 if (GET_TCGV(ret) != GET_TCGV(arg)) 824 tcg_gen_op2(INDEX_op_mov_i64, ret, arg); 825 } 826 827 static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) 828 { 829 tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); 830 } 831 832 static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, 833 tcg_temp_free_i64(t0); 834 tcg_temp_free_i32(t1); 835 } 836 837 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 838 { 839 tcg_gen_helper64(tcg_helper_div_i64, ret, arg1, arg2); 840 } 841 842 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 843 { 844 tcg_gen_helper64(tcg_helper_rem_i64, ret, arg1, arg2); 845 } 846 847 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 848 { 849 tcg_gen_helper64(tcg_helper_divu_i64, ret, arg1, arg2); 850 } 851 852 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 853 { 854 tcg_gen_helper64(tcg_helper_remu_i64, ret, arg1, arg2); 855 } 856 857 #else 858 859 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg) 860 { 861 if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg)) 862 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg); 863 } 864 865 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg) 866 { 867 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg); 868 } 869 870 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_i64 arg2, 833 871 tcg_target_long offset) 834 872 { 835 tcg_gen_ op3i(INDEX_op_ld8u_i64, ret, arg2, offset);836 } 837 838 static inline void tcg_gen_ld8s_i64(TCGv ret, TCGvarg2,873 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset); 874 } 875 876 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_i64 arg2, 839 877 tcg_target_long offset) 840 878 { 841 tcg_gen_ op3i(INDEX_op_ld8s_i64, ret, arg2, offset);842 } 843 844 static inline void tcg_gen_ld16u_i64(TCGv ret, TCGvarg2,879 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset); 880 } 881 882 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_i64 arg2, 845 883 tcg_target_long offset) 846 884 { 847 tcg_gen_ op3i(INDEX_op_ld16u_i64, ret, arg2, offset);848 } 849 850 static inline void tcg_gen_ld16s_i64(TCGv ret, TCGvarg2,885 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset); 886 } 887 888 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_i64 arg2, 851 889 tcg_target_long offset) 852 890 { 853 tcg_gen_ op3i(INDEX_op_ld16s_i64, ret, arg2, offset);854 } 855 856 static inline void tcg_gen_ld32u_i64(TCGv ret, TCGvarg2,891 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset); 892 } 893 894 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_i64 arg2, 857 895 tcg_target_long offset) 858 896 { 859 tcg_gen_ op3i(INDEX_op_ld32u_i64, ret, arg2, offset);860 } 861 862 static inline void tcg_gen_ld32s_i64(TCGv ret, TCGvarg2,897 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset); 898 } 899 900 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_i64 arg2, 863 901 tcg_target_long offset) 864 902 { 865 tcg_gen_ op3i(INDEX_op_ld32s_i64, ret, arg2, offset);866 } 867 868 static inline void tcg_gen_ld_i64(TCGv ret, TCGvarg2, tcg_target_long offset)869 { 870 tcg_gen_ op3i(INDEX_op_ld_i64, ret, arg2, offset);871 } 872 873 static inline void tcg_gen_st8_i64(TCGv arg1, TCGvarg2,903 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset); 904 } 905 906 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_i64 arg2, tcg_target_long offset) 907 { 908 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset); 909 } 910 911 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_i64 arg2, 874 912 tcg_target_long offset) 875 913 { 876 tcg_gen_ op3i(INDEX_op_st8_i64, arg1, arg2, offset);877 } 878 879 static inline void tcg_gen_st16_i64(TCGv arg1, TCGvarg2,914 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset); 915 } 916 917 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_i64 arg2, 880 918 tcg_target_long offset) 881 919 { 882 tcg_gen_ op3i(INDEX_op_st16_i64, arg1, arg2, offset);883 } 884 885 static inline void tcg_gen_st32_i64(TCGv arg1, TCGvarg2,920 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset); 921 } 922 923 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_i64 arg2, 886 924 tcg_target_long offset) 887 925 { 888 tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); 889 } 890 891 static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) 892 { 893 tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); 894 } 895 896 static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) 897 { 898 tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); 899 } 900 901 static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) 902 { 903 TCGv t0 = tcg_const_i64(arg2); 904 tcg_gen_add_i64(ret, arg1, t0); 905 tcg_temp_free(t0); 906 } 907 908 static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) 909 { 910 tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); 911 } 912 913 static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) 914 { 915 TCGv t0 = tcg_const_i64(arg2); 916 tcg_gen_sub_i64(ret, arg1, t0); 917 tcg_temp_free(t0); 918 } 919 920 static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) 921 { 922 tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); 923 } 924 925 static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) 926 { 927 TCGv t0 = tcg_const_i64(arg2); 926 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset); 927 } 928 929 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_i64 arg2, tcg_target_long offset) 930 { 931 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset); 932 } 933 934 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 935 { 936 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2); 937 } 938 939 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 940 { 941 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2); 942 } 943 944 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 945 { 946 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2); 947 } 948 949 static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 950 { 951 TCGv_i64 t0 = tcg_const_i64(arg2); 928 952 tcg_gen_and_i64(ret, arg1, t0); 929 tcg_temp_free (t0);930 } 931 932 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGvarg2)933 { 934 tcg_gen_op3 (INDEX_op_or_i64, ret, arg1, arg2);935 } 936 937 static inline void tcg_gen_ori_i64(TCGv ret, TCGvarg1, int64_t arg2)938 { 939 TCGv t0 = tcg_const_i64(arg2);953 tcg_temp_free_i64(t0); 954 } 955 956 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 957 { 958 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2); 959 } 960 961 static inline void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 962 { 963 TCGv_i64 t0 = tcg_const_i64(arg2); 940 964 tcg_gen_or_i64(ret, arg1, t0); 941 tcg_temp_free (t0);942 } 943 944 static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGvarg2)945 { 946 tcg_gen_op3 (INDEX_op_xor_i64, ret, arg1, arg2);947 } 948 949 static inline void tcg_gen_xori_i64(TCGv ret, TCGvarg1, int64_t arg2)950 { 951 TCGv t0 = tcg_const_i64(arg2);965 tcg_temp_free_i64(t0); 966 } 967 968 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 969 { 970 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2); 971 } 972 973 static inline void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 974 { 975 TCGv_i64 t0 = tcg_const_i64(arg2); 952 976 tcg_gen_xor_i64(ret, arg1, t0); 953 tcg_temp_free (t0);954 } 955 956 static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGvarg2)957 { 958 tcg_gen_op3 (INDEX_op_shl_i64, ret, arg1, arg2);959 } 960 961 static inline void tcg_gen_shli_i64(TCGv ret, TCGvarg1, int64_t arg2)977 tcg_temp_free_i64(t0); 978 } 979 980 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 981 { 982 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2); 983 } 984 985 static inline void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 962 986 { 963 987 if (arg2 == 0) { 964 988 tcg_gen_mov_i64(ret, arg1); 965 989 } else { 966 TCGv t0 = tcg_const_i64(arg2);990 TCGv_i64 t0 = tcg_const_i64(arg2); 967 991 tcg_gen_shl_i64(ret, arg1, t0); 968 tcg_temp_free (t0);992 tcg_temp_free_i64(t0); 969 993 } 970 994 } 971 995 972 static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGvarg2)973 { 974 tcg_gen_op3 (INDEX_op_shr_i64, ret, arg1, arg2);975 } 976 977 static inline void tcg_gen_shri_i64(TCGv ret, TCGvarg1, int64_t arg2)996 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 997 { 998 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2); 999 } 1000 1001 static inline void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 978 1002 { 979 1003 if (arg2 == 0) { 980 1004 tcg_gen_mov_i64(ret, arg1); 981 1005 } else { 982 TCGv t0 = tcg_const_i64(arg2);1006 TCGv_i64 t0 = tcg_const_i64(arg2); 983 1007 tcg_gen_shr_i64(ret, arg1, t0); 984 tcg_temp_free (t0);1008 tcg_temp_free_i64(t0); 985 1009 } 986 1010 } 987 1011 988 static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGvarg2)989 { 990 tcg_gen_op3 (INDEX_op_sar_i64, ret, arg1, arg2);991 } 992 993 static inline void tcg_gen_sari_i64(TCGv ret, TCGvarg1, int64_t arg2)1012 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1013 { 1014 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2); 1015 } 1016 1017 static inline void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 994 1018 { 995 1019 if (arg2 == 0) { 996 1020 tcg_gen_mov_i64(ret, arg1); 997 1021 } else { 998 TCGv t0 = tcg_const_i64(arg2);1022 TCGv_i64 t0 = tcg_const_i64(arg2); 999 1023 tcg_gen_sar_i64(ret, arg1, t0); 1000 tcg_temp_free (t0);1024 tcg_temp_free_i64(t0); 1001 1025 } 1002 1026 } 1003 1027 1004 static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGvarg2,1028 static inline void tcg_gen_brcond_i64(int cond, TCGv_i64 arg1, TCGv_i64 arg2, 1005 1029 int label_index) 1006 1030 { 1007 tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); 1008 } 1009 1010 static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) 1011 { 1012 tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); 1013 } 1014 1015 static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) 1016 { 1017 TCGv t0 = tcg_const_i64(arg2); 1031 tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); 1032 } 1033 1034 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1035 { 1036 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2); 1037 } 1038 1039 #ifdef TCG_TARGET_HAS_div_i64 1040 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1041 { 1042 tcg_gen_op3_i64(INDEX_op_div_i64, ret, arg1, arg2); 1043 } 1044 1045 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1046 { 1047 tcg_gen_op3_i64(INDEX_op_rem_i64, ret, arg1, arg2); 1048 } 1049 1050 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1051 { 1052 tcg_gen_op3_i64(INDEX_op_divu_i64, ret, arg1, arg2); 1053 } 1054 1055 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1056 { 1057 tcg_gen_op3_i64(INDEX_op_remu_i64, ret, arg1, arg2); 1058 } 1059 #else 1060 static inline void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1061 { 1062 TCGv_i64 t0; 1063 t0 = tcg_temp_new_i64(); 1064 tcg_gen_sari_i64(t0, arg1, 63); 1065 tcg_gen_op5_i64(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); 1066 tcg_temp_free_i64(t0); 1067 } 1068 1069 static inline void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1070 { 1071 TCGv_i64 t0; 1072 t0 = tcg_temp_new_i64(); 1073 tcg_gen_sari_i64(t0, arg1, 63); 1074 tcg_gen_op5_i64(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); 1075 tcg_temp_free_i64(t0); 1076 } 1077 1078 static inline void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1079 { 1080 TCGv_i64 t0; 1081 t0 = tcg_temp_new_i64(); 1082 tcg_gen_movi_i64(t0, 0); 1083 tcg_gen_op5_i64(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); 1084 tcg_temp_free_i64(t0); 1085 } 1086 1087 static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1088 { 1089 TCGv_i64 t0; 1090 t0 = tcg_temp_new_i64(); 1091 tcg_gen_movi_i64(t0, 0); 1092 tcg_gen_op5_i64(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); 1093 tcg_temp_free_i64(t0); 1094 } 1095 #endif 1096 1097 #endif 1098 1099 static inline void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 1100 { 1101 /* some cases can be optimized here */ 1102 if (arg2 == 0) { 1103 tcg_gen_mov_i64(ret, arg1); 1104 } else { 1105 TCGv_i64 t0 = tcg_const_i64(arg2); 1106 tcg_gen_add_i64(ret, arg1, t0); 1107 tcg_temp_free_i64(t0); 1108 } 1109 } 1110 1111 static inline void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2) 1112 { 1113 TCGv_i64 t0 = tcg_const_i64(arg1); 1114 tcg_gen_sub_i64(ret, t0, arg2); 1115 tcg_temp_free_i64(t0); 1116 } 1117 1118 static inline void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 1119 { 1120 /* some cases can be optimized here */ 1121 if (arg2 == 0) { 1122 tcg_gen_mov_i64(ret, arg1); 1123 } else { 1124 TCGv_i64 t0 = tcg_const_i64(arg2); 1125 tcg_gen_sub_i64(ret, arg1, t0); 1126 tcg_temp_free_i64(t0); 1127 } 1128 } 1129 static inline void tcg_gen_brcondi_i64(int cond, TCGv_i64 arg1, int64_t arg2, 1130 int label_index) 1131 { 1132 TCGv_i64 t0 = tcg_const_i64(arg2); 1133 tcg_gen_brcond_i64(cond, arg1, t0, label_index); 1134 tcg_temp_free_i64(t0); 1135 } 1136 1137 static inline void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 1138 { 1139 TCGv_i64 t0 = tcg_const_i64(arg2); 1018 1140 tcg_gen_mul_i64(ret, arg1, t0); 1019 tcg_temp_free(t0); 1020 } 1021 1022 #ifdef TCG_TARGET_HAS_div_i64 1023 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) 1024 { 1025 tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); 1026 } 1027 1028 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) 1029 { 1030 tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); 1031 } 1032 1033 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) 1034 { 1035 tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); 1036 } 1037 1038 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) 1039 { 1040 tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); 1041 } 1042 #else 1043 static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) 1044 { 1045 TCGv t0; 1046 t0 = tcg_temp_new(TCG_TYPE_I64); 1047 tcg_gen_sari_i64(t0, arg1, 63); 1048 tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); 1049 tcg_temp_free(t0); 1050 } 1051 1052 static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) 1053 { 1054 TCGv t0; 1055 t0 = tcg_temp_new(TCG_TYPE_I64); 1056 tcg_gen_sari_i64(t0, arg1, 63); 1057 tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); 1058 tcg_temp_free(t0); 1059 } 1060 1061 static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) 1062 { 1063 TCGv t0; 1064 t0 = tcg_temp_new(TCG_TYPE_I64); 1065 tcg_gen_movi_i64(t0, 0); 1066 tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); 1067 tcg_temp_free(t0); 1068 } 1069 1070 static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) 1071 { 1072 TCGv t0; 1073 t0 = tcg_temp_new(TCG_TYPE_I64); 1074 tcg_gen_movi_i64(t0, 0); 1075 tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); 1076 tcg_temp_free(t0); 1077 } 1078 #endif 1079 1080 #endif 1081 1082 static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, 1083 int label_index) 1084 { 1085 TCGv t0 = tcg_const_i64(arg2); 1086 tcg_gen_brcond_i64(cond, arg1, t0, label_index); 1087 tcg_temp_free(t0); 1088 } 1141 tcg_temp_free_i64(t0); 1142 } 1143 1089 1144 1090 1145 /***************************************/ 1091 1146 /* optional operations */ 1092 1147 1093 static inline void tcg_gen_ext8s_i32(TCGv ret, TCGvarg)1148 static inline void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg) 1094 1149 { 1095 1150 #ifdef TCG_TARGET_HAS_ext8s_i32 1096 tcg_gen_op2 (INDEX_op_ext8s_i32, ret, arg);1151 tcg_gen_op2_i32(INDEX_op_ext8s_i32, ret, arg); 1097 1152 #else 1098 1153 tcg_gen_shli_i32(ret, arg, 24); … … 1101 1156 } 1102 1157 1103 static inline void tcg_gen_ext16s_i32(TCGv ret, TCGvarg)1158 static inline void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg) 1104 1159 { 1105 1160 #ifdef TCG_TARGET_HAS_ext16s_i32 1106 tcg_gen_op2 (INDEX_op_ext16s_i32, ret, arg);1161 tcg_gen_op2_i32(INDEX_op_ext16s_i32, ret, arg); 1107 1162 #else 1108 1163 tcg_gen_shli_i32(ret, arg, 16); … … 1113 1168 /* These are currently just for convenience. 1114 1169 We assume a target will recognise these automatically . */ 1115 static inline void tcg_gen_ext8u_i32(TCGv ret, TCGvarg)1170 static inline void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg) 1116 1171 { 1117 1172 tcg_gen_andi_i32(ret, arg, 0xffu); 1118 1173 } 1119 1174 1120 static inline void tcg_gen_ext16u_i32(TCGv ret, TCGvarg)1175 static inline void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg) 1121 1176 { 1122 1177 tcg_gen_andi_i32(ret, arg, 0xffffu); … … 1124 1179 1125 1180 /* Note: we assume the two high bytes are set to zero */ 1126 static inline void tcg_gen_bswap16_i32(TCGv ret, TCGvarg)1181 static inline void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg) 1127 1182 { 1128 1183 #ifdef TCG_TARGET_HAS_bswap16_i32 1129 tcg_gen_op2 (INDEX_op_bswap16_i32, ret, arg);1130 #else 1131 TCGv t0, t1;1132 t0 = tcg_temp_new (TCG_TYPE_I32);1133 t1 = tcg_temp_new (TCG_TYPE_I32);1184 tcg_gen_op2_i32(INDEX_op_bswap16_i32, ret, arg); 1185 #else 1186 TCGv_i32 t0, t1; 1187 t0 = tcg_temp_new_i32(); 1188 t1 = tcg_temp_new_i32(); 1134 1189 1135 1190 tcg_gen_shri_i32(t0, arg, 8); … … 1137 1192 tcg_gen_shli_i32(t1, t1, 8); 1138 1193 tcg_gen_or_i32(ret, t0, t1); 1139 tcg_temp_free (t0);1140 tcg_temp_free (t1);1141 #endif 1142 } 1143 1144 static inline void tcg_gen_bswap_i32(TCGv ret, TCGvarg)1194 tcg_temp_free_i32(t0); 1195 tcg_temp_free_i32(t1); 1196 #endif 1197 } 1198 1199 static inline void tcg_gen_bswap_i32(TCGv_i32 ret, TCGv_i32 arg) 1145 1200 { 1146 1201 #ifdef TCG_TARGET_HAS_bswap_i32 1147 tcg_gen_op2 (INDEX_op_bswap_i32, ret, arg);1148 #else 1149 TCGv t0, t1;1150 t0 = tcg_temp_new (TCG_TYPE_I32);1151 t1 = tcg_temp_new (TCG_TYPE_I32);1202 tcg_gen_op2_i32(INDEX_op_bswap_i32, ret, arg); 1203 #else 1204 TCGv_i32 t0, t1; 1205 t0 = tcg_temp_new_i32(); 1206 t1 = tcg_temp_new_i32(); 1152 1207 1153 1208 tcg_gen_shli_i32(t0, arg, 24); … … 1163 1218 tcg_gen_shri_i32(t1, arg, 24); 1164 1219 tcg_gen_or_i32(ret, t0, t1); 1165 tcg_temp_free (t0);1166 tcg_temp_free (t1);1220 tcg_temp_free_i32(t0); 1221 tcg_temp_free_i32(t1); 1167 1222 #endif 1168 1223 } 1169 1224 1170 1225 #if TCG_TARGET_REG_BITS == 32 1171 static inline void tcg_gen_ext8s_i64(TCGv ret, TCGvarg)1172 { 1173 tcg_gen_ext8s_i32( ret, arg);1174 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);1175 } 1176 1177 static inline void tcg_gen_ext16s_i64(TCGv ret, TCGvarg)1178 { 1179 tcg_gen_ext16s_i32( ret, arg);1180 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);1181 } 1182 1183 static inline void tcg_gen_ext32s_i64(TCGv ret, TCGvarg)1184 { 1185 tcg_gen_mov_i32( ret, arg);1186 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);1187 } 1188 1189 static inline void tcg_gen_ext8u_i64(TCGv ret, TCGvarg)1190 { 1191 tcg_gen_ext8u_i32( ret, arg);1226 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg) 1227 { 1228 tcg_gen_ext8s_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 1229 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 1230 } 1231 1232 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg) 1233 { 1234 tcg_gen_ext16s_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 1235 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 1236 } 1237 1238 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg) 1239 { 1240 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 1241 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 1242 } 1243 1244 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg) 1245 { 1246 tcg_gen_ext8u_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 1192 1247 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 1193 1248 } 1194 1249 1195 static inline void tcg_gen_ext16u_i64(TCGv ret, TCGvarg)1196 { 1197 tcg_gen_ext16u_i32( ret, arg);1250 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg) 1251 { 1252 tcg_gen_ext16u_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 1198 1253 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 1199 1254 } 1200 1255 1201 static inline void tcg_gen_ext32u_i64(TCGv ret, TCGvarg)1202 { 1203 tcg_gen_mov_i32( ret, arg);1256 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg) 1257 { 1258 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg)); 1204 1259 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 1205 1260 } 1206 1261 1207 static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGvarg)1208 { 1209 tcg_gen_mov_i32(ret, arg);1210 } 1211 1212 static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGvarg)1213 { 1214 tcg_gen_mov_i32( ret, arg);1262 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg) 1263 { 1264 tcg_gen_mov_i32(ret, TCGV_LOW(arg)); 1265 } 1266 1267 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg) 1268 { 1269 tcg_gen_mov_i32(TCGV_LOW(ret), arg); 1215 1270 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 1216 1271 } 1217 1272 1218 static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGvarg)1219 { 1220 tcg_gen_mov_i32( ret, arg);1221 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);1222 } 1223 1224 static inline void tcg_gen_bswap_i64(TCGv ret, TCGvarg)1225 { 1226 TCGv t0, t1;1227 t0 = tcg_temp_new (TCG_TYPE_I32);1228 t1 = tcg_temp_new (TCG_TYPE_I32);1229 1230 tcg_gen_bswap_i32(t0, arg);1273 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg) 1274 { 1275 tcg_gen_mov_i32(TCGV_LOW(ret), arg); 1276 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 1277 } 1278 1279 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg) 1280 { 1281 TCGv_i32 t0, t1; 1282 t0 = tcg_temp_new_i32(); 1283 t1 = tcg_temp_new_i32(); 1284 1285 tcg_gen_bswap_i32(t0, TCGV_LOW(arg)); 1231 1286 tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); 1232 tcg_gen_mov_i32( ret, t1);1287 tcg_gen_mov_i32(TCGV_LOW(ret), t1); 1233 1288 tcg_gen_mov_i32(TCGV_HIGH(ret), t0); 1234 tcg_temp_free (t0);1235 tcg_temp_free (t1);1236 } 1237 #else 1238 1239 static inline void tcg_gen_ext8s_i64(TCGv ret, TCGvarg)1289 tcg_temp_free_i32(t0); 1290 tcg_temp_free_i32(t1); 1291 } 1292 #else 1293 1294 static inline void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg) 1240 1295 { 1241 1296 #ifdef TCG_TARGET_HAS_ext8s_i64 1242 tcg_gen_op2 (INDEX_op_ext8s_i64, ret, arg);1297 tcg_gen_op2_i64(INDEX_op_ext8s_i64, ret, arg); 1243 1298 #else 1244 1299 tcg_gen_shli_i64(ret, arg, 56); … … 1247 1302 } 1248 1303 1249 static inline void tcg_gen_ext16s_i64(TCGv ret, TCGvarg)1304 static inline void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg) 1250 1305 { 1251 1306 #ifdef TCG_TARGET_HAS_ext16s_i64 1252 tcg_gen_op2 (INDEX_op_ext16s_i64, ret, arg);1307 tcg_gen_op2_i64(INDEX_op_ext16s_i64, ret, arg); 1253 1308 #else 1254 1309 tcg_gen_shli_i64(ret, arg, 48); … … 1257 1312 } 1258 1313 1259 static inline void tcg_gen_ext32s_i64(TCGv ret, TCGvarg)1314 static inline void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg) 1260 1315 { 1261 1316 #ifdef TCG_TARGET_HAS_ext32s_i64 1262 tcg_gen_op2 (INDEX_op_ext32s_i64, ret, arg);1317 tcg_gen_op2_i64(INDEX_op_ext32s_i64, ret, arg); 1263 1318 #else 1264 1319 tcg_gen_shli_i64(ret, arg, 32); … … 1267 1322 } 1268 1323 1269 static inline void tcg_gen_ext8u_i64(TCGv ret, TCGvarg)1324 static inline void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg) 1270 1325 { 1271 1326 tcg_gen_andi_i64(ret, arg, 0xffu); 1272 1327 } 1273 1328 1274 static inline void tcg_gen_ext16u_i64(TCGv ret, TCGvarg)1329 static inline void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg) 1275 1330 { 1276 1331 tcg_gen_andi_i64(ret, arg, 0xffffu); 1277 1332 } 1278 1333 1279 static inline void tcg_gen_ext32u_i64(TCGv ret, TCGvarg)1334 static inline void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg) 1280 1335 { 1281 1336 tcg_gen_andi_i64(ret, arg, 0xffffffffu); … … 1284 1339 /* Note: we assume the target supports move between 32 and 64 bit 1285 1340 registers. This will probably break MIPS64 targets. */ 1286 static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGvarg)1287 { 1288 tcg_gen_mov_i32(ret, arg);1341 static inline void tcg_gen_trunc_i64_i32(TCGv_i32 ret, TCGv_i64 arg) 1342 { 1343 tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg))); 1289 1344 } 1290 1345 1291 1346 /* Note: we assume the target supports move between 32 and 64 bit 1292 1347 registers */ 1293 static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGvarg)1294 { 1295 tcg_gen_andi_i64(ret, arg, 0xffffffffu);1348 static inline void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg) 1349 { 1350 tcg_gen_andi_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg)), 0xffffffffu); 1296 1351 } 1297 1352 1298 1353 /* Note: we assume the target supports move between 32 and 64 bit 1299 1354 registers */ 1300 static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGvarg)1301 { 1302 tcg_gen_ext32s_i64(ret, arg);1303 } 1304 1305 static inline void tcg_gen_bswap_i64(TCGv ret, TCGvarg)1355 static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg) 1356 { 1357 tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg))); 1358 } 1359 1360 static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg) 1306 1361 { 1307 1362 #ifdef TCG_TARGET_HAS_bswap_i64 1308 tcg_gen_op2 (INDEX_op_bswap_i64, ret, arg);1309 #else 1310 TCGv t0, t1;1311 t0 = tcg_temp_new (TCG_TYPE_I32);1312 t1 = tcg_temp_new (TCG_TYPE_I32);1363 tcg_gen_op2_i64(INDEX_op_bswap_i64, ret, arg); 1364 #else 1365 TCGv_i32 t0, t1; 1366 t0 = tcg_temp_new_i32(); 1367 t1 = tcg_temp_new_i32(); 1313 1368 1314 1369 tcg_gen_shli_i64(t0, arg, 56); … … 1340 1395 tcg_gen_shri_i64(t1, arg, 56); 1341 1396 tcg_gen_or_i64(ret, t0, t1); 1342 tcg_temp_free (t0);1343 tcg_temp_free (t1);1344 #endif 1345 } 1346 1347 #endif 1348 1349 static inline void tcg_gen_neg_i32(TCGv ret, TCGvarg)1397 tcg_temp_free_i32(t0); 1398 tcg_temp_free_i32(t1); 1399 #endif 1400 } 1401 1402 #endif 1403 1404 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg) 1350 1405 { 1351 1406 #ifdef TCG_TARGET_HAS_neg_i32 1352 tcg_gen_op2 (INDEX_op_neg_i32, ret, arg);1353 #else 1354 TCGv t0 = tcg_const_i32(0);1407 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg); 1408 #else 1409 TCGv_i32 t0 = tcg_const_i32(0); 1355 1410 tcg_gen_sub_i32(ret, t0, arg); 1356 tcg_temp_free (t0);1357 #endif 1358 } 1359 1360 static inline void tcg_gen_neg_i64(TCGv ret, TCGvarg)1411 tcg_temp_free_i32(t0); 1412 #endif 1413 } 1414 1415 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg) 1361 1416 { 1362 1417 #ifdef TCG_TARGET_HAS_neg_i64 1363 tcg_gen_op2 (INDEX_op_neg_i64, ret, arg);1364 #else 1365 TCGv t0 = tcg_const_i64(0);1418 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg); 1419 #else 1420 TCGv_i64 t0 = tcg_const_i64(0); 1366 1421 tcg_gen_sub_i64(ret, t0, arg); 1367 tcg_temp_free (t0);1368 #endif 1369 } 1370 1371 static inline void tcg_gen_not_i32(TCGv ret, TCGvarg)1422 tcg_temp_free_i64(t0); 1423 #endif 1424 } 1425 1426 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg) 1372 1427 { 1373 1428 tcg_gen_xori_i32(ret, arg, -1); 1374 1429 } 1375 1430 1376 static inline void tcg_gen_not_i64(TCGv ret, TCGvarg)1431 static inline void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg) 1377 1432 { 1378 1433 tcg_gen_xori_i64(ret, arg, -1); 1379 1434 } 1380 1435 1381 static inline void tcg_gen_discard_i32(TCGv arg)1382 { 1383 tcg_gen_op1 (INDEX_op_discard, arg);1436 static inline void tcg_gen_discard_i32(TCGv_i32 arg) 1437 { 1438 tcg_gen_op1_i32(INDEX_op_discard, arg); 1384 1439 } 1385 1440 1386 1441 #if TCG_TARGET_REG_BITS == 32 1387 static inline void tcg_gen_discard_i64(TCGv arg)1388 { 1389 tcg_gen_discard_i32( arg);1442 static inline void tcg_gen_discard_i64(TCGv_i64 arg) 1443 { 1444 tcg_gen_discard_i32(TCGV_LOW(arg)); 1390 1445 tcg_gen_discard_i32(TCGV_HIGH(arg)); 1391 1446 } 1392 1447 #else 1393 static inline void tcg_gen_discard_i64(TCGv arg)1394 { 1395 tcg_gen_op1 (INDEX_op_discard, arg);1396 } 1397 #endif 1398 1399 static inline void tcg_gen_concat_i32_i64(TCGv dest, TCGv low, TCGvhigh)1448 static inline void tcg_gen_discard_i64(TCGv_i64 arg) 1449 { 1450 tcg_gen_op1_i64(INDEX_op_discard, arg); 1451 } 1452 #endif 1453 1454 static inline void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high) 1400 1455 { 1401 1456 #if TCG_TARGET_REG_BITS == 32 1402 tcg_gen_mov_i32( dest, low);1457 tcg_gen_mov_i32(TCGV_LOW(dest), low); 1403 1458 tcg_gen_mov_i32(TCGV_HIGH(dest), high); 1404 1459 #else 1405 TCGv tmp = tcg_temp_new (TCG_TYPE_I64);1460 TCGv_i64 tmp = tcg_temp_new_i64(); 1406 1461 /* This extension is only needed for type correctness. 1407 1462 We may be able to do better given target specific information. */ … … 1410 1465 tcg_gen_extu_i32_i64(dest, low); 1411 1466 tcg_gen_or_i64(dest, dest, tmp); 1412 tcg_temp_free (tmp);1413 #endif 1414 } 1415 1416 static inline void tcg_gen_concat32_i64(TCGv dest, TCGv low, TCGvhigh)1467 tcg_temp_free_i64(tmp); 1468 #endif 1469 } 1470 1471 static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64 high) 1417 1472 { 1418 1473 #if TCG_TARGET_REG_BITS == 32 1419 tcg_gen_concat_i32_i64(dest, low, high);1420 #else 1421 TCGv tmp = tcg_temp_new(TCG_TYPE_I64);1474 tcg_gen_concat_i32_i64(dest, TCGV_LOW(low), TCGV_LOW(high)); 1475 #else 1476 TCGv_i64 tmp = tcg_temp_new_i64(); 1422 1477 tcg_gen_ext32u_i64(dest, low); 1423 1478 tcg_gen_shli_i64(tmp, high, 32); 1424 1479 tcg_gen_or_i64(dest, dest, tmp); 1425 tcg_temp_free(tmp); 1426 #endif 1480 tcg_temp_free_i64(tmp); 1481 #endif 1482 } 1483 1484 static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1485 { 1486 TCGv_i32 t0; 1487 t0 = tcg_temp_new_i32(); 1488 tcg_gen_not_i32(t0, arg2); 1489 tcg_gen_and_i32(ret, arg1, t0); 1490 tcg_temp_free_i32(t0); 1491 } 1492 1493 static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1494 { 1495 TCGv_i64 t0; 1496 t0 = tcg_temp_new_i64(); 1497 tcg_gen_not_i64(t0, arg2); 1498 tcg_gen_and_i64(ret, arg1, t0); 1499 tcg_temp_free_i64(t0); 1500 } 1501 1502 static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1503 { 1504 TCGv_i32 t0; 1505 t0 = tcg_temp_new_i32(); 1506 tcg_gen_xor_i32(t0, arg1, arg2); 1507 tcg_gen_not_i32(ret, t0); 1508 tcg_temp_free_i32(t0); 1509 } 1510 1511 static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1512 { 1513 TCGv_i64 t0; 1514 t0 = tcg_temp_new_i64(); 1515 tcg_gen_xor_i64(t0, arg1, arg2); 1516 tcg_gen_not_i64(ret, t0); 1517 tcg_temp_free_i64(t0); 1518 } 1519 1520 static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1521 { 1522 TCGv_i32 t0; 1523 t0 = tcg_temp_new_i32(); 1524 tcg_gen_and_i32(t0, arg1, arg2); 1525 tcg_gen_not_i32(ret, t0); 1526 tcg_temp_free_i32(t0); 1527 } 1528 1529 static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1530 { 1531 TCGv_i64 t0; 1532 t0 = tcg_temp_new_i64(); 1533 tcg_gen_and_i64(t0, arg1, arg2); 1534 tcg_gen_not_i64(ret, t0); 1535 tcg_temp_free_i64(t0); 1536 } 1537 1538 static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1539 { 1540 TCGv_i32 t0; 1541 t0 = tcg_temp_new_i32(); 1542 tcg_gen_or_i32(t0, arg1, arg2); 1543 tcg_gen_not_i32(ret, t0); 1544 tcg_temp_free_i32(t0); 1545 } 1546 1547 static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1548 { 1549 TCGv_i64 t0; 1550 t0 = tcg_temp_new_i64(); 1551 tcg_gen_or_i64(t0, arg1, arg2); 1552 tcg_gen_not_i64(ret, t0); 1553 tcg_temp_free_i64(t0); 1554 } 1555 1556 static inline void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1557 { 1558 TCGv_i32 t0; 1559 t0 = tcg_temp_new_i32(); 1560 tcg_gen_not_i32(t0, arg2); 1561 tcg_gen_or_i32(ret, arg1, t0); 1562 tcg_temp_free_i32(t0); 1563 } 1564 1565 static inline void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1566 { 1567 TCGv_i64 t0; 1568 t0 = tcg_temp_new_i64(); 1569 tcg_gen_not_i64(t0, arg2); 1570 tcg_gen_or_i64(ret, arg1, t0); 1571 tcg_temp_free_i64(t0); 1572 } 1573 1574 static inline void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1575 { 1576 TCGv_i32 t0, t1; 1577 1578 t0 = tcg_temp_new_i32(); 1579 t1 = tcg_temp_new_i32(); 1580 tcg_gen_shl_i32(t0, arg1, arg2); 1581 tcg_gen_subfi_i32(t1, 32, arg2); 1582 tcg_gen_shr_i32(t1, arg1, t1); 1583 tcg_gen_or_i32(ret, t0, t1); 1584 tcg_temp_free_i32(t0); 1585 tcg_temp_free_i32(t1); 1586 } 1587 1588 static inline void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1589 { 1590 TCGv_i64 t0, t1; 1591 1592 t0 = tcg_temp_new_i64(); 1593 t1 = tcg_temp_new_i64(); 1594 tcg_gen_shl_i64(t0, arg1, arg2); 1595 tcg_gen_subfi_i64(t1, 64, arg2); 1596 tcg_gen_shr_i64(t1, arg1, t1); 1597 tcg_gen_or_i64(ret, t0, t1); 1598 tcg_temp_free_i64(t0); 1599 tcg_temp_free_i64(t1); 1600 } 1601 1602 static inline void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 1603 { 1604 /* some cases can be optimized here */ 1605 if (arg2 == 0) { 1606 tcg_gen_mov_i32(ret, arg1); 1607 } else { 1608 TCGv_i32 t0, t1; 1609 t0 = tcg_temp_new_i32(); 1610 t1 = tcg_temp_new_i32(); 1611 tcg_gen_shli_i32(t0, arg1, arg2); 1612 tcg_gen_shri_i32(t1, arg1, 32 - arg2); 1613 tcg_gen_or_i32(ret, t0, t1); 1614 tcg_temp_free_i32(t0); 1615 tcg_temp_free_i32(t1); 1616 } 1617 } 1618 1619 static inline void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 1620 { 1621 /* some cases can be optimized here */ 1622 if (arg2 == 0) { 1623 tcg_gen_mov_i64(ret, arg1); 1624 } else { 1625 TCGv_i64 t0, t1; 1626 t0 = tcg_temp_new_i64(); 1627 t1 = tcg_temp_new_i64(); 1628 tcg_gen_shli_i64(t0, arg1, arg2); 1629 tcg_gen_shri_i64(t1, arg1, 64 - arg2); 1630 tcg_gen_or_i64(ret, t0, t1); 1631 tcg_temp_free_i64(t0); 1632 tcg_temp_free_i64(t1); 1633 } 1634 } 1635 1636 static inline void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 1637 { 1638 TCGv_i32 t0, t1; 1639 1640 t0 = tcg_temp_new_i32(); 1641 t1 = tcg_temp_new_i32(); 1642 tcg_gen_shr_i32(t0, arg1, arg2); 1643 tcg_gen_subfi_i32(t1, 32, arg2); 1644 tcg_gen_shl_i32(t1, arg1, t1); 1645 tcg_gen_or_i32(ret, t0, t1); 1646 tcg_temp_free_i32(t0); 1647 tcg_temp_free_i32(t1); 1648 } 1649 1650 static inline void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 1651 { 1652 TCGv_i64 t0, t1; 1653 1654 t0 = tcg_temp_new_i64(); 1655 t1 = tcg_temp_new_i64(); 1656 tcg_gen_shl_i64(t0, arg1, arg2); 1657 tcg_gen_subfi_i64(t1, 64, arg2); 1658 tcg_gen_shl_i64(t1, arg1, t1); 1659 tcg_gen_or_i64(ret, t0, t1); 1660 tcg_temp_free_i64(t0); 1661 tcg_temp_free_i64(t1); 1662 } 1663 1664 static inline void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) 1665 { 1666 /* some cases can be optimized here */ 1667 if (arg2 == 0) { 1668 tcg_gen_mov_i32(ret, arg1); 1669 } else { 1670 tcg_gen_rotli_i32(ret, arg1, 32 - arg2); 1671 } 1672 } 1673 1674 static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) 1675 { 1676 /* some cases can be optimized here */ 1677 if (arg2 == 0) { 1678 tcg_gen_mov_i64(ret, arg1); 1679 } else { 1680 tcg_gen_rotli_i64(ret, arg1, 64 - arg2); 1681 } 1427 1682 } 1428 1683 … … 1434 1689 #endif 1435 1690 1691 #if TARGET_LONG_BITS == 32 1692 #define TCGv TCGv_i32 1693 #define tcg_temp_new() tcg_temp_new_i32() 1694 #define tcg_global_reg_new tcg_global_reg_new_i32 1695 #define tcg_global_mem_new tcg_global_mem_new_i32 1696 #define tcg_temp_local_new() tcg_temp_local_new_i32() 1697 #define tcg_temp_free tcg_temp_free_i32 1698 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32 1699 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32 1700 #define TCGV_UNUSED(x) TCGV_UNUSED_I32(x) 1701 #define TCGV_EQUAL(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b)) 1702 #else 1703 #define TCGv TCGv_i64 1704 #define tcg_temp_new() tcg_temp_new_i64() 1705 #define tcg_global_reg_new tcg_global_reg_new_i64 1706 #define tcg_global_mem_new tcg_global_mem_new_i64 1707 #define tcg_temp_local_new() tcg_temp_local_new_i64() 1708 #define tcg_temp_free tcg_temp_free_i64 1709 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64 1710 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64 1711 #define TCGV_UNUSED(x) TCGV_UNUSED_I64(x) 1712 #define TCGV_EQUAL(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b)) 1713 #endif 1714 1436 1715 /* debug info: write the PC of the corresponding QEMU CPU instruction */ 1437 1716 static inline void tcg_gen_debug_insn_start(uint64_t pc) … … 1460 1739 { 1461 1740 #if TARGET_LONG_BITS == 32 1462 tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); 1463 #else 1464 tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); 1741 tcg_gen_op3i_i32(INDEX_op_qemu_ld8u, ret, addr, mem_index); 1742 #else 1743 tcg_gen_op4i_i32(INDEX_op_qemu_ld8u, TCGV_LOW(ret), TCGV_LOW(addr), 1744 TCGV_HIGH(addr), mem_index); 1465 1745 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 1466 1746 #endif … … 1470 1750 { 1471 1751 #if TARGET_LONG_BITS == 32 1472 tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); 1473 #else 1474 tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); 1475 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); 1752 tcg_gen_op3i_i32(INDEX_op_qemu_ld8s, ret, addr, mem_index); 1753 #else 1754 tcg_gen_op4i_i32(INDEX_op_qemu_ld8s, TCGV_LOW(ret), TCGV_LOW(addr), 1755 TCGV_HIGH(addr), mem_index); 1756 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 1476 1757 #endif 1477 1758 } … … 1480 1761 { 1481 1762 #if TARGET_LONG_BITS == 32 1482 tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); 1483 #else 1484 tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); 1763 tcg_gen_op3i_i32(INDEX_op_qemu_ld16u, ret, addr, mem_index); 1764 #else 1765 tcg_gen_op4i_i32(INDEX_op_qemu_ld16u, TCGV_LOW(ret), TCGV_LOW(addr), 1766 TCGV_HIGH(addr), mem_index); 1485 1767 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 1486 1768 #endif … … 1490 1772 { 1491 1773 #if TARGET_LONG_BITS == 32 1492 tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); 1493 #else 1494 tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); 1495 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); 1774 tcg_gen_op3i_i32(INDEX_op_qemu_ld16s, ret, addr, mem_index); 1775 #else 1776 tcg_gen_op4i_i32(INDEX_op_qemu_ld16s, TCGV_LOW(ret), TCGV_LOW(addr), 1777 TCGV_HIGH(addr), mem_index); 1778 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 1496 1779 #endif 1497 1780 } … … 1500 1783 { 1501 1784 #if TARGET_LONG_BITS == 32 1502 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); 1503 #else 1504 tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); 1785 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index); 1786 #else 1787 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr), 1788 TCGV_HIGH(addr), mem_index); 1505 1789 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 1506 1790 #endif … … 1510 1794 { 1511 1795 #if TARGET_LONG_BITS == 32 1512 tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); 1513 #else 1514 tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); 1515 tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); 1516 #endif 1517 } 1518 1519 static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) 1796 tcg_gen_op3i_i32(INDEX_op_qemu_ld32u, ret, addr, mem_index); 1797 #else 1798 tcg_gen_op4i_i32(INDEX_op_qemu_ld32u, TCGV_LOW(ret), TCGV_LOW(addr), 1799 TCGV_HIGH(addr), mem_index); 1800 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); 1801 #endif 1802 } 1803 1804 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index) 1520 1805 { 1521 1806 #if TARGET_LONG_BITS == 32 1522 tcg_gen_op4i (INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index);1523 #else 1524 tcg_gen_op5i (INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret),1525 addr, TCGV_HIGH(addr), mem_index);1807 tcg_gen_op4i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret), addr, mem_index); 1808 #else 1809 tcg_gen_op5i_i32(INDEX_op_qemu_ld64, TCGV_LOW(ret), TCGV_HIGH(ret), 1810 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index); 1526 1811 #endif 1527 1812 } … … 1530 1815 { 1531 1816 #if TARGET_LONG_BITS == 32 1532 tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); 1533 #else 1534 tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); 1817 tcg_gen_op3i_i32(INDEX_op_qemu_st8, arg, addr, mem_index); 1818 #else 1819 tcg_gen_op4i_i32(INDEX_op_qemu_st8, TCGV_LOW(arg), TCGV_LOW(addr), 1820 TCGV_HIGH(addr), mem_index); 1535 1821 #endif 1536 1822 } … … 1539 1825 { 1540 1826 #if TARGET_LONG_BITS == 32 1541 tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); 1542 #else 1543 tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); 1827 tcg_gen_op3i_i32(INDEX_op_qemu_st16, arg, addr, mem_index); 1828 #else 1829 tcg_gen_op4i_i32(INDEX_op_qemu_st16, TCGV_LOW(arg), TCGV_LOW(addr), 1830 TCGV_HIGH(addr), mem_index); 1544 1831 #endif 1545 1832 } … … 1548 1835 { 1549 1836 #if TARGET_LONG_BITS == 32 1550 tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); 1551 #else 1552 tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); 1553 #endif 1554 } 1555 1556 static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) 1837 tcg_gen_op3i_i32(INDEX_op_qemu_st32, arg, addr, mem_index); 1838 #else 1839 tcg_gen_op4i_i32(INDEX_op_qemu_st32, TCGV_LOW(arg), TCGV_LOW(addr), 1840 TCGV_HIGH(addr), mem_index); 1841 #endif 1842 } 1843 1844 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index) 1557 1845 { 1558 1846 #if TARGET_LONG_BITS == 32 1559 tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); 1560 #else 1561 tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), 1562 addr, TCGV_HIGH(addr), mem_index); 1847 tcg_gen_op4i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg), addr, 1848 mem_index); 1849 #else 1850 tcg_gen_op5i_i32(INDEX_op_qemu_st64, TCGV_LOW(arg), TCGV_HIGH(arg), 1851 TCGV_LOW(addr), TCGV_HIGH(addr), mem_index); 1563 1852 #endif 1564 1853 } … … 1571 1860 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) 1572 1861 { 1573 tcg_gen_ op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index);1862 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8u, ret, addr, mem_index); 1574 1863 } 1575 1864 1576 1865 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) 1577 1866 { 1578 tcg_gen_ op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index);1867 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld8s, ret, addr, mem_index); 1579 1868 } 1580 1869 1581 1870 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) 1582 1871 { 1583 tcg_gen_ op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index);1872 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16u, ret, addr, mem_index); 1584 1873 } 1585 1874 1586 1875 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) 1587 1876 { 1588 tcg_gen_ op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index);1877 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld16s, ret, addr, mem_index); 1589 1878 } 1590 1879 1591 1880 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) 1592 1881 { 1593 tcg_gen_ op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index);1882 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index); 1594 1883 } 1595 1884 1596 1885 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) 1597 1886 { 1598 tcg_gen_ op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index);1599 } 1600 1601 static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index)1602 { 1603 tcg_gen_ op3i(INDEX_op_qemu_ld64, ret, addr, mem_index);1887 tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index); 1888 } 1889 1890 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index) 1891 { 1892 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_ld64, ret, addr, mem_index); 1604 1893 } 1605 1894 1606 1895 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) 1607 1896 { 1608 tcg_gen_ op3i(INDEX_op_qemu_st8, arg, addr, mem_index);1897 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st8, arg, addr, mem_index); 1609 1898 } 1610 1899 1611 1900 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) 1612 1901 { 1613 tcg_gen_ op3i(INDEX_op_qemu_st16, arg, addr, mem_index);1902 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st16, arg, addr, mem_index); 1614 1903 } 1615 1904 1616 1905 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) 1617 1906 { 1618 tcg_gen_ op3i(INDEX_op_qemu_st32, arg, addr, mem_index);1619 } 1620 1621 static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)1622 { 1623 tcg_gen_ op3i(INDEX_op_qemu_st64, arg, addr, mem_index);1907 tcg_gen_qemu_ldst_op(INDEX_op_qemu_st32, arg, addr, mem_index); 1908 } 1909 1910 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index) 1911 { 1912 tcg_gen_qemu_ldst_op_i64(INDEX_op_qemu_st64, arg, addr, mem_index); 1624 1913 } 1625 1914 … … 1648 1937 #define tcg_gen_sub_tl tcg_gen_sub_i64 1649 1938 #define tcg_gen_neg_tl tcg_gen_neg_i64 1939 #define tcg_gen_subfi_tl tcg_gen_subfi_i64 1650 1940 #define tcg_gen_subi_tl tcg_gen_subi_i64 1651 1941 #define tcg_gen_and_tl tcg_gen_and_i64 … … 1680 1970 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64 1681 1971 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64 1972 #define tcg_gen_andc_tl tcg_gen_andc_i64 1973 #define tcg_gen_eqv_tl tcg_gen_eqv_i64 1974 #define tcg_gen_nand_tl tcg_gen_nand_i64 1975 #define tcg_gen_nor_tl tcg_gen_nor_i64 1976 #define tcg_gen_orc_tl tcg_gen_orc_i64 1977 #define tcg_gen_rotl_tl tcg_gen_rotl_i64 1978 #define tcg_gen_rotli_tl tcg_gen_rotli_i64 1979 #define tcg_gen_rotr_tl tcg_gen_rotr_i64 1980 #define tcg_gen_rotri_tl tcg_gen_rotri_i64 1682 1981 #define tcg_const_tl tcg_const_i64 1982 #define tcg_const_local_tl tcg_const_local_i64 1683 1983 #else 1684 1984 #define TCG_TYPE_TL TCG_TYPE_I32 … … 1700 2000 #define tcg_gen_sub_tl tcg_gen_sub_i32 1701 2001 #define tcg_gen_neg_tl tcg_gen_neg_i32 2002 #define tcg_gen_subfi_tl tcg_gen_subfi_i32 1702 2003 #define tcg_gen_subi_tl tcg_gen_subi_i32 1703 2004 #define tcg_gen_and_tl tcg_gen_and_i32 … … 1732 2033 #define tcg_gen_ext32s_tl tcg_gen_mov_i32 1733 2034 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64 2035 #define tcg_gen_andc_tl tcg_gen_andc_i32 2036 #define tcg_gen_eqv_tl tcg_gen_eqv_i32 2037 #define tcg_gen_nand_tl tcg_gen_nand_i32 2038 #define tcg_gen_nor_tl tcg_gen_nor_i32 2039 #define tcg_gen_orc_tl tcg_gen_orc_i32 2040 #define tcg_gen_rotl_tl tcg_gen_rotl_i32 2041 #define tcg_gen_rotli_tl tcg_gen_rotli_i32 2042 #define tcg_gen_rotr_tl tcg_gen_rotr_i32 2043 #define tcg_gen_rotri_tl tcg_gen_rotri_i32 1734 2044 #define tcg_const_tl tcg_const_i32 2045 #define tcg_const_local_tl tcg_const_local_i32 1735 2046 #endif 1736 2047 … … 1744 2055 #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64 1745 2056 #endif /* TCG_TARGET_REG_BITS != 32 */ 1746 -
trunk/src/recompiler/tcg/tcg-opc.h ¶
r29520 r36170 22 22 * THE SOFTWARE. 23 23 */ 24 25 #ifdef CONFIG_DYNGEN_OP26 #include "dyngen-opc.h"27 #endif28 29 24 #ifndef DEF2 30 25 #define DEF2(name, oargs, iargs, cargs, flags) DEF(name, oargs + iargs + cargs, 0) -
trunk/src/recompiler/tcg/tcg-runtime.c ¶
r36140 r36170 22 22 * THE SOFTWARE. 23 23 */ 24 25 24 #include <stdarg.h> 26 25 #include <stdlib.h> … … 31 30 #include "config.h" 32 31 #include "osdep.h" 32 #include "cpu.h" // For TARGET_LONG_BITS 33 33 #include "tcg.h" 34 34 … … 67 67 return arg1 % arg2; 68 68 } 69 -
trunk/src/recompiler/tcg/tcg.c ¶
r36140 r36170 43 43 #include <malloc.h> 44 44 #endif 45 #ifdef _AIX 46 #include <alloca.h> 47 #endif 45 48 46 49 #include "config.h" 47 50 #include "qemu-common.h" 51 #include "cache-utils.h" 48 52 49 53 /* Note: the long term plan is to reduce the dependancies on the QEMU … … 73 77 tcg_target_long value, tcg_target_long addend); 74 78 75 TCGOpDef tcg_op_defs[] = {79 static TCGOpDef tcg_op_defs[] = { 76 80 #define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size }, 77 81 #ifndef VBOX … … 85 89 }; 86 90 87 TCGRegSet tcg_target_available_regs[2];88 TCGRegSet tcg_target_call_clobber_regs;91 static TCGRegSet tcg_target_available_regs[2]; 92 static TCGRegSet tcg_target_call_clobber_regs; 89 93 90 94 /* XXX: move that inside the context */ … … 289 293 } 290 294 291 TCGv tcg_global_reg_new(TCGType type, int reg, const char *name) 295 static inline int tcg_global_reg_new_internal(TCGType type, int reg, 296 const char *name) 292 297 { 293 298 TCGContext *s = &tcg_ctx; … … 311 316 s->nb_globals++; 312 317 tcg_regset_set_reg(s->reserved_regs, reg); 313 return MAKE_TCGV(idx); 314 } 315 316 #if TCG_TARGET_REG_BITS == 32 317 /* temporary hack to avoid register shortage for tcg_qemu_st64() */ 318 TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2, 319 const char *name) 320 { 321 TCGContext *s = &tcg_ctx; 322 TCGTemp *ts; 318 return idx; 319 } 320 321 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) 322 { 323 323 int idx; 324 char buf[64]; 325 326 if (type != TCG_TYPE_I64) 327 tcg_abort(); 328 idx = s->nb_globals; 329 tcg_temp_alloc(s, s->nb_globals + 2); 330 ts = &s->temps[s->nb_globals]; 331 ts->base_type = type; 332 ts->type = TCG_TYPE_I32; 333 ts->fixed_reg = 1; 334 ts->reg = reg1; 335 pstrcpy(buf, sizeof(buf), name); 336 pstrcat(buf, sizeof(buf), "_0"); 337 ts->name = strdup(buf); 338 339 ts++; 340 ts->base_type = type; 341 ts->type = TCG_TYPE_I32; 342 ts->fixed_reg = 1; 343 ts->reg = reg2; 344 pstrcpy(buf, sizeof(buf), name); 345 pstrcat(buf, sizeof(buf), "_1"); 346 ts->name = strdup(buf); 347 348 s->nb_globals += 2; 349 return MAKE_TCGV(idx); 350 } 351 #endif 352 353 TCGv tcg_global_mem_new(TCGType type, int reg, tcg_target_long offset, 354 const char *name) 324 325 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); 326 return MAKE_TCGV_I32(idx); 327 } 328 329 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) 330 { 331 int idx; 332 333 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); 334 return MAKE_TCGV_I64(idx); 335 } 336 337 static inline int tcg_global_mem_new_internal(TCGType type, int reg, 338 tcg_target_long offset, 339 const char *name) 355 340 { 356 341 TCGContext *s = &tcg_ctx; … … 408 393 s->nb_globals++; 409 394 } 410 return MAKE_TCGV(idx); 411 } 412 413 TCGv tcg_temp_new_internal(TCGType type, int temp_local) 395 return idx; 396 } 397 398 TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset, 399 const char *name) 400 { 401 int idx; 402 403 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); 404 return MAKE_TCGV_I32(idx); 405 } 406 407 TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset, 408 const char *name) 409 { 410 int idx; 411 412 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); 413 return MAKE_TCGV_I64(idx); 414 } 415 416 static inline int tcg_temp_new_internal(TCGType type, int temp_local) 414 417 { 415 418 TCGContext *s = &tcg_ctx; … … 459 462 } 460 463 } 461 return MAKE_TCGV(idx); 462 } 463 464 void tcg_temp_free(TCGv arg) 464 return idx; 465 } 466 467 TCGv_i32 tcg_temp_new_internal_i32(int temp_local) 468 { 469 int idx; 470 471 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); 472 return MAKE_TCGV_I32(idx); 473 } 474 475 TCGv_i64 tcg_temp_new_internal_i64(int temp_local) 476 { 477 int idx; 478 479 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); 480 return MAKE_TCGV_I64(idx); 481 } 482 483 static inline void tcg_temp_free_internal(int idx) 465 484 { 466 485 TCGContext *s = &tcg_ctx; 467 486 TCGTemp *ts; 468 int idx = GET_TCGV(arg);469 487 int k; 470 488 … … 480 498 } 481 499 482 483 TCGv tcg_const_i32(int32_t val) 484 { 485 TCGv t0; 486 t0 = tcg_temp_new(TCG_TYPE_I32); 500 void tcg_temp_free_i32(TCGv_i32 arg) 501 { 502 tcg_temp_free_internal(GET_TCGV_I32(arg)); 503 } 504 505 void tcg_temp_free_i64(TCGv_i64 arg) 506 { 507 tcg_temp_free_internal(GET_TCGV_I64(arg)); 508 } 509 510 TCGv_i32 tcg_const_i32(int32_t val) 511 { 512 TCGv_i32 t0; 513 t0 = tcg_temp_new_i32(); 487 514 tcg_gen_movi_i32(t0, val); 488 515 return t0; 489 516 } 490 517 491 TCGv tcg_const_i64(int64_t val) 492 { 493 TCGv t0; 494 t0 = tcg_temp_new(TCG_TYPE_I64); 518 TCGv_i64 tcg_const_i64(int64_t val) 519 { 520 TCGv_i64 t0; 521 t0 = tcg_temp_new_i64(); 522 tcg_gen_movi_i64(t0, val); 523 return t0; 524 } 525 526 TCGv_i32 tcg_const_local_i32(int32_t val) 527 { 528 TCGv_i32 t0; 529 t0 = tcg_temp_local_new_i32(); 530 tcg_gen_movi_i32(t0, val); 531 return t0; 532 } 533 534 TCGv_i64 tcg_const_local_i64(int64_t val) 535 { 536 TCGv_i64 t0; 537 t0 = tcg_temp_local_new_i64(); 495 538 tcg_gen_movi_i64(t0, val); 496 539 return t0; … … 520 563 } 521 564 522 static inline TCGType tcg_get_base_type(TCGContext *s, TCGv arg)523 {524 return s->temps[GET_TCGV(arg)].base_type;525 }526 527 static void tcg_gen_call_internal(TCGContext *s, TCGv func,528 unsigned int flags,529 unsigned int nb_rets, const TCGv *rets,530 unsigned int nb_params, const TCGv *params)531 {532 #ifndef VBOX533 int i;534 #else535 unsigned int i;536 #endif537 *gen_opc_ptr++ = INDEX_op_call;538 *gen_opparam_ptr++ = (nb_rets << 16) | (nb_params + 1);539 for(i = 0; i < nb_rets; i++) {540 *gen_opparam_ptr++ = GET_TCGV(rets[i]);541 }542 for(i = 0; i < nb_params; i++) {543 *gen_opparam_ptr++ = GET_TCGV(params[i]);544 }545 *gen_opparam_ptr++ = GET_TCGV(func);546 547 *gen_opparam_ptr++ = flags;548 /* total parameters, needed to go backward in the instruction stream */549 *gen_opparam_ptr++ = 1 + nb_rets + nb_params + 3;550 }551 552 553 #if TCG_TARGET_REG_BITS < 64554 565 /* Note: we convert the 64 bit args to 32 bit and do some alignment 555 566 and endian swap. Maybe it would be better to do the alignment 556 567 and endian swap in tcg_reg_alloc_call(). */ 557 void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags, 558 unsigned int nb_rets, const TCGv *rets, 559 unsigned int nb_params, const TCGv *args1) 560 { 561 TCGv ret, *args2, rets_2[2], arg; 562 int j, i, call_type; 563 564 if (nb_rets == 1) { 565 ret = rets[0]; 566 if (tcg_get_base_type(s, ret) == TCG_TYPE_I64) { 568 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, 569 int sizemask, TCGArg ret, int nargs, TCGArg *args) 570 { 571 int call_type; 572 int i; 573 int real_args; 574 int nb_rets; 575 TCGArg *nparam; 576 *gen_opc_ptr++ = INDEX_op_call; 577 nparam = gen_opparam_ptr++; 578 call_type = (flags & TCG_CALL_TYPE_MASK); 579 if (ret != TCG_CALL_DUMMY_ARG) { 580 #if TCG_TARGET_REG_BITS < 64 581 if (sizemask & 1) { 582 #ifdef TCG_TARGET_WORDS_BIGENDIAN 583 *gen_opparam_ptr++ = ret + 1; 584 *gen_opparam_ptr++ = ret; 585 #else 586 *gen_opparam_ptr++ = ret; 587 *gen_opparam_ptr++ = ret + 1; 588 #endif 567 589 nb_rets = 2; 568 #ifdef TCG_TARGET_WORDS_BIGENDIAN 569 rets_2[0] = TCGV_HIGH(ret); 570 rets_2[1] = ret; 571 #else 572 rets_2[0] = ret; 573 rets_2[1] = TCGV_HIGH(ret); 574 #endif 575 rets = rets_2; 576 } 577 } 578 args2 = alloca((nb_params * 3) * sizeof(TCGv)); 579 j = 0; 580 call_type = (flags & TCG_CALL_TYPE_MASK); 581 for(i = 0; i < nb_params; i++) { 582 arg = args1[i]; 583 if (tcg_get_base_type(s, arg) == TCG_TYPE_I64) { 590 } else 591 #endif 592 { 593 *gen_opparam_ptr++ = ret; 594 nb_rets = 1; 595 } 596 } else { 597 nb_rets = 0; 598 } 599 real_args = 0; 600 for (i = 0; i < nargs; i++) { 601 #if TCG_TARGET_REG_BITS < 64 602 if (sizemask & (2 << i)) { 584 603 #ifdef TCG_TARGET_I386 585 604 /* REGPARM case: if the third parameter is 64 bit, it is 586 605 allocated on the stack */ 587 if ( j== 2 && call_type == TCG_CALL_TYPE_REGPARM) {606 if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) { 588 607 call_type = TCG_CALL_TYPE_REGPARM_2; 589 608 flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type; 590 609 } 591 args2[j++] = arg; 592 args2[j++] = TCGV_HIGH(arg); 593 #else 610 #endif 594 611 #ifdef TCG_TARGET_CALL_ALIGN_ARGS 595 612 /* some targets want aligned 64 bit args */ 596 if (j & 1) { 597 args2[j++] = TCG_CALL_DUMMY_ARG; 613 if (real_args & 1) { 614 *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG; 615 real_args++; 598 616 } 599 617 #endif 600 618 #ifdef TCG_TARGET_WORDS_BIGENDIAN 601 args2[j++] = TCGV_HIGH(arg);602 args2[j++] = arg;619 *gen_opparam_ptr++ = args[i] + 1; 620 *gen_opparam_ptr++ = args[i]; 603 621 #else 604 args2[j++] = arg;605 args2[j++] = TCGV_HIGH(arg);606 #endif 607 #endif 608 } else {609 args2[j++] = arg; 610 }611 }612 tcg_gen_call_internal(s, func, flags,613 nb_rets, rets, j, args2);614 }615 #else 616 void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags, 617 unsigned int nb_rets, const TCGv *rets,618 unsigned int nb_params, const TCGv *args1) 619 { 620 tcg_gen_call_internal(s, func, flags, 621 nb_rets, rets, nb_params, args1);622 } 623 #endif 622 *gen_opparam_ptr++ = args[i]; 623 *gen_opparam_ptr++ = args[i] + 1; 624 #endif 625 real_args += 2; 626 } else 627 #endif 628 { 629 *gen_opparam_ptr++ = args[i]; 630 real_args++; 631 } 632 } 633 *gen_opparam_ptr++ = GET_TCGV_PTR(func); 634 635 *gen_opparam_ptr++ = flags; 636 637 *nparam = (nb_rets << 16) | (real_args + 1); 638 639 /* total parameters, needed to go backward in the instruction stream */ 640 *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3; 641 } 624 642 625 643 #if TCG_TARGET_REG_BITS == 32 626 void tcg_gen_shifti_i64(TCGv ret, TCGvarg1,644 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, 627 645 int c, int right, int arith) 628 646 { 629 647 if (c == 0) { 630 tcg_gen_mov_i32( ret, arg1);648 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1)); 631 649 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1)); 632 650 } else if (c >= 32) { … … 634 652 if (right) { 635 653 if (arith) { 636 tcg_gen_sari_i32( ret, TCGV_HIGH(arg1), c);654 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); 637 655 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31); 638 656 } else { 639 tcg_gen_shri_i32( ret, TCGV_HIGH(arg1), c);657 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); 640 658 tcg_gen_movi_i32(TCGV_HIGH(ret), 0); 641 659 } 642 660 } else { 643 tcg_gen_shli_i32(TCGV_HIGH(ret), arg1, c);644 tcg_gen_movi_i32( ret, 0);661 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c); 662 tcg_gen_movi_i32(TCGV_LOW(ret), 0); 645 663 } 646 664 } else { 647 TCGv t0, t1;648 649 t0 = tcg_temp_new (TCG_TYPE_I32);650 t1 = tcg_temp_new (TCG_TYPE_I32);665 TCGv_i32 t0, t1; 666 667 t0 = tcg_temp_new_i32(); 668 t1 = tcg_temp_new_i32(); 651 669 if (right) { 652 670 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c); … … 655 673 else 656 674 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c); 657 tcg_gen_shri_i32( ret, arg1, c);658 tcg_gen_or_i32( ret, ret, t0);675 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); 676 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0); 659 677 tcg_gen_mov_i32(TCGV_HIGH(ret), t1); 660 678 } else { 661 tcg_gen_shri_i32(t0, arg1, 32 - c);679 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); 662 680 /* Note: ret can be the same as arg1, so we use t1 */ 663 tcg_gen_shli_i32(t1, arg1, c);681 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c); 664 682 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); 665 683 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0); 666 tcg_gen_mov_i32( ret, t1);667 } 668 tcg_temp_free (t0);669 tcg_temp_free (t1);684 tcg_gen_mov_i32(TCGV_LOW(ret), t1); 685 } 686 tcg_temp_free_i32(t0); 687 tcg_temp_free_i32(t1); 670 688 } 671 689 } … … 712 730 } 713 731 714 char *tcg_get_arg_str(TCGContext *s, char *buf, int buf_size, TCGv arg) 715 { 716 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV(arg)); 732 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) 733 { 734 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); 735 } 736 737 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) 738 { 739 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); 717 740 } 718 741 … … 857 880 th = tcg_find_helper(s, val); 858 881 if (th) { 859 fprintf(outfile, th->name);882 fprintf(outfile, "%s", th->name); 860 883 } else { 861 884 if (c == INDEX_op_movi_i32) … … 1174 1197 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ 1175 1198 default: 1176 if (op > INDEX_op_end) { 1177 args -= def->nb_args; 1178 nb_iargs = def->nb_iargs; 1179 nb_oargs = def->nb_oargs; 1180 1181 /* Test if the operation can be removed because all 1182 its outputs are dead. We assume that nb_oargs == 0 1183 implies side effects */ 1184 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1185 for(i = 0; i < nb_oargs; i++) { 1186 arg = args[i]; 1187 if (!dead_temps[arg]) 1188 goto do_not_remove; 1199 args -= def->nb_args; 1200 nb_iargs = def->nb_iargs; 1201 nb_oargs = def->nb_oargs; 1202 1203 /* Test if the operation can be removed because all 1204 its outputs are dead. We assume that nb_oargs == 0 1205 implies side effects */ 1206 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { 1207 for(i = 0; i < nb_oargs; i++) { 1208 arg = args[i]; 1209 if (!dead_temps[arg]) 1210 goto do_not_remove; 1211 } 1212 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args); 1213 #ifdef CONFIG_PROFILER 1214 s->del_op_count++; 1215 #endif 1216 } else { 1217 do_not_remove: 1218 1219 /* output args are dead */ 1220 for(i = 0; i < nb_oargs; i++) { 1221 arg = args[i]; 1222 dead_temps[arg] = 1; 1223 } 1224 1225 /* if end of basic block, update */ 1226 if (def->flags & TCG_OPF_BB_END) { 1227 tcg_la_bb_end(s, dead_temps); 1228 } else if (def->flags & TCG_OPF_CALL_CLOBBER) { 1229 /* globals are live */ 1230 memset(dead_temps, 0, s->nb_globals); 1231 } 1232 1233 /* input args are live */ 1234 dead_iargs = 0; 1235 for(i = 0; i < nb_iargs; i++) { 1236 arg = args[i + nb_oargs]; 1237 if (dead_temps[arg]) { 1238 dead_iargs |= (1 << i); 1189 1239 } 1190 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args); 1191 #ifdef CONFIG_PROFILER 1192 s->del_op_count++; 1193 #endif 1194 } else { 1195 do_not_remove: 1196 1197 /* output args are dead */ 1198 for(i = 0; i < nb_oargs; i++) { 1199 arg = args[i]; 1200 dead_temps[arg] = 1; 1201 } 1202 1203 /* if end of basic block, update */ 1204 if (def->flags & TCG_OPF_BB_END) { 1205 tcg_la_bb_end(s, dead_temps); 1206 } else if (def->flags & TCG_OPF_CALL_CLOBBER) { 1207 /* globals are live */ 1208 memset(dead_temps, 0, s->nb_globals); 1209 } 1210 1211 /* input args are live */ 1212 dead_iargs = 0; 1213 for(i = 0; i < nb_iargs; i++) { 1214 arg = args[i + nb_oargs]; 1215 if (dead_temps[arg]) { 1216 dead_iargs |= (1 << i); 1217 } 1218 dead_temps[arg] = 0; 1219 } 1220 s->op_dead_iargs[op_index] = dead_iargs; 1240 dead_temps[arg] = 0; 1221 1241 } 1222 } else { 1223 /* legacy dyngen operations */ 1224 args -= def->nb_args; 1225 /* mark end of basic block */ 1226 tcg_la_bb_end(s, dead_temps); 1242 s->op_dead_iargs[op_index] = dead_iargs; 1227 1243 } 1228 1244 break; … … 1877 1893 #ifdef CONFIG_PROFILER 1878 1894 1879 static int64_t dyngen_table_op_count[NB_OPS];1895 static int64_t tcg_table_op_count[NB_OPS]; 1880 1896 1881 1897 void dump_op_count(void) … … 1883 1899 int i; 1884 1900 FILE *f; 1885 f = fopen("/tmp/op1.log", "w"); 1886 for(i = 0; i < INDEX_op_end; i++) { 1887 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, dyngen_table_op_count[i]); 1888 } 1889 fclose(f); 1890 f = fopen("/tmp/op2.log", "w"); 1901 f = fopen("/tmp/op.log", "w"); 1891 1902 for(i = INDEX_op_end; i < NB_OPS; i++) { 1892 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, dyngen_table_op_count[i]);1903 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]); 1893 1904 } 1894 1905 fclose(f); … … 1906 1917 1907 1918 #ifdef DEBUG_DISAS 1908 if (unlikely( loglevel & CPU_LOG_TB_OP)) {1909 fprintf(logfile,"OP:\n");1919 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { 1920 qemu_log("OP:\n"); 1910 1921 tcg_dump_ops(s, logfile); 1911 fprintf(logfile,"\n");1922 qemu_log("\n"); 1912 1923 } 1913 1924 #endif … … 1922 1933 1923 1934 #ifdef DEBUG_DISAS 1924 if (unlikely( loglevel & CPU_LOG_TB_OP_OPT)) {1925 fprintf(logfile,"OP after la:\n");1935 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { 1936 qemu_log("OP after la:\n"); 1926 1937 tcg_dump_ops(s, logfile); 1927 fprintf(logfile,"\n");1938 qemu_log("\n"); 1928 1939 } 1929 1940 #endif … … 1940 1951 opc = gen_opc_buf[op_index]; 1941 1952 #ifdef CONFIG_PROFILER 1942 dyngen_table_op_count[opc]++;1953 tcg_table_op_count[opc]++; 1943 1954 #endif 1944 1955 def = &tcg_op_defs[opc]; … … 1995 2006 case INDEX_op_end: 1996 2007 goto the_end; 1997 1998 #ifdef CONFIG_DYNGEN_OP1999 case 0 ... INDEX_op_end - 1:2000 /* legacy dyngen ops */2001 #ifdef CONFIG_PROFILER2002 s->old_op_count++;2003 #endif2004 tcg_reg_alloc_bb_end(s, s->reserved_regs);2005 if (search_pc >= 0) {2006 s->code_ptr += def->copy_size;2007 args += def->nb_args;2008 } else {2009 args = dyngen_op(s, opc, args);2010 }2011 goto next;2012 #endif2013 2008 default: 2014 2009 /* Note: in order to speed up the code, it would be much … … 2033 2028 } 2034 2029 2035 int dyngen_code(TCGContext *s, uint8_t *gen_code_buf)2030 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) 2036 2031 { 2037 2032 #ifdef CONFIG_PROFILER … … 2061 2056 not be changed, though writing the same values is ok. 2062 2057 Return -1 if not found. */ 2063 int dyngen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)2058 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset) 2064 2059 { 2065 2060 return tcg_gen_code_common(s, gen_code_buf, offset); … … 2082 2077 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", 2083 2078 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); 2084 cpu_fprintf(f, "old ops/total ops %0.1f%%\n",2085 s->op_count ? (double)s->old_op_count / s->op_count * 100.0 : 0);2086 2079 cpu_fprintf(f, "deleted ops/TB %0.2f\n", 2087 2080 s->tb_count ? -
trunk/src/recompiler/tcg/tcg.h ¶
r36140 r36170 115 115 We use plain int by default to avoid this runtime overhead. 116 116 Users of tcg_gen_* don't need to know about any of this, and should 117 treat TCGv as an opaque type. */ 117 treat TCGv as an opaque type. 118 In additon we do typechecking for different types of variables. TCGv_i32 119 and TCGv_i64 are 32/64-bit variables respectively. TCGv and TCGv_ptr 120 are aliases for target_ulong and host pointer sized values respectively. 121 */ 118 122 119 123 //#define DEBUG_TCGV 1 … … 123 127 typedef struct 124 128 { 125 int n; 126 } TCGv; 127 128 #define MAKE_TCGV(i) __extension__ \ 129 ({ TCGv make_tcgv_tmp = {i}; make_tcgv_tmp;}) 130 #define GET_TCGV(t) ((t).n) 129 int i32; 130 } TCGv_i32; 131 132 typedef struct 133 { 134 int i64; 135 } TCGv_i64; 136 137 #define MAKE_TCGV_I32(i) __extension__ \ 138 ({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;}) 139 #define MAKE_TCGV_I64(i) __extension__ \ 140 ({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;}) 141 #define GET_TCGV_I32(t) ((t).i32) 142 #define GET_TCGV_I64(t) ((t).i64) 131 143 #if TCG_TARGET_REG_BITS == 32 132 #define TCGV_HIGH(t) MAKE_TCGV(GET_TCGV(t) + 1) 144 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t)) 145 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1) 133 146 #endif 134 147 135 148 #else /* !DEBUG_TCGV */ 136 149 137 typedef int TCGv; 138 #define MAKE_TCGV(x) (x) 139 #define GET_TCGV(t) (t) 150 typedef int TCGv_i32; 151 typedef int TCGv_i64; 152 #define MAKE_TCGV_I32(x) (x) 153 #define MAKE_TCGV_I64(x) (x) 154 #define GET_TCGV_I32(t) (t) 155 #define GET_TCGV_I64(t) (t) 140 156 #if TCG_TARGET_REG_BITS == 32 157 #define TCGV_LOW(t) (t) 141 158 #define TCGV_HIGH(t) ((t) + 1) 142 159 #endif … … 145 162 146 163 /* Dummy definition to avoid compiler warnings. */ 147 #define TCGV_UNUSED(x) x = MAKE_TCGV(-1) 164 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1) 165 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1) 148 166 149 167 /* call flags */ … … 159 177 160 178 /* used to align parameters */ 161 #define TCG_CALL_DUMMY_TCGV MAKE_TCGV (-1)179 #define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1) 162 180 #define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) 163 181 … … 255 273 int64_t temp_count; 256 274 int temp_count_max; 257 int64_t old_op_count;258 275 int64_t del_op_count; 259 276 int64_t code_in_len; … … 297 314 void tcg_func_start(TCGContext *s); 298 315 299 int dyngen_code(TCGContext *s, uint8_t *gen_code_buf);300 int dyngen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset);316 int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf); 317 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset); 301 318 302 319 void tcg_set_frame(TCGContext *s, int reg, 303 320 tcg_target_long start, tcg_target_long size); 304 TCGv tcg_global_reg_new(TCGType type, int reg, const char *name); 305 TCGv tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2, 306 const char *name); 307 TCGv tcg_global_mem_new(TCGType type, int reg, tcg_target_long offset, 308 const char *name); 309 TCGv tcg_temp_new_internal(TCGType type, int temp_local); 310 static inline TCGv tcg_temp_new(TCGType type) 311 { 312 return tcg_temp_new_internal(type, 0); 321 322 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name); 323 TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset, 324 const char *name); 325 TCGv_i32 tcg_temp_new_internal_i32(int temp_local); 326 static inline TCGv_i32 tcg_temp_new_i32(void) 327 { 328 return tcg_temp_new_internal_i32(0); 313 329 } 314 static inline TCGv tcg_temp_local_new(TCGType type)315 { 316 return tcg_temp_new_internal (type,1);330 static inline TCGv_i32 tcg_temp_local_new_i32(void) 331 { 332 return tcg_temp_new_internal_i32(1); 317 333 } 318 void tcg_temp_free(TCGv arg); 319 char *tcg_get_arg_str(TCGContext *s, char *buf, int buf_size, TCGv arg); 334 void tcg_temp_free_i32(TCGv_i32 arg); 335 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg); 336 337 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name); 338 TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset, 339 const char *name); 340 TCGv_i64 tcg_temp_new_internal_i64(int temp_local); 341 static inline TCGv_i64 tcg_temp_new_i64(void) 342 { 343 return tcg_temp_new_internal_i64(0); 344 } 345 static inline TCGv_i64 tcg_temp_local_new_i64(void) 346 { 347 return tcg_temp_new_internal_i64(1); 348 } 349 void tcg_temp_free_i64(TCGv_i64 arg); 350 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg); 351 320 352 void tcg_dump_info(FILE *f, 321 353 int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); … … 357 389 const char *args_ct_str[TCG_MAX_OP_ARGS]; 358 390 } TCGTargetOpDef; 359 360 extern TCGOpDef tcg_op_defs[];361 391 362 392 void tcg_target_init(TCGContext *s); … … 384 414 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs); 385 415 386 void tcg_gen_call(TCGContext *s, TCGv func, unsigned int flags,387 unsigned int nb_rets, const TCGv *rets,388 unsigned int nb_params, const TCGv *args1);389 void tcg_gen_shifti_i64(TCGv ret, TCGv arg1,390 int c, int right, int arith);391 392 /* only used for debugging purposes */393 void tcg_register_helper(void *func, const char *name);394 #define TCG_HELPER(func) tcg_register_helper(func, #func)395 const char *tcg_helper_get_name(TCGContext *s, void *func);396 void tcg_dump_ops(TCGContext *s, FILE *outfile);397 398 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);399 TCGv tcg_const_i32(int32_t val);400 TCGv tcg_const_i64(int64_t val);401 402 416 #if TCG_TARGET_REG_BITS == 32 403 417 #define tcg_const_ptr tcg_const_i32 404 418 #define tcg_add_ptr tcg_add_i32 405 419 #define tcg_sub_ptr tcg_sub_i32 420 #define TCGv_ptr TCGv_i32 421 #define GET_TCGV_PTR GET_TCGV_I32 422 #define tcg_global_reg_new_ptr tcg_global_reg_new_i32 423 #define tcg_global_mem_new_ptr tcg_global_mem_new_i32 424 #define tcg_temp_new_ptr tcg_temp_new_i32 425 #define tcg_temp_free_ptr tcg_temp_free_i32 406 426 #else 407 427 #define tcg_const_ptr tcg_const_i64 408 428 #define tcg_add_ptr tcg_add_i64 409 429 #define tcg_sub_ptr tcg_sub_i64 410 #endif 430 #define TCGv_ptr TCGv_i64 431 #define GET_TCGV_PTR GET_TCGV_I64 432 #define tcg_global_reg_new_ptr tcg_global_reg_new_i64 433 #define tcg_global_mem_new_ptr tcg_global_mem_new_i64 434 #define tcg_temp_new_ptr tcg_temp_new_i64 435 #define tcg_temp_free_ptr tcg_temp_free_i64 436 #endif 437 438 void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, 439 int sizemask, TCGArg ret, int nargs, TCGArg *args); 440 441 void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, 442 int c, int right, int arith); 443 444 /* only used for debugging purposes */ 445 void tcg_register_helper(void *func, const char *name); 446 const char *tcg_helper_get_name(TCGContext *s, void *func); 447 void tcg_dump_ops(TCGContext *s, FILE *outfile); 448 449 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf); 450 TCGv_i32 tcg_const_i32(int32_t val); 451 TCGv_i64 tcg_const_i64(int64_t val); 452 TCGv_i32 tcg_const_local_i32(int32_t val); 453 TCGv_i64 tcg_const_local_i64(int64_t val); 411 454 412 455 void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, … … 414 457 const TCGArg *tcg_gen_code_op(TCGContext *s, int opc, const TCGArg *args1, 415 458 unsigned int dead_iargs); 416 417 const TCGArg *dyngen_op(TCGContext *s, int opc, const TCGArg *opparam_ptr);418 459 419 460 /* tcg-runtime.c */ … … 431 472 extern uint8_t* code_gen_prologue; 432 473 #endif 433 434 #if defined(__powerpc__) && !defined(__powerpc64__) 474 #if defined(_ARCH_PPC) && !defined(_ARCH_PPC64) 435 475 #define tcg_qemu_tb_exec(tb_ptr) \ 436 476 ((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr) 437 477 #else 438 439 478 # if defined(VBOX) && defined(GCC_WITH_BUGGY_REGPARM) 440 479 # define tcg_qemu_tb_exec(tb_ptr, ret) \ -
trunk/src/recompiler/tcg/x86_64/tcg-target.c ¶
r36140 r36170 700 700 break; 701 701 case 0: 702 /* movzbq */ 703 tcg_out_modrm(s, 0xb6 | P_EXT | P_REXW, data_reg, TCG_REG_RAX); 704 break; 702 705 case 1: 706 /* movzwq */ 707 tcg_out_modrm(s, 0xb7 | P_EXT | P_REXW, data_reg, TCG_REG_RAX); 708 break; 703 709 case 2: 704 710 default: … … 733 739 bswap = 0; 734 740 #endif 735 736 741 switch(opc) { 737 742 case 0:
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